static void
loadThumbprints(char *file, Thumbprint *table, Thumbprint *crltab)
{
Thumbprint *entry;
Biobuf *bin;
char *line, *field[50];
uchar sum[SHA1dlen];
int i;
bin = Bopen(file, OREAD);
if(bin == nil)
return;
for(; (line = Brdstr(bin, '\n', 1)) != 0; free(line)){
if(tokenize(line, field, nelem(field)) < 2)
continue;
if(strcmp(field[0], "#include") == 0){
loadThumbprints(field[1], table, crltab);
continue;
}
if(strcmp(field[0], "x509") != 0 || strncmp(field[1], "sha1=", strlen("sha1=")) != 0)
continue;
field[1] += strlen("sha1=");
dec16(sum, sizeof(sum), field[1], strlen(field[1]));
if(crltab && okThumbprint(sum, crltab))
continue;
entry = (Thumbprint*)emalloc(sizeof(*entry));
memcpy(entry->sha1, sum, SHA1dlen);
i = ((sum[0]<<8) + sum[1]) & (ThumbTab-1);
entry->next = table[i].next;
table[i].next = entry;
}
Bterm(bin);
}
void
main(int argc, char **argv)
{
char *p, *net, *unx;
char host[INET_ADDRSTRLEN];
int n, port, proto, verbose;
struct sockaddr_in sa;
verbose = 0;
ARGBEGIN{
case 'h':
p = EARGF(usage());
n = strlen(p);
if(n%2)
sysfatal("bad handle '%s'", p);
if(n > 2*sizeof handle)
sysfatal("handle too long '%s'", p);
handlelen = n/2;
if(dec16(handle, n/2, p, n) != n/2)
sysfatal("bad hex in handle '%s'", p);
break;
case 'v':
verbose = 1;
break;
default:
usage();
}ARGEND
if(argc != 2)
usage();
p = p9netmkaddr(argv[0], "udp", "nfs");
if(p9dialparse(strdup(p), &net, &unx, &sa, &port) < 0)
sysfatal("bad address '%s'", p);
if(sa.sin_family != AF_INET)
sysfatal("only IPv4 is supported");
inet_ntop(AF_INET, &(sa.sin_addr), host, INET_ADDRSTRLEN);
if(verbose)
print("nfs server is net=%s addr=%s port=%d\n",
net, host, port);
proto = 0;
if(strcmp(net, "tcp") == 0)
proto = SOCK_STREAM;
else if(strcmp(net, "udp") == 0)
proto = SOCK_DGRAM;
else
sysfatal("bad proto %s: can only handle tcp and udp", net);
mountnfs(proto, &sa, handle, handlelen, argv[1]);
exits(0);
}
void pinteh() {
xor32_reg_reg(_eax, _eax);
dec16(_eax);
pinsrw_xmm_reg_imm8(_xmm0, _eax, 0);
pshufd_reg_reg(_xmm0, _xmm0, 0, 0, 0, 0);
movdqa_reg_reg(_xmm1, _xmm0);
mov32_reg_imm32(_eax, (u32)&g_cpu->m_gpr[_rs]);
pand_reg_rmem(_xmm0, _eax);
pslldq_reg_imm(_xmm0, 2);
mov32_reg_imm32(_eax, (u32)&g_cpu->m_gpr[_rt]);
pand_reg_rmem(_xmm1, _eax);
por_reg_reg(_xmm0, _xmm1);
mov32_reg_imm32(_eax, (u32)&g_cpu->m_gpr[_rd]);
movdqa_rmem_reg(_eax, _xmm0);
}
