Пример #1
0
/* Machine reset and friends: stuff that needs setting up which IS directly affected by reset */
static void dectalk_reset(device_t *device)
{
	dectalk_state *state = device->machine().driver_data<dectalk_state>();
	state->m_hack_self_test = 0; // hack
	// stuff that is DIRECTLY affected by the RESET line
	state->m_statusLED = 0; // clear status led latch
	dectalk_x2212_recall(device->machine()); // nvram recall
	state->m_m68k_spcflags_latch = 1; // initial status is speech reset(d0) active and spc int(d6) disabled
	state->m_m68k_tlcflags_latch = 0; // initial status is tone detect int(d6) off, answer phone(d8) off, ring detect int(d14) off
	device->machine().device("duart68681")->reset(); // reset the DUART
	// stuff that is INDIRECTLY affected by the RESET line
	dectalk_clear_all_fifos(device->machine()); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function.
	dectalk_semaphore_w(device->machine(), 0); // on the original state->m_dectalk pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true.
	state->m_spc_error_latch = 0; // spc error latch is cleared on /reset
	device->machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
	state->m_tlc_tonedetect = 0; // TODO, needed for selftest pass
	state->m_tlc_ringdetect = 0; // TODO
	state->m_tlc_dtmf = 0; // TODO
	state->m_duart_inport = 0xF;
	state->m_duart_outport = 0;
}
Пример #2
0
/* Driver init: stuff that needs setting up which isn't directly affected by reset */
DRIVER_INIT_MEMBER(dectalk_state,dectalk)
{
	dectalk_clear_all_fifos();
	m_simulate_outfifo_error = 0;
	timer_set(attotime::from_hz(10000), TIMER_OUTFIFO_READ);
}
Пример #3
0
/* Driver init: stuff that needs setting up which isn't directly affected by reset */
DRIVER_INIT_MEMBER(dectalk_state,dectalk)
{
	dectalk_clear_all_fifos(machine());
	m_simulate_outfifo_error = 0;
	machine().scheduler().timer_set(attotime::from_hz(10000), timer_expired_delegate(FUNC(dectalk_state::outfifo_read_cb),this));
}