/*
* XICS Common class - parent for emulated XICS and KVM-XICS
*/
static void xics_common_reset(DeviceState *d)
{
XICSState *icp = XICS_COMMON(d);
int i;
for (i = 0; i < icp->nr_servers; i++) {
device_reset(DEVICE(&icp->ss[i]));
}
device_reset(DEVICE(icp->ics));
}
void vic1520_t::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
void luxor_55_21056_device::abcbus_c3(uint8_t data)
{
if (m_cs)
{
device_reset();
}
}
void luxor_55_21056_device::abcbus_c3(UINT8 data)
{
if (m_cs)
{
device_reset();
}
}
void serial_box_device::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
static void md_attr_write(PCMCIACardState *card, uint32_t at, uint8_t value)
{
MicroDriveState *s = MICRODRIVE(card);
at -= s->attr_base;
switch (at) {
case 0x00: /* Configuration Option Register */
s->opt = value & 0xcf;
if (value & OPT_SRESET) {
device_reset(DEVICE(s));
}
md_interrupt_update(s);
break;
case 0x02: /* Card Configuration Status Register */
if ((s->stat ^ value) & STAT_PWRDWN) {
s->pins |= PINS_CRDY;
}
s->stat &= 0x82;
s->stat |= value & 0x74;
md_interrupt_update(s);
/* Word 170 in Identify Device must be equal to STAT_XE */
break;
case 0x04: /* Pin Replacement Register */
s->pins &= PINS_CRDY;
s->pins |= value & PINS_MRDY;
break;
case 0x06: /* Socket and Copy Register */
break;
default:
printf("%s: Bad attribute space register %02x\n", __func__, at);
}
}
void plus4_sid_cartridge_device::plus4_breset_w(int state)
{
if (state == ASSERT_LINE)
{
device_reset();
}
}
void base_d9060_device::ieee488_ifc(int state)
{
if (!state)
{
device_reset();
}
}
void abc_fd2_t::abcbus_c3(UINT8 data)
{
if (m_cs)
{
device_reset();
}
}
static WRITE8_HANDLER( speech_control_w )
{
UINT8 previous = speech_control;
speech_control = data;
/* bit 0 enables/disables the NMI line */
nmi_state_update(space->machine);
/* bit 1 controls a LED on the sound board */
/* bit 2 goes to 8913 BDIR pin */
if ((previous & 0x04) != 0 && (data & 0x04) == 0)
{
/* bit 3 selects which of the two 8913 to enable */
/* bit 4 goes to the 8913 BC1 pin */
const device_config *ay = devtag_get_device(space->machine, (data & 0x08) ? "ay1" : "ay2");
ay8910_data_address_w(ay, data >> 4, *psg_latch);
}
/* bit 5 goes to the speech chip DIRECT DATA TEST pin */
/* bit 6 = speech chip DATA PRESENT pin; high then low to make the chip read data */
if ((previous & 0x40) == 0 && (data & 0x40) != 0)
{
const device_config *sp = devtag_get_device(space->machine, "sp");
sp0250_w(sp, 0, *sp0250_latch);
}
/* bit 7 goes to the speech chip RESET pin */
if ((previous ^ data) & 0x80)
{
const device_config *sp = devtag_get_device(space->machine, "sp");
device_reset(sp);
}
}
void cmd_hd_device::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
void vlm5030_device::device_start()
{
m_coeff = &vlm5030_coeff;
/* reset input pins */
m_pin_RST = m_pin_ST = m_pin_VCU= 0;
m_latch_data = 0;
device_reset();
m_phase = PH_IDLE;
m_channel = machine().sound().stream_alloc(*this, 0, 1, clock() / 440);
save_item(NAME(m_address));
save_item(NAME(m_pin_BSY));
save_item(NAME(m_pin_ST));
save_item(NAME(m_pin_VCU));
save_item(NAME(m_pin_RST));
save_item(NAME(m_latch_data));
save_item(NAME(m_vcu_addr_h));
save_item(NAME(m_parameter));
save_item(NAME(m_phase));
save_item(NAME(m_interp_count));
save_item(NAME(m_sample_count));
save_item(NAME(m_pitch_count));
save_item(NAME(m_old_energy));
save_item(NAME(m_old_pitch));
save_item(NAME(m_old_k));
save_item(NAME(m_target_energy));
save_item(NAME(m_target_pitch));
save_item(NAME(m_target_k));
save_item(NAME(m_x));
}
void wangpc_wdc_device::wangpcbus_aiowc_w(address_space &space, offs_t offset, UINT16 mem_mask, UINT16 data)
{
if (sad(offset) && ACCESSING_BITS_0_7)
{
switch (offset & 0x7f)
{
case 0x02/2:
// TODO command register
break;
case 0xfc/2:
device_reset();
break;
case 0xfe/2:
{
bool irq = (m_irq == ASSERT_LINE);
bool changed = ((m_option & 0x0e) != (data & 0x0e));
if (irq && changed) set_irq(CLEAR_LINE);
m_option = data & 0xff;
if (irq && changed) set_irq(ASSERT_LINE);
}
break;
}
}
}
static WRITE32_HANDLER( control_w )
{
UINT32 old = control_data;
// bit $80000000 = BSMT access/ROM read
// bit $20000000 = toggled every 64 IRQ4's
// bit $10000000 = ????
// bit $00800000 = EEPROM data
// bit $00400000 = EEPROM clock
// bit $00200000 = EEPROM enable (on 1)
COMBINE_DATA(&control_data);
/* handle EEPROM I/O */
if (ACCESSING_BITS_16_23)
{
eeprom_write_bit(data & 0x00800000);
eeprom_set_cs_line((data & 0x00200000) ? CLEAR_LINE : ASSERT_LINE);
eeprom_set_clock_line((data & 0x00400000) ? ASSERT_LINE : CLEAR_LINE);
}
/* toggling BSMT off then on causes a reset */
if (!(old & 0x80000000) && (control_data & 0x80000000))
{
const device_config *device = devtag_get_device(space->machine, "bsmt");
bsmt2000_data_w(device, bsmt_data_bank, 0, 0xffff);
device_reset(device);
}
/* log any unknown bits */
if (data & 0x4f1fffff)
logerror("%08X: control_w = %08X & %08X\n", cpu_get_previouspc(space->cpu), data, mem_mask);
}
void newbrain_fdc_device::io_dec_w(uint8_t data)
{
/*
bit description
0 PAGING
1
2 MA16
3 MPM
4
5 _FDC RESET
6
7 FDC ATT
*/
m_paging = BIT(data, 0);
m_ma16 = BIT(data, 2);
m_mpm = BIT(data, 3);
if (!BIT(data, 5))
{
device_reset();
}
m_fdc_att = BIT(data, 7);
}
void wangpc_emb_device::wangpcbus_aiowc_w(address_space &space, offs_t offset, UINT16 mem_mask, UINT16 data)
{
if (sad(offset))
{
logerror("emb write %06x:%02x\n", offset*2, data);
switch (offset & 0x7f)
{
case 0xc0/2:
m_option = data;
break;
case 0xce/2:
m_parity_error = 0;
break;
case 0xfc/2:
device_reset();
break;
case 0xfe/2:
m_parity_odd = BIT(data, 9);
break;
}
}
}
static int rt288x_wdt_probe(struct platform_device *pdev)
{
struct resource *res;
int ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rt288x_wdt_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(rt288x_wdt_base))
return PTR_ERR(rt288x_wdt_base);
rt288x_wdt_clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(rt288x_wdt_clk))
return PTR_ERR(rt288x_wdt_clk);
device_reset(&pdev->dev);
rt288x_wdt_freq = clk_get_rate(rt288x_wdt_clk) / RALINK_WDT_PRESCALE;
rt288x_wdt_dev.dev = &pdev->dev;
rt288x_wdt_dev.bootstatus = rt288x_wdt_bootcause();
rt288x_wdt_dev.max_timeout = (0xfffful / rt288x_wdt_freq);
rt288x_wdt_dev.timeout = rt288x_wdt_dev.max_timeout;
watchdog_set_nowayout(&rt288x_wdt_dev, nowayout);
ret = watchdog_register_device(&rt288x_wdt_dev);
if (!ret)
dev_info(&pdev->dev, "Initialized\n");
return 0;
}
void base_c1571_device::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
void luxor_55_21046_device::abcbus_rst(int state)
{
if (!state)
{
device_reset();
}
}
void c1526_device::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
void c4023_device::ieee488_ifc(int state)
{
if (!state)
{
device_reset();
}
}
void c64_nl10_interface_device::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
void c1571_t::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
void
device_init(context_data *context, void *data)
{
// -- Initalize OGL -- //
#ifdef OGL_HAS_VAO
if(!vao)
{
glGenVertexArrays(1, &vao);
}
#endif
// -- Extra Check -- //
#ifdef OP_BUFFER_API_OGL_EXTRA_CHECKS
const GLenum err_code = glGetError();
if(err_code)
{
context->log(
"GL Error - Device Initalize %d : %s",
err_code,
get_error_msg(err_code)
);
}
#endif
// -- Reset -- //
device_reset(context, data);
}
void fd2000_device::cbm_iec_reset(int state)
{
if (!state)
{
device_reset();
}
}
inline void wd11c00_17_device::software_reset()
{
m_out_mr_cb(ASSERT_LINE);
m_out_mr_cb(CLEAR_LINE);
device_reset();
}
void base_d9060_device::ieee488_ifc(int state)
{
if (!m_ifc && state)
{
device_reset();
}
m_ifc = state;
}
void hardbox_device::ieee488_ifc(int state)
{
if (!m_ifc && state)
{
device_reset();
}
m_ifc = state;
}
void c8050_device::ieee488_ifc(int state)
{
if (!m_ifc && state)
{
device_reset();
}
m_ifc = state;
}
void softbox_state::ieee488_ifc(int state)
{
if (!m_ifc && state)
{
device_reset();
}
m_ifc = state;
}
