static void dma_update_DRQ(int dma_idx, int chan_idx) { switch (DMA_TRANSFER_MODE(dma[dma_idx].chans[chan_idx].mode)) { case DEMAND: dma_poll_DRQ(dma_idx, chan_idx); break; case SINGLE: dma[dma_idx].status &= ~(1 << (chan_idx + 4)); break; case BLOCK: if (REACHED_TC(dma_idx, chan_idx)) dma_poll_DRQ(dma_idx, chan_idx); break; case CASCADE: dma_poll_DRQ(dma_idx, chan_idx); break; } }
static void dma_update_DRQ(int dma_idx, int chan_idx) { switch (dma[dma_idx].chans[chan_idx].mode & 0x30) { case 0x00: // demand dma_poll_DRQ(dma_idx, chan_idx); break; case 0x10: // single dma[dma_idx].status &= ~(1 << (chan_idx + 4)); break; case 0x20: // block if (REACHED_TC(dma_idx, chan_idx)) dma_poll_DRQ(dma_idx, chan_idx); break; case 0x30: // cascade dma_poll_DRQ(dma_idx, chan_idx); break; } }