/*------------------------------------------------------------------------*/ static void do_modrm(char subtype) { int mod = MOD(modrm()); int rm = RM(modrm()); int extend = (addrsize == 32) ? 4 : 2; /* specifies two registers */ if (mod == 3) { reg_name(rm, subtype); return; } if (must_do_size) { if (wordop) { if (addrsize==32 || opsize==32) /* then must specify size */ uprintf( Info->GetStringName(DISASM_ID_DWORD_PTR) ); else uprintf( Info->GetStringName(DISASM_ID_WORD_PTR) ); } else uprintf( Info->GetStringName(DISASM_ID_BYTE_PTR) ); uputchar(' '); } /* mem operand with 32 bit ofs */ if ((mod == 0) && (rm == 5) && (addrsize == 32)) { ua_str("%p:["); SET_FLAG( Info->CurrentFlags,DISASM_FL_REF ); outhex('d', extend, 0, addrsize, 0); CLR_FLAG( Info->CurrentFlags,DISASM_FL_REF ); uputchar(']'); } else /* 16 bit dsplcmnt */ if ((mod == 0) && (rm == 6) && (addrsize == 16)) { ua_str("%p:["); SET_FLAG( Info->CurrentFlags,DISASM_FL_REF ); outhex('w', extend, 0, addrsize, 0); CLR_FLAG( Info->CurrentFlags,DISASM_FL_REF ); uputchar(']'); } else { /*All other*/ if ( (addrsize != 32) || (rm != 4) ) ua_str("%p:["); SET_FLAG( Info->CurrentFlags,DISASM_FL_REF | DISASM_FL_REFADD ); if (addrsize == 16) switch (rm) { case 0: uprintf("bx+si"); break; case 1: uprintf("bx+di"); break; case 2: uprintf("bp+si"); break; case 3: uprintf("bp+di"); break; case 4: uprintf("si"); break; case 5: uprintf("di"); break; case 6: uprintf("bp"); break; case 7: uprintf("bx"); break; } else switch (rm) { case 0: uprintf("eax"); break; case 1: uprintf("ecx"); break; case 2: uprintf("edx"); break; case 3: uprintf("ebx"); break; case 4: do_sib(mod); break; case 5: uprintf("ebp"); break; case 6: uprintf("esi"); break; case 7: uprintf("edi"); break; } switch (mod) { case 1: outhex('b', extend, 1, addrsize, 0); break; case 2: outhex('v', extend, 1, addrsize, 1); break; } CLR_FLAG( Info->CurrentFlags,DISASM_FL_REF | DISASM_FL_REFADD ); uputchar(']'); } }
static void do_modrm(char subtype) { int mod = MOD(modrm()); int rm = RM(modrm()); int extend = (addrsize == 32) ? 4 : 2; if(mod == 3) { /* Specifies two registers */ reg_name(rm, subtype); return; } if(must_do_size) { if(wordop) { if(addrsize == 32 || opsize == 32) ua_str("DWORD@PTR@"); else ua_str("WORD@PTR@"); } else ua_str("BYTE@PTR@"); } if((mod == 0) && (rm == 5) && (addrsize == 32)) { /* Mem operand with 32 bit offset */ ua_str("%p:["); outhex('d', extend, 0, addrsize, 0); uputchar(']'); return; } if((mod == 0) && (rm == 6) && (addrsize == 16)) { /* 16 bit displacement */ ua_str("%p:["); outhex('w', extend, 0, addrsize, 0); uputchar(']'); return; } if((addrsize != 32) || (rm != 4)) ua_str("%p:["); if(addrsize == 16) { switch(rm) { case 0: uprintf("BX+SI"); break; case 1: uprintf("BX+DI"); break; case 2: uprintf("BP+SI"); break; case 3: uprintf("BP+DI"); break; case 4: uprintf("SI"); break; case 5: uprintf("DI"); break; case 6: uprintf("BP"); break; case 7: uprintf("BX"); break; } } else { switch(rm) { case 0: uprintf("EAX"); break; case 1: uprintf("ECX"); break; case 2: uprintf("EDX"); break; case 3: uprintf("EBX"); break; case 4: do_sib(mod); break; case 5: uprintf("EBP"); break; case 6: uprintf("ESI"); break; case 7: uprintf("EDI"); break; } } switch(mod) { case 1: outhex('b', extend, 1, addrsize, 0); break; case 2: outhex('v', extend, 1, addrsize, 1); break; } uputchar(']'); }
/*------------------------------------------------------------------------*/ void do_modrm(char t) { int m; int r; int extend; m = mod(modrm()); r = rm(modrm()); extend = (addrsize == 32) ? 4 : 2; if (m == 3) { reg_name(r, t); return; } if ((m == 0) && (r == 5) && (addrsize == 32)) { expand_out("%p:["); ohex('d', extend, 0, addrsize); fprintf(out_fh,"]"); return; } if ((m == 0) && (r == 6) && (addrsize == 16)) { expand_out("%p:["); ohex('w', extend, 0, addrsize); fprintf(out_fh,"]"); return; } if ((addrsize != 32) || (r != 4)) expand_out("%p:["); if (addrsize == 16) { switch (r) { case 0: fprintf(out_fh,"BX+SI"); break; case 1: fprintf(out_fh,"BX+DI"); break; case 2: fprintf(out_fh,"BP+SI"); break; case 3: fprintf(out_fh,"BP+DI"); break; case 4: fprintf(out_fh,"SI"); break; case 5: fprintf(out_fh,"DI"); break; case 6: fprintf(out_fh,"BP"); break; case 7: fprintf(out_fh,"BX"); break; } } else { switch (r) { case 0: fprintf(out_fh,"EAX"); break; case 1: fprintf(out_fh,"ECX"); break; case 2: fprintf(out_fh,"EDX"); break; case 3: fprintf(out_fh,"EBX"); break; case 4: do_sib(m); break; case 5: fprintf(out_fh,"EBP"); break; case 6: fprintf(out_fh,"ESI"); break; case 7: fprintf(out_fh,"EDI"); break; } } switch (m) { case 1: ohex('b', extend, 0, addrsize); /* was 1 */ break; case 2: fprintf(out_fh,"+"); ohex('v', extend, 0, addrsize); /* was 1 */ break; } fprintf(out_fh,"]"); }
void do_modrm(char t) { int m = mod(modrm()); int r = rm(modrm()); int extend = (addrsize == 32) ? 4 : 2; if (m == 3) { reg_name(r, t); return; } switch(bytes(t)) { case 1 : ua_str("byte ptr "); break; case 2 : ua_str("word ptr "); break; case 4 : ua_str("dword ptr "); break; default : ua_str("?word ptr "); break; } if ((m == 0) && (r == 5) && (addrsize == 32)) { ua_str("%p:["); ohex('d', extend, 0, addrsize); uprintf("%c",']'); return; } if ((m == 0) && (r == 6) && (addrsize == 16)) { ua_str("%p:["); ohex('w', extend, 0, addrsize); uprintf("%c",']'); return; } if ((addrsize != 32) || (r != 4)) ua_str("%p:["); if (addrsize == 16) { switch (r) { case 0: uprintf("bx+si"); break; case 1: uprintf("bx+di"); break; case 2: uprintf("bp+si"); break; case 3: uprintf("bp+di"); break; case 4: uprintf("si"); break; case 5: uprintf("di"); break; case 6: uprintf("bp"); break; case 7: uprintf("bx"); break; } } else { switch (r) { case 0: uprintf("eax"); break; case 1: uprintf("ecx"); break; case 2: uprintf("edx"); break; case 3: uprintf("ebx"); break; case 4: do_sib(m); break; case 5: uprintf("ebp"); break; case 6: uprintf("esi"); break; case 7: uprintf("edi"); break; } } switch (m) { case 1: ohex('b', extend, 1, addrsize); break; case 2: uprintf("+"); ohex('v', extend, 1, addrsize); break; } uprintf("%c",']'); }
/*------------------------------------------------------------------------*/ static void do_modrm(char subtype) { int mod = MOD(modrm()); int rm = RM(modrm()); int extend = (addrsize == 32) ? 4 : 2; if (mod == 3) { /* specifies two registers */ reg_name(rm, subtype); return; } if (must_do_size) { if (wordop) { if (addrsize==32 || opsize==32) { /* then must specify size */ ua_str("dword ptr "); } else { ua_str("word ptr "); } } else { ua_str("byte ptr "); } } if ((mod == 0) && (rm == 5) && (addrsize == 32)) {/* mem operand with 32 bit ofs */ ua_str("%p:["); outhex('d', extend, 0, addrsize, 0); uputchar(']'); return; } if ((mod == 0) && (rm == 6) && (addrsize == 16)) { /* 16 bit dsplcmnt */ ua_str("%p:["); outhex('w', extend, 0, addrsize, 0); uputchar(']'); return; } if ((addrsize != 32) || (rm != 4)) ua_str("%p:["); if (addrsize == 16) { switch (rm) { case 0: uprintf("bx+si"); break; case 1: uprintf("bx+di"); break; case 2: uprintf("bp+si"); break; case 3: uprintf("bp+di"); break; case 4: uprintf("si"); break; case 5: uprintf("di"); break; case 6: uprintf("bp"); break; case 7: uprintf("bx"); break; } } else { switch (rm) { case 0: uprintf("eax"); break; case 1: uprintf("ecx"); break; case 2: uprintf("edx"); break; case 3: uprintf("ebx"); break; case 4: do_sib(mod); break; case 5: uprintf("ebp"); break; case 6: uprintf("esi"); break; case 7: uprintf("edi"); break; } } switch (mod) { case 1: outhex('b', extend, 1, addrsize, 0); break; case 2: outhex('v', extend, 1, addrsize, 1); break; } uputchar(']'); }