static void init_dram(const struct mt8173_sdram_params *sdram_params) { emi_init(sdram_params); dramc_pre_init(CHANNEL_A, sdram_params); dramc_pre_init(CHANNEL_B, sdram_params); div2_phase_sync(); dramc_init(CHANNEL_A, sdram_params); dramc_init(CHANNEL_B, sdram_params); }
static void cubieboard_raminit(void) { struct dram_para dram_para = { .clock = 480, .type = 3, .rank_num = 1, .density = 4096, .io_width = 16, .bus_width = 32, .cas = 6, .zq = 123, .odt_en = 0, .size = 1024, .tpr0 = 0x30926692, .tpr1 = 0x1090, .tpr2 = 0x1a0c8, .tpr3 = 0, .tpr4 = 0, .tpr5 = 0, .emr1 = 0, .emr2 = 0, .emr3 = 0, }; dramc_init(&dram_para); /* FIXME: ram_check does not compile for ARM, * and we didn't init console yet */ ////void *const test_base = (void *)A1X_DRAM_BASE; ////ram_check((u32)test_base, (u32)test_base + 0x1000); } void bootblock_mainboard_early_init(void) { /* A10 Timer init uses the 24MHz clock, not PLLs, so we can init it very * early on to get udelay, which is used almost everywhere else. */ init_timer(); cubieboard_setup_clocks(); cubieboard_setup_gpios(); cubieboard_enable_uart(); }
unsigned long sunxi_dram_init(void) { return dramc_init(&dram_para); }
int sunxi_dram_init(void) { return dramc_init(&dram_para); }