/**
* Called via glGetBufferSubDataARB().
*/
static void
intel_bufferobj_get_subdata(GLcontext * ctx,
GLenum target,
GLintptrARB offset,
GLsizeiptrARB size,
GLvoid * data, struct gl_buffer_object *obj)
{
struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
assert(intel_obj);
if (intel_obj->sys_buffer)
memcpy(data, (char *)intel_obj->sys_buffer + offset, size);
else
drm_intel_bo_get_subdata(intel_obj->buffer, offset, size, data);
}
/**
* Called via glGetBufferSubDataARB().
*/
static void
intel_bufferobj_get_subdata(struct gl_context * ctx,
GLintptrARB offset,
GLsizeiptrARB size,
GLvoid * data, struct gl_buffer_object *obj)
{
struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
struct intel_context *intel = intel_context(ctx);
assert(intel_obj);
if (intel_obj->sys_buffer)
memcpy(data, (char *)intel_obj->sys_buffer + offset, size);
else {
if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) {
intel_batchbuffer_flush(intel);
}
drm_intel_bo_get_subdata(intel_obj->buffer, offset, size, data);
}
}
static void prw_copyfunc(struct scratch_buf *src, unsigned src_x, unsigned src_y,
struct scratch_buf *dst, unsigned dst_x, unsigned dst_y,
unsigned logical_tile_no)
{
uint32_t tmp_tile[options.tile_size*options.tile_size];
int i;
assert(batch->ptr == batch->buffer);
if (options.ducttape)
drm_intel_bo_wait_rendering(dst->bo);
if (src->tiling == I915_TILING_NONE) {
for (i = 0; i < options.tile_size; i++) {
unsigned ofs = src_x*sizeof(uint32_t) + src->stride*(src_y + i);
drm_intel_bo_get_subdata(src->bo, ofs,
options.tile_size*sizeof(uint32_t),
tmp_tile + options.tile_size*i);
}
} else {
if (options.use_cpu_maps)
set_to_cpu_domain(src, 0);
cpucpy2d(src->data, src->stride/sizeof(uint32_t), src_x, src_y,
tmp_tile, options.tile_size, 0, 0, logical_tile_no);
}
if (dst->tiling == I915_TILING_NONE) {
for (i = 0; i < options.tile_size; i++) {
unsigned ofs = dst_x*sizeof(uint32_t) + dst->stride*(dst_y + i);
drm_intel_bo_subdata(dst->bo, ofs,
options.tile_size*sizeof(uint32_t),
tmp_tile + options.tile_size*i);
}
} else {
if (options.use_cpu_maps)
set_to_cpu_domain(dst, 1);
cpucpy2d(tmp_tile, options.tile_size, 0, 0,
dst->data, dst->stride/sizeof(uint32_t), dst_x, dst_y,
logical_tile_no);
}
}
int
intel_bo_pread(struct intel_bo *bo, unsigned long offset,
unsigned long size, void *data)
{
return drm_intel_bo_get_subdata(gem_bo(bo), offset, size, data);
}