void distributeObjectsToCores(PhysicsEngine* engine, e_epiphany_t* dev){
int i, j, k;
j=0;
k=0;
for(i=0; i<engine->count; i++){
int address = COMMADDRESS_OBJECTS+(i/16)*sizeof(PhysicsObject);
e_write(dev,k,j,address,&engine->objects[i],sizeof(PhysicsObject));
j = j<3?j+1:0;
k = j==3?(k<3?k+1:0):k;
}
int div = engine->count/16;
int res = engine->count%16;
for(j=0;j<4;j++){
for(k=0;k<4;k++){
char key = 4*j+k;
char value = div + ((k+4*j)<res);
printf("count(%d,%d)->%d %d\n",j,k,value, key);
e_write(dev,j,k,COMMADDRESS_CORE_KEY, &key,sizeof(char));
e_write(dev,j,k,COMMADDRESS_OBJECTS_COUNT, &value,sizeof(char));
}
}
usleep(20000);
}
//Hello World Test
int main(int argc, char *argv[])
{
unsigned int data,rdata;
//Write data to accelerator
data=2;
e_write(REG_INPUT0,data);
data=3;
e_write(REG_INPUT1,data);
//read back result
e_read(REG_OUTPUT, &rdata);
printf ("RESULT=%d\n", rdata);
}
int main(void) {
const char ShmName[] = "hello_shm";
const char Msg[] = "Hello World from core 0x%03x!";
char buf[256] = { 0 };
e_coreid_t coreid;
e_memseg_t emem;
unsigned my_row;
unsigned my_col;
/////////////////////////////
trace_start_wait_all();
/////////////////////////////
// Who am I? Query the CoreID from hardware.
coreid = e_get_coreid();
e_coords_from_coreid(coreid, &my_row, &my_col);
if ( E_OK != e_shm_attach(&emem, ShmName) ) {
return EXIT_FAILURE;
}
// Attach to the shm segment
snprintf(buf, sizeof(buf), Msg, coreid);
if ( emem.size >= strlen(buf) + 1 ) {
// Write the message (including the null terminating
// character) to shared memory
e_write((void*)&emem, buf, my_row, my_col, NULL, strlen(buf) + 1);
} else {
// Shared memory region is too small for the message
return EXIT_FAILURE;
}
return EXIT_SUCCESS;
}
// Call (invoke) the matmul() function
int matmul_go(e_mem_t *pDRAM)
{
unsigned int addr;
// Wait until cores finished previous calculation
if (ar.verbose > 0) printf("Waiting for Epiphany to be ready...\n");
addr = offsetof(shared_buf_t, core.go);
Mailbox.core.go = 1;
while (Mailbox.core.go != 0)
e_read(pDRAM, 0, 0, addr, &Mailbox.core.go, sizeof(Mailbox.core.go));
// Signal cores to start crunching
printf("Writing the GO!...\n");
addr = offsetof(shared_buf_t, core.go);
Mailbox.core.go = _MAX_MEMBER_;
e_write(pDRAM, 0, 0, addr, &Mailbox.core.go, sizeof(Mailbox.core.go));
// Wait until cores finished calculation
addr = offsetof(shared_buf_t, core.go);
Mailbox.core.go = 1;
while (Mailbox.core.go != 0)
e_read(pDRAM, 0, 0, addr, &Mailbox.core.go, sizeof(Mailbox.core.go));
printf("Done...\n");
return 0;
}
ssize_t e_mwrite_buf(e_mem_t *dram, off_t to_addr, const void *buf, size_t count) {
ssize_t s = e_write(dram, 0, 0, to_addr, buf, count);
if (s==E_ERR) {
printf("e write error");
}
return s;
}
void e_check_test( void *dev,
unsigned row,
unsigned col,
int *status
){
unsigned int result;
int wait=1;
while(1){
e_read(dev,row, col, 0x24, &result, sizeof(unsigned));
if(result==0xDEADBEEF){
printf("FAILED for core (%d,%d)\n",row,col);
*status=0;
break;
}
else if(result==0x12345678){
unsigned clr= ( unsigned ) 0x0;
e_write(dev,row, col, 0x24, &clr, sizeof(clr));
break;
}
else{
if(wait){
usleep(1000000);
printf("...waiting for core (%d,%d)\n",row,col);
wait=0;
}
else{
printf("FAILED for core (%d,%d)\n",row,col);
*status=0;
break;
}
}
}
}
int main(int argc, char *argv[])
{
e_platform_t platform;
e_epiphany_t dev;
e_mem_t emem;
const uint32_t zero = 0;
uint32_t result = 0;
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
if (e_alloc(&emem, 0, 128) != E_OK)
exit(EXIT_FAILURE);
e_write(&emem, 0, 0, 0, &zero, sizeof(zero));
e_open(&dev, 0, 0, 1, 1);
if (e_load("emain.elf", &dev, 0, 0, E_TRUE) != E_OK)
exit(EXIT_FAILURE);
do {
e_read(&emem, 0, 0, 0, &result, sizeof(result));
} while (!result);
if (result != 1) {
fprintf(stderr,
"Test failed. elink RX remapping configured incorrectly. Faulty programs can\n"
"likely access the system's first 1MB memory region. Go patch your kernel!\n");
exit(EXIT_FAILURE);
}
fprintf(stderr, "Test passed\n");
return 0;
}
int _write_extmem(void* src, off_t offset, int size) {
if (e_write(&state.emem, 0, 0, offset, src, size) != size) {
fprintf(stderr, "ERROR: _write_extmem(src,%p,%d) failed.\n",
(void*)offset, size);
return 0;
}
return 1;
}
int main(int argc, char *argv[]) {
e_coreid_t core_id = e_get_coreid();
int row, col;
e_coords_from_coreid(core_id, &row, &col);
e_write(&e_group_config, &core_id, row, col, (int*) 0x2000, sizeof(int));
return 0;
}
int ebsp_write(int pid, void* src, off_t dst, int size) {
int prow, pcol;
_get_p_coords(pid, &prow, &pcol);
if (e_write(&state.dev, prow, pcol, dst, src, size) != size) {
fprintf(stderr,
"ERROR: e_write(dev,%d,%d,%p,%p,%d) failed in ebsp_write.\n",
prow, pcol, (void*)dst, (void*)src, size);
return 0;
}
return 1;
}
static void
epiphany_init(struct epiphany_state *state, const int logN)
{
int i, cmd;
/* Save params */
state->logN = logN;
state->N = 1 << logN;
/* Alloc array */
state->data = malloc(sizeof(complex float) * state->N);
state->twiddle = malloc(sizeof(complex float) * state->N / 2);
/* Open the device */
e_init(NULL);
e_reset_system();
e_get_platform_info(&state->platform);
e_open(&state->dev, 0, 0, 1, 1);
/* Init mailbox */
cmd = 0;
e_write(&state->dev, 0, 0, CMD, &cmd, sizeof(uint32_t));
/* Load software */
e_load_group("bin/e_fft.srec", &state->dev, 0, 0, 1, 1, E_TRUE);
/* Load the input data and twiddle factors */
srandom(0);
for (i=0; i<state->N; i++)
state->data[i] = (float)(random() & 0xfff) / 256.0f;
for (i=0; i<state->N/2; i++)
state->twiddle[i] = twiddle(i, state->N);
e_write(&state->dev, 0, 0, DATA_IN, state->data, sizeof(float complex) * state->N);
e_write(&state->dev, 0, 0, TWIDDLE, state->twiddle, sizeof(float complex) * state->N / 2);
}
void clearMemory(){
e_epiphany_t dev;
char clear[0x6000] = {0};
unsigned int i,j;
for(i=0;i<4;i++){
for(j=0;j<4; j++){
e_open(&dev,i,j,1,1);
e_reset_group(&dev);
e_write(&dev,0,0,0x2000,clear,0x6000*sizeof(char));
e_close(&dev);
}
}
usleep(10000);
}
int SRAM_speed(){
double tdiff, rate;
gettimeofday(&timer[0], NULL);
e_write(pEpiphany, 0, 0, (off_t) 0, sbuf, SRAM_BUF_SZ);
gettimeofday(&timer[1], NULL);
tdiff = ((double) (timer[1].tv_sec - timer[0].tv_sec)) + ((double) (timer[1].tv_usec - timer[0].tv_usec) / 1000000.0);
rate = (double) SRAM_BUF_SZ_KB / 1024.0 / tdiff;
printf("ARM Host --> eCore(0,0) write spead = %7.2f MB/s\n", rate);
gettimeofday(&timer[0], NULL);
e_read(pEpiphany, 0, 0, (off_t) 0, sbuf, SRAM_BUF_SZ);
gettimeofday(&timer[1], NULL);
tdiff = ((double) (timer[1].tv_sec - timer[0].tv_sec)) + ((double) (timer[1].tv_usec - timer[0].tv_usec) / 1000000.0);
rate = (double) SRAM_BUF_SZ_KB / 1024.0 / tdiff;
printf("ARM Host --> eCore(0,0) read spead = %7.2f MB/s\n", rate);
return 0;
}
int main(int argc, char *argv[]){
e_epiphany_t dev;
unsigned int write_buffer[N];
int i;
for (i=0; i<N; i++){
write_buffer[i] = 0x12345678;
}
//Open
e_init(NULL);
e_reset_system();
e_open(&dev, 0, 0, 1, 1);
e_write(&dev, 0, 0, 0, &write_buffer, N*sizeof(int));
e_close(&dev);
e_finalize();
printf("TEST \"e-write-buf\" PASSED\n");
return EXIT_SUCCESS;
}
static int
epiphany_run(struct epiphany_state *state, int iter, int mode)
{
e_epiphany_t *dev = &state->dev;
uint32_t cmd;
/* Go ! */
cmd = (mode << 31) | (state->logN << 24) | iter;
e_write(dev, 0, 0, CMD, &cmd, sizeof(uint32_t));
/* Poll for end */
while (cmd) {
e_read(dev, 0, 0, CMD, &cmd, sizeof(uint32_t));
usleep(1000);
}
e_read(dev, 0, 0, CMD + 4, &cmd, sizeof(uint32_t));
printf("(%d cycles)\n", cmd);
return cmd;
}
int ERAM_speed(){
double tdiff, rate;
gettimeofday(&timer[0], NULL);
e_write(pERAM, 0, 0, (off_t) 0, ebuf, ERAM_BUF_SZ);
gettimeofday(&timer[1], NULL);
tdiff = ((double) (timer[1].tv_sec - timer[0].tv_sec)) + ((double) (timer[1].tv_usec - timer[0].tv_usec) / 1000000.0);
rate = (double) ERAM_BUF_SZ_MB / tdiff;
printf("ARM Host --> ERAM write speed = %7.2f MB/s\n", rate);
gettimeofday(&timer[0], NULL);
e_read(pERAM, 0, 0, (off_t) 0, ebuf, ERAM_BUF_SZ);
gettimeofday(&timer[1], NULL);
tdiff = ((double) (timer[1].tv_sec - timer[0].tv_sec)) + ((double) (timer[1].tv_usec - timer[0].tv_usec) / 1000000.0);
rate = (double) ERAM_BUF_SZ_MB / tdiff;
printf("ARM Host <-- ERAM read speed = %7.2f MB/s\n", rate);
return 0;
}
int main () {
e_coreid_t coreid;
unsigned int row, col, core, trow, tcol, *ec;
volatile msg_block_t *msg = (msg_block_t *) BUF_ADDRESS;
e_ctimer_set(E_CTIMER_0, 0xffffffff);
e_ctimer_start(E_CTIMER_0, E_CTIMER_CLK);
ec = (unsigned int *) 0x4000;
*ec = 0;
coreid = e_get_coreid();
e_coords_from_coreid(coreid, &row, &col);
core = row*e_group_config.group_cols + col;
srand(msg->shared_msg[core].seed);
msg->shared_msg[core].seed = msg->shared_msg[core].seed + 10;
trow = ((core + 1) % E_GROUP_CORES) / e_group_config.group_rows;
tcol = (core + 1) % e_group_config.group_cols;
ec = e_get_global_address(trow, tcol, ec);
e_write(&e_group_config, &coreid, 0, 0, ec, sizeof(e_coreid_t));
/**ec = coreid;*/
msg->shared_msg[core].msg = e_coreid_from_coords(trow, tcol);
msg->shared_msg[core].external = *(unsigned int *) 0x4000;
/* Sync */
e_wait(E_CTIMER_1, 2000);
msg->shared_msg[core].timer = 0xffffffff - e_ctimer_get(E_CTIMER_0);
msg->shared_msg[core].coreid = coreid;
e_ctimer_stop(E_CTIMER_0);
return 0;
}
// Call (invoke) the fft2d() function
int fft2d_go(e_mem_t *pDRAM)
{
unsigned int addr;
size_t sz;
// Wait until Epiphany is ready
addr = offsetof(shared_buf_t, core.ready);
Mailbox.core.ready = 0;
while (Mailbox.core.ready == 0)
e_read(pDRAM, 0, 0, addr, (void *) &(Mailbox.core.ready), sizeof(Mailbox.core.ready));
// Wait until cores finished previous calculation
addr = offsetof(shared_buf_t, core.go);
sz = sizeof(int64_t);
Mailbox.core.go = 1;
while (Mailbox.core.go != 0)
e_read(pDRAM, 0, 0, addr, (void *) (&Mailbox.core.go), sz);
// Signal cores to start crunching
Mailbox.core.go = 1;
addr = offsetof(shared_buf_t, core.go);
sz = sizeof(int64_t);
e_write(pDRAM, 0, 0, addr, (void *) (&Mailbox.core.go), sz);
// Wait until cores finished calculation
addr = offsetof(shared_buf_t, core.go);
sz = sizeof(int64_t);
Mailbox.core.go = 1;
while (Mailbox.core.go != 0)
e_read(pDRAM, 0, 0, addr, (void *) (&Mailbox.core.go), sz);
return 0;
}
int main(int argc, char* argv[]){
float *temp = (float*)malloc(sizeof(float)*SIZE);
float time;
struct timespec start, end;
e_platform_t platform;
e_epiphany_t dev;
e_init(nullptr);
e_reset_system();
e_get_platform_info(&platform);
e_open(&dev, 0, 0, 1, 1);
clock_gettime(CLOCK_REALTIME, &start);
for (int i = 0; i < 1000; i++){
#if WRITE
e_write(&dev, 0, 0, 0x0000, temp, sizeof(float)*SIZE);
#endif
#if !WRITE
e_read(&dev, 0, 0, 0x0000, temp, sizeof(float)*SIZE);
#endif
}
clock_gettime(CLOCK_REALTIME, &end);
time = (end.tv_sec - start.tv_sec) + (end.tv_nsec - start.tv_nsec)/BILLION;
printf("Gesamtzeit: %f s\n Bandbreite: %f MByte/s\n", time, 4*SIZE/(time / (2 * 1000))/(1024*1024));
e_reset_system();
return 0;
}
int main(int argc, char *argv[])
{
unsigned rows, cols, ncores, coreid, i, j;
const uint32_t one = 1, zero = 0;
int result[_MAX_CORES];
e_platform_t platform;
e_epiphany_t dev;
e_mem_t emem;
int fault, highest;
// initialize system, read platform params from
// default HDF. Then, reset the platform and
// get the actual system parameters.
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
// Allocate a buffer in shared external memory
// for message passing from eCore to host.
e_alloc(&emem, _BufOffset, _BufSize);
//open the workgroup
rows = platform.rows;
cols = platform.cols;
e_open(&dev, 0, 0, rows, cols);
//load the device program on the board
e_load_group("emain.srec", &dev, 0, 0, rows, cols, E_FALSE);
e_start_group(&dev);
usleep(100000);
ncores = rows * cols;
printf("num-cores = %4d\n", ncores);
fault = 0x0;
for (i=0; i < 0x10000; i++) {
/* Pause leader core so we can read without races */
e_write(&dev, 0, 0, 0x7000, &one, sizeof(one));
/* Lazily assume cores will be paused and writes from all cores
* to ERAM have propagated after below sleep. This must be
* calibrated w.r.t Epiphany chip clock frequency and delay
* cycles in the device code */
usleep(1000);
/* read the results */
e_read(&emem, 0, 0, 0x0, &result, ncores*sizeof(int));
/* Resume */
e_write(&dev, 0, 0, 0x7000, &zero, sizeof(zero));
highest = result[0];
for (j=0; j<ncores; j++) {
if (result[j] != result[0]) {
fault++;
if (highest < result[j])
highest = result[j];
}
}
/* Don't print every iteration */
if (i % 0x10)
continue;
printf("[%03x] ", i);
for (j=0; j<ncores; j++)
printf("%04x ", result[j]);
printf("\n");
if (highest >= NBARRIERS)
break;
/* Do a small wait so it is easy to see that the E cores are
* running independently. */
usleep(10000);
}
//print the success/error message duel to the number of fault
if (fault == 0)
printf("\ntest #20: Hardware Barrier Passed!\n");
else
printf("\ntest #20: Hardware Barrier Failed! Fault is 0x%08x!\n", fault);
e_close(&dev);
e_free(&emem);
e_finalize();
return fault != 0;
}
int main(int argc, char *argv[]){
//----------------------------
e_platform_t platform;
e_epiphany_t dev;
e_hal_diag_t e_verbose;
unsigned int i,j,k,addr;
unsigned int data;
int status=1;//pass
int row0,col0,rows,cols;
int verbose=0;
unsigned int high_pattern = 0xaaaaaaaa;
unsigned int low_pattern = 0x55555555;
unsigned int result;
if (argc < 5){
usage();
exit(1);
}
else{
row0 = atoi(argv[1]);
col0 = atoi(argv[2]);
rows = atoi(argv[3]);
cols = atoi(argv[4]);
}
//Open
e_init(NULL);
my_reset_system();
e_get_platform_info(&platform);
e_open(&dev, 0, 0, platform.rows, platform.cols);
printf("-------------------------------------------------------\n");
for (i=row0; i<(row0+rows); i++) {
for (j=col0; j<(col0+cols); j++) {
printf("Running host register file test for core (%d,%d)\n", i,j);
for(k=0;k<REGS;k++){
addr=0xF0000+k;
//high pattern
e_write(&dev, i, j, addr, &high_pattern, sizeof(int));
e_read(&dev, i, j, addr, &result, sizeof(int));
printf("res=%x\n",result);
if(result!=high_pattern){
status=0;
}
//low pattern
e_write(&dev, i, j, addr, &low_pattern, sizeof(int));
e_read(&dev, i, j, addr, &result, sizeof(int));
if(result!=low_pattern){
status=0;
}
}
}
}
//Close
e_close(&dev);
e_finalize();
//Self Check
if(status){
return EXIT_SUCCESS;
}
else{
return EXIT_FAILURE;
}
}
int my_reset_system()
{
unsigned int row,col,i,j,data;
e_epiphany_t dev;
e_platform_t platform;
e_init(NULL);
e_get_platform_info(&platform);
ee_write_esys(E_SYS_RESET, 0);//reset
usleep(200000);
//Open all cores
e_open(&dev, 0, 0, platform.rows, platform.cols);
//shut down north link
if(1){
row=0;
col=2;
ee_write_esys(E_SYS_CONFIG, 0x10000000);
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0304, &data, sizeof(int));
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0308, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//Shut down west link (WEST==2,0)
if(1){
row=2;
col=0;
ee_write_esys(E_SYS_CONFIG, 0xd0000000);
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0304, &data, sizeof(int));
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0308, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//Shut down south link (SOUTH==7,2)
if(1){
if ((dev.type == E_E64G401)){
row=7;
col=2;
}
else{
row=3;
col=2;
}
ee_write_esys(E_SYS_CONFIG, 0x90000000);
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0304, &data, sizeof(int));
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0308, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//Change elink clock divider (temporary workaround due to FPGA timing issue)
if(1){
//east link register is in a different place in e64
if ((dev.type == E_E64G401)){
row=2;
col=7;
}
else{
row=2;
col=3;
}
//Writing to the east ELINK transmit config register
ee_write_esys(E_SYS_CONFIG, 0x50000000);
data = 0x1;
e_write(&dev, row, col, 0xf0300, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//Reset chip one more time (west side))
if(0){
row=2;
col=0;
ee_write_esys(E_SYS_CONFIG, 0xd0000000);
data = 0x000000001;
e_write(&dev, row, col, 0xf0324, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//Enable Clock Gating
if(0){
for (i=0; i<platform.rows; i++) {
for (j=0; j<platform.cols; j++) {
//eCore clock gating
data=0x00400000;
e_write(&dev, i, j, 0xf0400, &data, sizeof(data));
//eMesh clock gating
data=0x00000002;
e_write(&dev, i, j, 0xf0700, &data, sizeof(data));
}
}
}
//Close down device
e_close(&dev);
return E_OK;
}
int main(int argc, char *argv[]){
e_platform_t platform;
e_epiphany_t dev;
unsigned int data,stage;
int i,j;
int row,col;
if(argc < 2){
usage();
exit;
}
else{
stage = atoi(argv[1]);
}
//Open device
//e_set_loader_verbosity(H_D2);
e_init(NULL);
e_get_platform_info(&platform);
e_open(&dev,0, 0, platform.rows, platform.cols);
//Reset the system
e_reset_system();
//---------------------------------------
//Shut down link (NORTH==0,2)
if(stage>0){
row=0;
col=2;
ee_write_esys(E_SYS_CONFIG, 0x10000000);
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0304, &data, sizeof(int));
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0308, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//---------------------------------------
//Shut down south link (SOUTH==7,2)
if(stage>1){
col=2;
if ((dev.type == E_E64G401)){
row=7;
}
else{
row=3;
}
ee_write_esys(E_SYS_CONFIG, 0x90000000);
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0304, &data, sizeof(int));
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0308, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//---------------------------------------
//Shut down west link (WEST==2,0)
if(stage>2){
row=2;
col=0;
ee_write_esys(E_SYS_CONFIG, 0xd0000000);
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0304, &data, sizeof(int));
data = 0x000000FFF;
e_write(&dev, row, col, 0xf0308, &data, sizeof(int));
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
//---------------------------------------
if(stage>4){
//Configuring clock divider(EAST==2,7)
row=2;
if ((dev.type == E_E64G401)){
col=7;
}
else{
col=3;
}
ee_write_esys(E_SYS_CONFIG, 0x50000000);
//Change clock divider to solve FPGA receiver speed path
data = 0x1;
e_write(&dev, row, col, 0xf0300, &data, sizeof(int));
//Up the current drive on the wait signal
//data = 0x02000000;
//e_write(&dev, 0, 0, 0xf0304, &data, sizeof(int));
//Return to normal mode
ee_write_esys(E_SYS_CONFIG, 0x00000000);
}
if(stage>3){
//Enable clock gating
for (i=0; i<platform.rows; i++) {
for (j=0; j<platform.cols; j++) {
//eCore clock gating
data=0x00400000;
e_write(&dev, i, j, 0xf0400, &data, sizeof(data));
//eMesh clock gating
data=0x00000002;
e_write(&dev, i, j, 0xf0700, &data, sizeof(data));
}
}
}
if(stage>5){
//Enable timeout
ee_write_esys(E_SYS_CONFIG, 0x00000001);
}
//-------------------------------------------------------
e_close(&dev);
e_finalize();
return 0;
}
int main(int argc, char *argv[])
{
e_epiphany_t Epiphany, *pEpiphany;
e_mem_t DRAM, *pDRAM;
unsigned int msize;
int row, col, cnum;
ILuint ImgId;
// ILenum Error;
ILubyte *imdata;
ILuint imsize, imBpp;
unsigned int addr;
size_t sz;
struct timespec timer[4];
uint32_t time_p[TIMERS];
uint32_t time_d[TIMERS];
FILE *fo;
// FILE *fi;
int result;
pEpiphany = &Epiphany;
pDRAM = &DRAM;
msize = 0x00400000;
//get_args(argc, argv);
strcpy(ar.ifname,argv[1]);
strcpy(ar.elfFile,argv[2]);
strcpy(ar.ofname, ar.ifname);
printf("------------------------------------------------------------\n");
fo = fopen("matprt.m", "w");
if ((fo == NULL)) // || (fi == NULL))
{
fprintf(stderr, "Could not open Octave file \"%s\" ...exiting.\n", "matprt.m");
exit(4);
}
// fo = stderr;
// Connect to device for communicating with the Epiphany system
// Prepare device
e_set_host_verbosity(ar.verbose);
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
if (e_open(pEpiphany, 0, 0, platform.rows, platform.cols))
{
fprintf(fo, "\nERROR: Can't establish connection to Epiphany device!\n\n");
exit(1);
}
if (e_alloc(pDRAM, 0x00000000, msize))
{
fprintf(fo, "\nERROR: Can't allocate Epiphany DRAM!\n\n");
exit(1);
}
// Initialize Epiphany "Ready" state
addr = offsetof(shared_buf_t, core.ready);
Mailbox.core.ready = 0;
e_write(pDRAM, 0, 0, addr, (void *) &(Mailbox.core.ready), sizeof(Mailbox.core.ready));
result = e_load_group(ar.elfFile, pEpiphany, 0, 0, platform.rows, platform.cols, (e_bool_t) (ar.run_target));
if (result == E_ERR) {
printf("Error loading Epiphany program.\n");
exit(1);
}
// Check if the DevIL shared lib's version matches the executable's version.
if (ilGetInteger(IL_VERSION_NUM) < IL_VERSION)
{
fprintf(stderr, "DevIL version is different ...exiting!\n");
exit(2);
}
// Initialize DevIL.
ilInit();
#ifdef ILU_ENABLED
iluInit();
#endif
// create the coreID list
init_coreID(pEpiphany, coreID, _Nside, _Nside, 0x808);
// Generate the main image name to use, bind it and load the image file.
ilGenImages(1, &ImgId);
ilBindImage(ImgId);
if (!ilLoadImage(ar.ifname))//ar.ifname
{
fprintf(stderr, "Could not open input image file \"%s\" ...exiting.\n", ar.ifname);
exit(3);
}
// Display the image's dimensions to the end user.
/*
printf("Width: %d Height: %d Depth: %d Bpp: %d\n\n",
ilGetInteger(IL_IMAGE_WIDTH),
ilGetInteger(IL_IMAGE_HEIGHT),
ilGetInteger(IL_IMAGE_DEPTH),
ilGetInteger(IL_IMAGE_BITS_PER_PIXEL));
*/
imdata = ilGetData();
imsize = ilGetInteger(IL_IMAGE_WIDTH) * ilGetInteger(IL_IMAGE_HEIGHT);
imBpp = ilGetInteger(IL_IMAGE_BYTES_PER_PIXEL);
if (imsize != (_Sfft * _Sfft))
{
printf("Image file size is different from %dx%d ...exiting.\n", _Sfft, _Sfft);
exit(5);
}
// Extract image data into the A matrix.
for (unsigned int i=0; i<imsize; i++)
{
Mailbox.A[i] = (float) imdata[i*imBpp] + 0.0 * I;
}
fprintf(fo, "\n");
// Generate operand matrices based on a provided seed
matrix_init(0);
#ifdef _USE_DRAM_
// Copy operand matrices to Epiphany system
addr = DRAM_BASE + offsetof(shared_buf_t, A[0]);
sz = sizeof(Mailbox.A);
fprintf(fo, "%% Writing A[%ldB] to address %08x...\n", sz, addr);
e_write(addr, (void *) Mailbox.A, sz);
addr = DRAM_BASE + offsetof(shared_buf_t, B[0]);
sz = sizeof(Mailbox.B);
fprintf(fo, "%% Writing B[%ldB] to address %08x...\n", sz, addr);
e_write(addr, (void *) Mailbox.B, sz);
#else
// Copy operand matrices to Epiphany cores' memory
fprintf(fo, "%% Writing image to Epiphany\n");
sz = sizeof(Mailbox.A) / _Ncores;
for (row=0; row<(int) platform.rows; row++)
for (col=0; col<(int) platform.cols; col++)
{
addr = BankA_addr;
fflush(stdout);
cnum = e_get_num_from_coords(pEpiphany, row, col);
// printf( "Writing A[%uB] to address %08x...\n", sz, addr);
fprintf(fo, "%% Writing A[%uB] to address %08x...\n", sz, (coreID[cnum] << 20) | addr);
fflush(fo);
e_write(pEpiphany, row, col, addr, (void *) &Mailbox.A[cnum * _Score * _Sfft], sz);
}
#endif
// Call the Epiphany fft2d() function
fprintf(fo, "%% GO!\n");
fflush(stdout);
fflush(fo);
clock_gettime(CLOCK_MONOTONIC, &timer[0]);
fft2d_go(pDRAM);
clock_gettime(CLOCK_MONOTONIC, &timer[1]);
fprintf(fo, "%% Done!\n\n");
fflush(stdout);
fflush(fo);
// Read time counters
// printf( "Reading time count...\n");
fprintf(fo, "%% Reading time count...\n");
addr = 0x7128+0x4*2 + offsetof(core_t, time_p[0]);
sz = TIMERS * sizeof(uint32_t);
e_read(pEpiphany, 0, 0, addr, (void *) (&time_p[0]), sz);
// for (int i=0; i<TIMERS; i++)
// printf("time_p[%d] = %u\n", i, time_p[i]);
time_d[2] = time_p[7] - time_p[2]; // FFT setup
time_d[3] = time_p[2] - time_p[3]; // bitrev (x8)
time_d[4] = time_p[3] - time_p[4]; // FFT-1D (x8)
time_d[5] = time_p[4] - time_p[5]; // corner-turn
time_d[6] = time_p[7] - time_p[8]; // FFT-2D
time_d[7] = time_p[6] - time_p[7]; // LPF
time_d[9] = time_p[0] - time_p[9]; // Total cycles
fprintf(fo, "%% Finished calculation in %u cycles (%5.3f msec @ %3.0f MHz)\n\n", time_d[9], (time_d[9] * 1000.0 / eMHz), (eMHz / 1e6));
printf( "FFT2D - %7u cycles (%5.3f msec)\n", time_d[6], (time_d[6] * 1000.0 / eMHz));
printf( " FFT Setup - %7u cycles (%5.3f msec)\n", time_d[2], (time_d[2] * 1000.0 / eMHz));
printf( " BITREV - %7u cycles (%5.3f msec)\n", time_d[3], (time_d[3] * 1000.0 / eMHz));
printf( " FFT1D - %7u cycles (%5.3f msec x2)\n", time_d[4], (time_d[4] * 1000.0 / eMHz));
printf( " Corner Turn - %7u cycles (%5.3f msec)\n", time_d[5], (time_d[5] * 1000.0 / eMHz));
printf( "LPF - %7u cycles (%5.3f msec)\n", time_d[7], (time_d[7] * 1000.0 / eMHz));
fprintf(fo, "%% Reading processed image back to host\n");
// Read result matrix
#ifdef _USE_DRAM_
addr = DRAM_BASE + offsetof(shared_buf_t, B[0]);
sz = sizeof(Mailbox.B);
printf( "Reading B[%ldB] from address %08x...\n", sz, addr);
fprintf(fo, "%% Reading B[%ldB] from address %08x...\n", sz, addr);
blknum = sz / RdBlkSz;
remndr = sz % RdBlkSz;
for (i=0; i<blknum; i++)
{
fflush(stdout);
e_read(addr+i*RdBlkSz, (void *) ((long unsigned)(Mailbox.B)+i*RdBlkSz), RdBlkSz);
}
fflush(stdout);
e_read(addr+i*RdBlkSz, (void *) ((long unsigned)(Mailbox.B)+i*RdBlkSz), remndr);
#else
// Read result matrix from Epiphany cores' memory
sz = sizeof(Mailbox.A) / _Ncores;
for (row=0; row<(int) platform.rows; row++)
for (col=0; col<(int) platform.cols; col++)
{
addr = BankA_addr;
fflush(stdout);
cnum = e_get_num_from_coords(pEpiphany, row, col);
// printf( "Reading A[%uB] from address %08x...\n", sz, addr);
fprintf(fo, "%% Reading A[%uB] from address %08x...\n", sz, (coreID[cnum] << 20) | addr);
fflush(fo);
e_read(pEpiphany, row, col, addr, (void *) &Mailbox.B[cnum * _Score * _Sfft], sz);
}
#endif
// Convert processed image matrix B into the image file date.
for (unsigned int i=0; i<imsize; i++)
{
for (unsigned int j=0; j<imBpp; j++)
imdata[i*imBpp+j] = cabs(Mailbox.B[i]);
}
// Save processed image to the output file.
ilEnable(IL_FILE_OVERWRITE);
if (!ilSaveImage(ar.ofname))
{
fprintf(stderr, "Could not open output image file \"%s\" ...exiting.\n", ar.ofname);
exit(7);
}
// We're done with the image, so let's delete it.
ilDeleteImages(1, &ImgId);
// Simple Error detection loop that displays the Error to the user in a human-readable form.
// while ((Error = ilGetError()))
// PRINT_ERROR_MACRO;
// Close connection to device
if (e_close(pEpiphany))
{
fprintf(fo, "\nERROR: Can't close connection to Epiphany device!\n\n");
exit(1);
}
if (e_free(pDRAM))
{
fprintf(fo, "\nERROR: Can't release Epiphany DRAM!\n\n");
exit(1);
}
fflush(fo);
fclose(fo);
//Returnin success if test runs expected number of clock cycles
//Need to add comparison with golden reference image!
printf("------------------------------------------------------------\n");
if(time_d[9]>50000) {
printf( "TEST \"fft2d\" PASSED\n");
return EXIT_SUCCESS;
}
else {
printf( "TEST \"fft2d\" FAILED\n");
return EXIT_FAILURE;
}
}
int main(int argc, char *argv[])
{
printf("[Started]\n");
srand(time(NULL));
for (int i = 0; i < N; ++i) {
input[i] = rand() % 10;
}
printf("Input:");
for (int i = 0; i < N; ++i) {
printf(" %"PRIu32, input[i]);
}
puts("");
////////////////////////////////////////////////////////////////////////////////
e_platform_t platform;
e_epiphany_t group;
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
e_open(&group, 0, 0, 1, 3);
e_reset_group(&group);
e_load("core0.elf", &group, 0, 0, E_FALSE);
e_load("core1.elf", &group, 0, 1, E_FALSE);
// -- fetch d0 (0, 9) input
// to bank1 of core 0
e_write(&group, 0, 0, d0, input, N * sizeof(uint32_t));
// -- onCore 0 (f d0 d1)
printf("Running f on core 0\n");
e_start(&group, 0, 0);
// should poll until finish (maybe a software interrupt later?)
usleep(1000);
// -- onCore 1 (g d1 d2)
printf("Running g on core 1\n");
e_start(&group, 0, 1);
// should poll until finish (maybe a software interrupt later?)
usleep(1000);
// -- flush d2 (0, 9) output
// from bank1 of core 2
e_read(&group, 0, 2, d2, output, N * sizeof(uint32_t));
e_close(&group);
e_finalize();
////////////////////////////////////////////////////////////////////////////////
printf("Output:");
for (int i = 0; i < N; ++i) {
printf(" %"PRIu32, output[i]);
}
puts("");
printf("[Finished]\n");
return EXIT_SUCCESS;
}
/*
* Main entry
*/
int main(int argc, char * argv[]) {
// Arguments handling
switch(argc) {
case 4: nb_cores = atoi(argv[3]);
case 3: sub_iteration = atoi(argv[2]);
case 2: main_iteration = atoi(argv[1]);
case 1: break;
default:
printf("Wrong number of args\nUsage: ./main.elf [main iterations] [sub iteration] [nb cores]\n");
return 0;
}
// Init the epiphany platform
e_platform_t platform;
e_epiphany_t dev;
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
e_open(&dev, 0, 0, 4, 4);
e_load_group("emain.srec", &dev, 0, 0, 4, 4, E_FALSE); // don't start immediately
e_start_group(&dev); // Start workgroup
unsigned ncores = nb_cores; if(ncores>16) exit(0);
unsigned k;
for(k = 0; k < ncores; k++) {
e_write(&dev, k/4, k%4, 0x400c, &sub_iteration, sizeof(unsigned));
}
// >>>>> Begin benchamrk
float start_t = second();
unsigned i,j;
float res = 0;
unsigned go = 1;
unsigned free_not_found = 1;
i = j = 0;
for(; i < main_iteration; i++) {
free_not_found = 1;
while(free_not_found) {
unsigned state;
e_read(&dev, j/4, j%4, 0x4008, &state, sizeof(unsigned));
if(state == 0) { // 1 busy, 0 free
float temp_res;
e_read(&dev, j/4, j%4, 0x4004, &temp_res, sizeof(float));
res += temp_res;
unsigned instruction = i; // copy i
e_write(&dev, j/4, j%4, 0x4000, &instruction, sizeof(unsigned));
e_write(&dev, j/4, j%4, 0x4008, &go, sizeof(unsigned));
free_not_found = 0;
}
j = (++j)%ncores;
}
}
// Be sure not to leave a core still working
for(j = 0; j < ncores; j++) {
unsigned state;
e_read(&dev, j/4, j%4, 0x4008, &state, sizeof(unsigned));
while(state == 1) {
e_read(&dev, j/4, j%4, 0x4008, &state, sizeof(unsigned));
}
float temp_res;
e_read(&dev, j/4, j%4, 0x4004, &temp_res, sizeof(float));
res += temp_res;
}
res *= 4;
float end_t = second();
// <<<<< End benchmark
float spent_t = end_t - start_t;
#ifdef STAT
printf("%i,\t%i,\t%f, \t%f\n", main_iteration, sub_iteration, spent_t, res);
#else
printf("PI = %f\ttime spent %fs\n", res, spent_t);
#endif
return 0;
}
void ProcessRecords(unsigned int *distances, unsigned int *identifiers, unsigned int count, unsigned int query, unsigned int shutdown) {
/*
* ----------------------------- On the ARM SoC ------------------------------
* DRAM heap region layout:
*
* This is the higher 16 MB of shared dram (0x3e000000-0x3fffffff and 0x8e000000-0x8fffffff).
* The higher 16 MB are at 0x3f000000-0x3fffffff and 0x8f000000-0x8fffffff.
* Do not use the lower 16 MB. Some Code/Stack stuff gets put there.
*
* All addresses listed below are offsets in shared dram:
* (i.e. since we are using the higher 16 MB, they are in 0x01000000-0x01ffffff)
*
* We have 16MB of (heap) space to do with what we please.
*
* Shared Heap Memory: (Have 16 MB of usable space)
* Records to be processed (after doing hash lookups) : 0x01000000-0x01ffefff
* This is space for (16 MB - 4 KB) / 1 KB = (16 K - 4) = 16380 records.
* Need space for 16 * 16 = 256 records in shared heap memory at a time.
* This is only 256 KB.
*
* Metadata: (Need 4 KB of space)
* Query Record : 1024 B = 0x400 : 0x01fff000-0x01fff3ff
* Distance arrays : 16 cores * 16 * 4 = 1024 B = 0x400 : 0x01fff400-0x01fff7ff
* Counts : 16 cores * 4 = 64 B = 0x040 : 0x01fff800-0x01fff83f
* Done flags : 16 cores * 4 = 64 B = 0x040 : 0x01fff840-0x01fff87f
* Free space : : 0x01fff880-0x01ffffff
*
*
* -------------------------- In each Epiphany Core --------------------------
* SRAM layout:
*
* 0x0000-0x1fff : 8 KB : Bank 0, used for IVT, Code. Do not use. :
* 0x2000-0x3fff : 8 KB : Bank 1, used for input data on DMA channel 0. : (Input, Pulled by core via DMA)
* 0x4000-0x5fff : 8 KB : Bank 2, used for input data on DMA channel 1. : (Input, Pulled by core via DMA)
* 0x6000-0x7fff : 8 KB : Bank 3, used for metadata and the Stack. :
* 0x6000-0x63ff : 1 KB : The query record. 1024 Bytes. : (Input, Pulled by core via DMA)
* 0x6400-0x643f : 64 B : The distance array (as 16 unsigned ints). : (Output, Pushed by core via DMA)
* 0x6440-0x6443 : : Start flag (unsigned int). : (Input, Written by ARM)
* 0x6444-0x6447 : : ID (unsigned int). : (Input, Written by ARM)
*
*/
unsigned int *dist_base;
unsigned int *distp;
unsigned int *done_flags;
unsigned int *dflag;
unsigned int *countp;
unsigned int *id;
void *heap_addr;
void *query_addr;
off_t record_offset;
unsigned int i;
unsigned int start = ONE;
unsigned int core;
unsigned row;
unsigned col;
unsigned int counts[16];
unsigned int divcount;
unsigned int modcount;
id = identifiers;
dist_base = (unsigned int *) ((void *) membuf.base + DISTANCE_ARRAYS_BASE);
done_flags = (unsigned int *) ((void *) membuf.base + DONE_FLAGS_BASE);
countp = (unsigned int *) ((void *) membuf.base + COUNTS_BASE);
heap_addr = (void *) membuf.base + HEAP_BUFFER_ADDR;
query_addr = (void *) membuf.base + QUERY_RECORD_ADDR;
for (core = ZERO; core < SIXTEEN; ++core) {
*(done_flags + core) = ZERO;
//printf("Wrote %u to address %X\n", ZERO, (unsigned int) dflag);
//fflush(stdout);
}
divcount = count / SIXTEEN;
core = count % SIXTEEN;
for (i = ZERO; i < core; ++i) {
counts[i] = divcount + ONE;
}
for (i = core; i < SIXTEEN; ++i) {
counts[i] = divcount;
}
/*for (i = ZERO; i < SIXTEEN; ++i) {
printf("counts[%u] = %u\n", i, counts[i]);
fflush(stdout);
}*/
for (core = ZERO; core < SIXTEEN; ++core) {
//printf("Writing %u to address %X\n", counts[core], (unsigned int) countp);
*countp++ = counts[core];
}
record_offset = (query - 1) * 0x400;
fseek(records_file, record_offset, SEEK_SET);
fread(query_addr, 0x400, ONE, records_file);
//printf("Set query record %u in shared memory.\n", *((unsigned int *) query_addr));
//fflush(stdout);
//printf("query = %u\n", query);
//printf("count = %u\n", count);
while (count > TWOFIFTYSIX) {
for (core = ZERO; core < SIXTEEN; ++core) {
for (i = ZERO; i < SIXTEEN; ++i) {
//if (i == ZERO) printf("Reading record %d, destined for core %d\n", i, core);
record_offset = (*id++ - ONE) * 0x400;
fseek(records_file, record_offset, SEEK_SET);
fread(heap_addr, 0x400, ONE, records_file);
heap_addr += 0x400;
}
//printf("Starting core %u\n", core);
row = core / 4;
col = core % 4;
e_write(&EpiphanyGpu, row, col, LOCAL_START_FLAG_ADDR, &start, sizeof(unsigned int));
}
fflush(stdout);
for (core = ZERO; core < SIXTEEN; ++core) {
distp = dist_base + core * SIXTEEN;
dflag = done_flags + core;
while (*dflag == ZERO);
*dflag = ZERO;
//printf("Recording results from core %d\n", core);
for (i = ZERO; i < SIXTEEN; ++i) {
*distances++ = *distp++;
}
}
count -= 256;
}
divcount = count / SIXTEEN;
modcount = count % SIXTEEN;
//printf("divcount = %u\n", divcount);
//printf("modcount = %u\n", modcount);
//printf("start = %u\n", start);
for (core = ZERO; core < modcount; ++core) {
for (i = ZERO; i <= divcount; ++i) {
//printf("About to read record %u from file offset %u\n", *id, (*id - ONE) * 0x400);
record_offset = (*id++ - ONE) * 0x400;
fseek(records_file, record_offset, SEEK_SET);
fread(heap_addr, 0x400, ONE, records_file);
//printf("Read record into shared memory address %u\n", (unsigned int) heap_addr);
//printf("Hamming distance is %u\n", hamming_dist(heap_addr, query_addr));
heap_addr += 0x400;
}
heap_addr += (SIXTEEN - divcount - ONE) * 0x400;
row = core / 4;
col = core % 4;
e_write(&EpiphanyGpu, row, col, LOCAL_START_FLAG_ADDR, &start, sizeof(unsigned int));
//printf("Wrote start signal (%u) to core %u (%u, %u)\n", start, core, row, col);
}
for (core = modcount; core < SIXTEEN; ++core) {
for (i = ZERO; i < divcount; ++i) {
//printf("About to read record %u from file offset %u\n", *id, (*id - ONE) * 0x400);
record_offset = (*id++ - ONE) * 0x400;
fseek(records_file, record_offset, SEEK_SET);
fread(heap_addr, 0x400, ONE, records_file);
//printf("Read record into shared memory address %X\n", (unsigned int) heap_addr);
//printf("Hamming distance is %u\n", hamming_dist(heap_addr, query_addr));
heap_addr += 0x400;
}
heap_addr += (SIXTEEN - divcount) * 0x400;
row = core / 4;
col = core % 4;
e_write(&EpiphanyGpu, row, col, LOCAL_START_FLAG_ADDR, &start, sizeof(unsigned int));
//printf("Wrote start signal (%u) to core %u (%u, %u)\n", start, core, row, col);
}
//printf("About to read distance results\n");
for (core = ZERO; core < SIXTEEN; ++core) {
distp = dist_base + core * SIXTEEN;
dflag = done_flags + core;
//printf("Going to be reading done flag at address %X\n", (unsigned int) dflag);
while (*dflag == ZERO);
/*while (*dflag == ZERO) {
printf("Sleeping while waiting for core %u...\n", core);
fflush(stdout);
usleep(500000);
}*/
*dflag = ZERO;
//printf("Recording results from core %d\n", core);
//printf("Distance result: %u\n", *distp);
if (core < modcount) {
for (i = ZERO; i <= divcount; ++i) {
*distances++ = *distp++;
}
} else {
for (i = ZERO; i < divcount; ++i) {
*distances++ = *distp++;
}
}
}
if (shutdown == ONE) start = EIGHT;
for (core = ZERO; core < SIXTEEN; ++core) {
row = core / 4;
col = core % 4;
e_write(&EpiphanyGpu, row, col, LOCAL_START_FLAG_ADDR, &start, sizeof(unsigned int));
}
//usleep(100000);
/*
for (core = ZERO; core < SIXTEEN; ++core) {
dflag = done_flags + core;
printf("Core %u: 0x%X\n", core, *dflag);
}
*/
return;
}
int main(int argc, char *argv[])
{
unsigned row, col, coreid, i, j, k;
e_platform_t platform;
e_epiphany_t dev;
e_mem_t emem;
unsigned time;
unsigned time1;
unsigned signal = 0xdeadbeef;
row = mas_row;
col = mas_col;
srand(1);
// initialize system, read platform params from
// default HDF. Then, reset the platform and
// get the actual system parameters.
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
// Open a workgroup
e_open(&dev, 0, 0, platform.rows, platform.cols);
// Load the device program onto core
e_load("e_mesh_wait_r.srec", &dev, mas_row, mas_col, E_TRUE);
usleep(10000);
// Let other cores know the core id of the specific core
for(i=0; i<platform.rows; i++)
{
for(j=0; j<platform.cols; j++)
{
e_write(&dev, i, j, 0x6000, &row, sizeof(row));
e_write(&dev, i, j, 0x6004, &col, sizeof(col));
}
}
//for (i=0; i<(platform.rows-2); i++)
//{
// for(j=0; j<(platform.cols-2); j++)
// {
// if((i!=mas_row)|(j!=mas_col))
// {
e_load("e_mesh_wait.srec",&dev, mas_row, mas_col+1, E_TRUE);
e_load("e_mesh_wait.srec",&dev, mas_row+1, mas_col, E_TRUE);
// }
// }
//}
usleep(10000);
// Sent the signal to start transfer
e_write(&dev, mas_row, mas_col, 0x6100, &signal, sizeof(signal));
usleep(1000000);
// Read message from shared buffer
e_read(&dev, mas_row, mas_col, 0x5000, &time, sizeof(time));
e_read(&dev, mas_row, mas_col+1, 0x7000, &time1, sizeof(time1));
// Print the message and close the workgroup.
fprintf(stderr, "0x%08x\n", time);
fprintf(stderr, "0x%08x\n", time1);
// Close the workgroup
e_close(&dev);
// Release the allocated buffer and finalize the
// e-platform connection.
e_free(&emem);
e_finalize();
return 0;
}
int main(int argc, char *argv[])
{
unsigned row, col, coreid, i, j, k, m, q, mode, signal;
e_platform_t platform;
e_epiphany_t dev;
unsigned desired, real;
unsigned time[16][13];
unsigned flag[platform.rows*platform.cols];
row = mas_row;
col = mas_col;
signal = 0xdeadbeef;
// For dma copy, define the number of desired transaction
desired = 0x3c00;
// Initialize flag
for(i=0; i<platform.rows*platform.cols; i++)
{
flag[i] = 0;
}
srand(1);
// initialize system, read platform params from
// default HDF. Then, reset the platform and
// get the actual system parameters.
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
// Open a workgroup
e_open(&dev, 0, 0, platform.rows, platform.cols);
// Let other cores know the core id of the specific core
for(i=0; i<platform.rows; i++)
{
for(j=0; j<platform.cols; j++)
{
if((i!=mas_row)|(j!=mas_col))
{
e_write(&dev, i, j, 0x5000, &row, sizeof(row));
e_write(&dev, i, j, 0x5004, &col, sizeof(col));
}
}
}
// Load device program onto the receiver
e_load("e_mesh_receiver.srec",&dev, mas_row, mas_col, E_TRUE);
// Load device program onto the transmitter
for (i=0; i<(platform.rows); i++)
{
for(j=0; j<(platform.cols); j++)
{
if((i!=mas_row)|(j!=mas_col))
{
e_load("e_mesh_transmitter.srec",&dev, i, j, E_TRUE);
}
}
}
// Wait for all cores to initialize
usleep(1000);
for(q=0; q<13; q++)
{
// Select the mesh event
mode = q;
// Tell each core the mesh event
for (i=0; i<(platform.rows); i++)
{
for(j=0; j<(platform.cols); j++)
{
e_write(&dev, i, j, 0x5400, &mode, sizeof(mode));
}
}
usleep(10000);
// Send the start signal to receiver core
e_write(&dev, mas_row, mas_col, 0x5100, &signal, sizeof(signal));
usleep(500000);
}
// Read from mailbox of all the cores
for(i=0; i<platform.rows; i++)
{
for(j=0; j<platform.cols; j++)
{
for(k=0; k<13; k++)
{
e_read(&dev, i, j, (0x6000+k*4), &time[i*platform.cols+j][k], sizeof(real));
}
}
}
// Test if the results make sense
real = time[mas_row*platform.cols+mas_col][8]+time[mas_row*platform.cols+mas_col][9]+
time[mas_row*platform.cols+mas_col][10]+time[mas_row*platform.cols+mas_col][11]-
time[(mas_row-1)*platform.cols+mas_col][0]-time[(mas_row)*platform.cols+mas_col-1][0]-
time[(mas_row)*platform.cols+mas_col+1][0]-time[(mas_row+1)*platform.cols+mas_col][0];
if ((real < (unsigned)desired * 1.1) && (real > (unsigned)desired * 0.1))
{
fprintf(stderr, "PASS for verification!\n");
}else
{
fprintf(stderr, "FAIL for verification!\n");
}
// Close the workgroup
e_close(&dev);
// Finalize the e-platform connection.
e_finalize();
return 0;
}
int main(int argc, char *argv[])
{
unsigned row, col, coreid, i, j, m, n, k;
e_platform_t platform;
e_epiphany_t dev;
unsigned flag;
int err = 0;
srand(1);
// initialize system, read platform params from
// default HDF. Then, reset the platform and
// get the actual system parameters.
e_init(NULL);
e_reset_system();
e_get_platform_info(&platform);
// Allocate a buffer in shared external memory
// for message passing from eCore to host.
//e_alloc(&emem, _BufOffset, _BufSize);
// Open a workgroup
e_open(&dev, 0, 0, platform.rows, platform.cols);
// Load the device program onto receiver core (1,1) and transmitter core (2,1)
e_load("e_dma_slave_test.srec", &dev, r_row, r_col, E_FALSE);
e_load("e_dma_slave_test1.srec", &dev, t_row, t_col, E_FALSE);
// Start the receiver core
row=r_row;
col=r_col;
coreid = (row + platform.row) * 64 + col + platform.col;
fprintf(stderr,"%3d: Message from eCore 0x%03x (%2d,%2d) : \n",(row*platform.cols+col),coreid,row,col);
// Tell transmitter the coordinate of receiver core
e_write(&dev, t_row, t_col, 0x6500, &row, sizeof(row));
e_write(&dev, t_row, t_col, 0x6504, &col, sizeof(col));
usleep(10000);
// Start device
e_start(&dev, r_row, r_col);
usleep(10000);
// Start the transmitter core
e_start(&dev, t_row, t_col);
// Wait for core program execution to finish
usleep(300000);
// Read message from the mailbox in transmitter core
e_read(&dev, t_row, t_col, 0x6100, &flag, sizeof(flag));
// Check if the result is right and print the message.
if(flag==(unsigned)0xffffffff)
{
fprintf(stderr, "PASS!\n");
}else
{
err = 1;
fprintf(stderr,"Fail!\n");
}
// Close the workgroup
e_close(&dev);
// Finalize the
// e-platform connection.
e_finalize();
return err;
}