static int enterprise_ar0832_ri_power_on(int is_stereo)
{
int ret = 0;
ret = enterprise_cam_pwr(CAM_REAR_RIGHT, true);
/* Release Reset */
if (is_stereo) {
gpio_set_value(CAM1_RST_L_GPIO, 1);
gpio_set_value(CAM2_RST_L_GPIO, 1);
} else
gpio_set_value(CAM1_RST_L_GPIO, 1);
/*
It takes 2400 EXTCLK for ar0832 to be ready for I2c.
EXTCLK is 10 ~ 24MHz. 1 ms should be enough to cover
at least 2400 EXTCLK within frequency range.
*/
enterprise_msleep(1);
return ret;
}
static int enterprise_ar0832_le_power_on(int is_stereo)
{
int ret = 0;
pr_info("%s: ++\n", __func__);
ret = enterprise_cam_pwr(CAM_REAR_LEFT, true);
/* Release Reset */
gpio_set_value(CAM2_RST_L_GPIO, 1);
/*
It takes 2400 EXTCLK for ar0832 to be ready for I2c.
EXTCLK is 10 ~ 24MHz. 1 ms should be enough to cover
at least 2400 EXTCLK within frequency range.
*/
enterprise_msleep(1);
/* CSI B is shared between Front camera and Rear Left camera */
gpio_set_value(CAM_CSI_MUX_SEL_GPIO, 1);
return ret;
}
/* I2C bus becomes active when vdd_1v8_cam is enabled */
static int enterprise_tps61050_pm(int pwr)
{
static struct regulator *enterprise_flash_reg = NULL;
int ret = 0;
pr_info("%s: ++%d\n", __func__, pwr);
switch (pwr) {
case TPS61050_PWR_OFF:
if (enterprise_flash_reg) {
regulator_disable(enterprise_flash_reg);
regulator_put(enterprise_flash_reg);
enterprise_flash_reg = NULL;
}
break;
case TPS61050_PWR_STDBY:
case TPS61050_PWR_COMM:
case TPS61050_PWR_ON:
enterprise_flash_reg = regulator_get(NULL, "vdd_1v8_cam");
if (IS_ERR_OR_NULL(enterprise_flash_reg)) {
pr_err("%s: failed to get flash pwr\n", __func__);
return PTR_ERR(enterprise_flash_reg);
}
ret = regulator_enable(enterprise_flash_reg);
if (ret) {
pr_err("%s: failed to enable flash pwr\n", __func__);
goto fail_regulator_flash_reg;
}
enterprise_msleep(10);
break;
default:
ret = -1;
}
return ret;
fail_regulator_flash_reg:
regulator_put(enterprise_flash_reg);
enterprise_flash_reg = NULL;
return ret;
}
