static void compare_properties(const void *fdt1, int offset1,
const void *fdt2, int offset2)
{
int offset = offset1;
/* Check the properties */
for (offset = fdt_first_property_offset(fdt1, offset1);
offset >= 0;
offset = fdt_next_property_offset(fdt1, offset)) {
const char *name;
int len1, len2;
const void *data1, *data2;
int i;
data1 = fdt_getprop_by_offset(fdt1, offset, &name, &len1);
if (!data1)
FAIL("fdt_getprop_by_offset(): %s\n",
fdt_strerror(len1));
verbose_printf("Property '%s'\n", name);
data2 = fdt_getprop(fdt2, offset2, name, &len2);
if (!data2) {
if (len2 == -FDT_ERR_NOTFOUND)
MISMATCH("Property '%s' missing\n", name);
else
FAIL("fdt_get_property(): %s\n",
fdt_strerror(len2));
}
verbose_printf("len1=%d data1=", len1);
for (i = 0; i < len1; i++)
verbose_printf(" %02x", ((const char *)data1)[i]);
verbose_printf("\nlen2=%d data2=", len2);
for (i = 0; i < len1; i++)
verbose_printf(" %02x", ((const char *)data2)[i]);
verbose_printf("\n");
if (len1 != len2)
MISMATCH("Property '%s' mismatched length %d vs. %d\n",
name, len1, len2);
else if (memcmp(data1, data2, len1) != 0)
MISMATCH("Property '%s' mismatched value\n", name);
}
}
static void __ft_tsec_fixup(void *blob, bd_t *bd, const char *alias,
int phy_addr)
{
const char *phy_type = "sgmii";
const u32 *ph;
int off;
int err;
off = fdt_path_offset(blob, alias);
if (off < 0) {
printf("WARNING: could not find %s alias: %s.\n", alias,
fdt_strerror(off));
return;
}
err = fdt_setprop(blob, off, "phy-connection-type", phy_type,
strlen(phy_type) + 1);
if (err) {
printf("WARNING: could not set phy-connection-type for %s: "
"%s.\n", alias, fdt_strerror(err));
return;
}
ph = (u32 *)fdt_getprop(blob, off, "phy-handle", 0);
if (!ph) {
printf("WARNING: could not get phy-handle for %s.\n",
alias);
return;
}
off = fdt_node_offset_by_phandle(blob, *ph);
if (off < 0) {
printf("WARNING: could not get phy node for %s: %s\n", alias,
fdt_strerror(off));
return;
}
phy_addr = cpu_to_fdt32(phy_addr);
err = fdt_setprop(blob, off, "reg", &phy_addr, sizeof(phy_addr));
if (err < 0) {
printf("WARNING: could not set phy node's reg for %s: "
"%s.\n", alias, fdt_strerror(err));
return;
}
}
static void adjust_memory_size(const void *fdt, Heap_Area *area)
{
int node;
node = fdt_path_offset_namelen(
fdt,
memory_path,
(int) sizeof(memory_path) - 1
);
if (node >= 0) {
int len;
const void *val;
uintptr_t begin;
uintptr_t size;
uintptr_t a_bit;
val = fdt_getprop(fdt, node, "reg", &len);
if (len == 8) {
begin = fdt32_to_cpu(((fdt32_t *) val)[0]);
size = fdt32_to_cpu(((fdt32_t *) val)[1]);
} else {
begin = 0;
size = 0;
}
/*
* Remove a bit to avoid problems with speculative memory accesses beyond
* the valid memory area.
*/
a_bit = 0x100000;
if (size >= a_bit) {
size -= a_bit;
}
if (
begin == 0
&& size > (uintptr_t) bsp_section_work_end
&& (uintptr_t) bsp_section_nocache_end
< (uintptr_t) bsp_section_work_end
) {
area->size += size - (uintptr_t) bsp_section_work_end;
}
}
}
/**
* fdt_getprop_u32_default_node - Return a node's property or a default
*
* @fdt: ptr to device tree
* @off: offset of node
* @cell: cell offset in property
* @prop: property name
* @dflt: default value if the property isn't found
*
* Convenience function to return a node's property or a default value if
* the property doesn't exist.
*/
u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
const char *prop, const u32 dflt)
{
const fdt32_t *val;
int len;
val = fdt_getprop(fdt, off, prop, &len);
/* Check if property exists */
if (!val)
return dflt;
/* Check if property is long enough */
if (len < ((cell + 1) * sizeof(uint32_t)))
return dflt;
return fdt32_to_cpu(*val);
}
fdt_addr_t fdtdec_get_addr(const void *blob, int node,
const char *prop_name)
{
const fdt_addr_t *cell;
int len;
//debug("%s: %s\n", __func__, prop_name);
cell = fdt_getprop(blob, node, prop_name, &len);
if (cell && (len == sizeof(fdt_addr_t) ||
len == sizeof(fdt_addr_t) * 2)) {
fdt_addr_t addr = fdt_addr_to_cpu(*cell);
//debug("%p\n", (void *)addr);
return addr;
}
//debug("(not found)\n");
return FDT_ADDR_T_NONE;
}
static int gpio_ich6_ofdata_to_platdata(struct udevice *dev)
{
struct ich6_bank_platdata *plat = dev_get_platdata(dev);
u16 gpiobase;
int offset;
gpiobase = gpio_ich6_get_base(PCI_CFG_GPIOBASE);
offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", -1);
if (offset == -1) {
debug("%s: Invalid register offset %d\n", __func__, offset);
return -EINVAL;
}
plat->base_addr = gpiobase + offset;
plat->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset,
"bank-name", NULL);
return 0;
}
/**
* fit_get_timestamp - get node timestamp property
* @fit: pointer to the FIT format image header
* @noffset: node offset
* @timestamp: pointer to the time_t, will hold read timestamp
*
* fit_get_timestamp() reads timestamp poperty from given node, if timestamp
* is found and has a correct size its value is retured in third call
* argument.
*
* returns:
* 0, on success
* -1, on property read failure
* -2, on wrong timestamp size
*/
int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp)
{
int len;
const void *data;
data = fdt_getprop(fit, noffset, FIT_TIMESTAMP_PROP, &len);
if (data == NULL) {
fit_get_debug(fit, noffset, FIT_TIMESTAMP_PROP, len);
return -1;
}
if (len != sizeof(uint32_t)) {
debug("FIT timestamp with incorrect size of (%u)\n", len);
return -2;
}
*timestamp = uimage_to_cpu(*((uint32_t *)data));
return 0;
}
enum usb_device_speed usb_get_maximum_speed(int node)
{
const void *fdt = gd->fdt_blob;
const char *max_speed;
int i;
max_speed = fdt_getprop(fdt, node, "maximum-speed", NULL);
if (!max_speed) {
pr_err("usb maximum-speed not found\n");
return USB_SPEED_UNKNOWN;
}
for (i = 0; i < ARRAY_SIZE(speed_names); i++)
if (!strcmp(max_speed, speed_names[i]))
return i;
return USB_SPEED_UNKNOWN;
}
enum usb_dr_mode usb_get_dr_mode(int node)
{
const void *fdt = gd->fdt_blob;
const char *dr_mode;
int i;
dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL);
if (!dr_mode) {
error("usb dr_mode not found\n");
return USB_DR_MODE_UNKNOWN;
}
for (i = 0; i < ARRAY_SIZE(usb_dr_modes); i++)
if (!strcmp(dr_mode, usb_dr_modes[i]))
return i;
return USB_DR_MODE_UNKNOWN;
}
int do_dtbinit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#ifdef CONFIG_OF_LIBFDT
int nodeoffset;
char* str;
char envstr[10];
u32 dt_addr;
if (getenv("dtbaddr") == NULL) {
#ifdef CONFIG_DTB_LOAD_ADDR
dt_addr = CONFIG_DTB_LOAD_ADDR;
#else
dt_addr = 0x0f000000;
#endif
}
else {
dt_addr = simple_strtoul (getenv ("dtbaddr"), NULL, 16);
}
if(fdt_check_header((void*)dt_addr)!= 0){
printf(" error: image data is not a fdt\n");
return -1;
}
nodeoffset = fdt_path_offset(dt_addr, "/mesonfb");
if(nodeoffset < 0) {
printf(" dts: not find node %s.\n",fdt_strerror(nodeoffset));
return -1;
}
str = fdt_getprop(dt_addr, nodeoffset, "display_size_default", NULL);
if(str == NULL){
printf("faild to get resolution\n");
}
else {
unsigned width = be32_to_cpup((u32*)str);
sprintf(envstr, "%u", width);
setenv("display_width", envstr);
unsigned height = be32_to_cpup((((u32*)str)+1));
sprintf(envstr, "%u", height);
setenv("display_height", envstr);
}
#endif
return 0;
}
/*
* Init codec
*
* @param blob FDT blob
* @param pi2s_tx i2s parameters required by codec
* @return int value, 0 for success
*/
static int codec_init(const void *blob, struct i2stx_info *pi2s_tx)
{
int ret;
const char *codectype;
int node;
/* Get the node from FDT for sound */
node = fdt_path_offset(blob, "i2s");
if (node <= 0) {
debug("EXYNOS_SOUND: No node for sound in device tree\n");
debug("node = %d\n", node);
return -1;
}
/*
* Get the pre-defined sound codec specific values from FDT.
* All of these are expected to be correct otherwise sound
* can not be played
*/
codectype = fdt_getprop(blob, node, "samsung,codec-type", NULL);
debug("device = %s\n", codectype);
if (!strcmp(codectype, "wm8994")) {
/* Check the codec type and initialise the same */
ret = wm8994_init(blob, pi2s_tx->id + 1,
pi2s_tx->samplingrate,
(pi2s_tx->samplingrate * (pi2s_tx->rfs)),
pi2s_tx->bitspersample, pi2s_tx->channels);
} else if (!strcmp(codectype, "max98095")) {
ret = max98095_init(blob, pi2s_tx->id + 1,
pi2s_tx->samplingrate,
(pi2s_tx->samplingrate * (pi2s_tx->rfs)),
pi2s_tx->bitspersample);
} else {
debug("%s: Unknown codec type %s\n", __func__, codectype);
return -1;
}
if (ret) {
debug("%s: Codec init failed\n", __func__);
return -1;
}
return 0;
}
static void fdt_board_fixup_qe_uart(void *blob, bd_t *bd)
{
u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
const char *devtype = "serial";
const char *compat = "ucc_uart";
const char *clk = "brg9";
u32 portnum = 0;
int off = -1;
if (!hwconfig("qe_uart"))
return;
if (hwconfig("esdhc") && esdhc_disables_uart0()) {
printf("QE UART: won't enable with esdhc.\n");
return;
}
fdt_board_disable_serial(blob, bd, "serial1");
while (1) {
const u32 *idx;
int len;
off = fdt_node_offset_by_compatible(blob, off, "ucc_geth");
if (off < 0) {
printf("WARNING: unable to fixup device tree for "
"QE UART\n");
return;
}
idx = fdt_getprop(blob, off, "cell-index", &len);
if (!idx || len != sizeof(*idx) || *idx != fdt32_to_cpu(2))
continue;
break;
}
fdt_setprop(blob, off, "device_type", devtype, strlen(devtype) + 1);
fdt_setprop(blob, off, "compatible", compat, strlen(compat) + 1);
fdt_setprop(blob, off, "tx-clock-name", clk, strlen(clk) + 1);
fdt_setprop(blob, off, "rx-clock-name", clk, strlen(clk) + 1);
fdt_setprop(blob, off, "port-number", &portnum, sizeof(portnum));
setbits_8(&bcsr[15], BCSR15_QEUART_EN);
}
int show_board_info(void)
{
struct regmap *regmap;
int nodeoffset, ret;
ofnode node;
unsigned int socinfo;
/* find the offset of compatible node */
nodeoffset = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
"amlogic,meson-gx-ao-secure");
if (nodeoffset < 0)
return 0;
/* check if chip-id is available */
if (!fdt_getprop(gd->fdt_blob, nodeoffset, "amlogic,has-chip-id", NULL))
return 0;
/* get regmap from the syscon node */
node = offset_to_ofnode(nodeoffset);
regmap = syscon_node_to_regmap(node);
if (IS_ERR(regmap)) {
printf("%s: failed to get regmap\n", __func__);
return 0;
}
/* read soc info */
ret = regmap_read(regmap, AO_SEC_SOCINFO_OFFSET, &socinfo);
if (ret && !socinfo) {
printf("%s: invalid chipid value\n", __func__);
return 0;
}
/* print board information */
print_board_model();
printf("Soc: Amlogic Meson %s (%s) Revision %x:%x (%x:%x)\n",
socinfo_to_soc_id(socinfo),
socinfo_to_package_id(socinfo),
socinfo_to_major(socinfo),
socinfo_to_minor(socinfo),
socinfo_to_pack(socinfo),
socinfo_to_misc(socinfo));
return 0;
}
/* Get the value of a property of a package. */
static ssize_t
ofw_fdt_getprop(ofw_t ofw, phandle_t package, const char *propname, void *buf,
size_t buflen)
{
const void *prop;
const char *name;
int len, offset;
uint32_t cpuid;
offset = fdt_phandle_offset(package);
if (offset < 0)
return (-1);
prop = fdt_getprop(fdtp, offset, propname, &len);
if (prop == NULL && strcmp(propname, "name") == 0) {
/* Emulate the 'name' property */
name = fdt_get_name(fdtp, offset, &len);
strncpy(buf, name, buflen);
if (len + 1 > buflen)
len = buflen;
return (len + 1);
}
if (prop == NULL && offset == fdt_path_offset(fdtp, "/chosen")) {
if (strcmp(propname, "fdtbootcpu") == 0) {
cpuid = cpu_to_fdt32(fdt_boot_cpuid_phys(fdtp));
len = sizeof(cpuid);
prop = &cpuid;
}
if (strcmp(propname, "fdtmemreserv") == 0) {
prop = (char *)fdtp + fdt_off_mem_rsvmap(fdtp);
len = sizeof(uint64_t)*2*fdt_num_mem_rsv(fdtp);
}
}
if (prop == NULL)
return (-1);
if (len > buflen)
len = buflen;
bcopy(prop, buf, len);
return (len);
}
const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
const char *property, int idx,
int *lenp)
{
const char *list, *end;
int length;
list = fdt_getprop(fdt, nodeoffset, property, &length);
if (!list) {
if (lenp)
*lenp = length;
return NULL;
}
end = list + length;
while (list < end) {
length = strnlen(list, end - list) + 1;
/* Abort if the last string isn't properly NUL-terminated. */
if (list + length > end) {
if (lenp)
*lenp = -FDT_ERR_BADVALUE;
return NULL;
}
if (idx == 0) {
if (lenp)
*lenp = length - 1;
return list;
}
list += length;
idx--;
}
if (lenp)
*lenp = -FDT_ERR_NOTFOUND;
return NULL;
}
static int __init fdt_translate_one(const void *blob, int parent,
const struct of_bus *bus,
const struct of_bus *pbus, __be32 *addr,
int na, int ns, int pna, const char *rprop)
{
const __be32 *ranges;
int rlen;
int rone;
u64 offset = OF_BAD_ADDR;
ranges = fdt_getprop(blob, parent, rprop, &rlen);
if (!ranges)
return 1;
if (rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
pr_debug("FDT: empty ranges, 1:1 translation\n");
goto finish;
}
pr_debug("FDT: walking ranges...\n");
/* Now walk through the ranges */
rlen /= 4;
rone = na + pna + ns;
for (; rlen >= rone; rlen -= rone, ranges += rone) {
offset = bus->map(addr, ranges, na, ns, pna);
if (offset != OF_BAD_ADDR)
break;
}
if (offset == OF_BAD_ADDR) {
pr_debug("FDT: not found !\n");
return 1;
}
memcpy(addr, ranges + na, 4 * pna);
finish:
of_dump_addr("FDT: parent translation for:", addr, pna);
pr_debug("FDT: with offset: %llx\n", offset);
/* Translate it into parent bus space */
return pbus->translate(addr, offset, pna);
}
static int mvneta_ofdata_to_platdata(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
const char *phy_mode;
pdata->iobase = dev_get_addr(dev);
/* Get phy-mode / phy_interface from DT */
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
return -EINVAL;
}
return 0;
}
/**
* overlay_get_target - retrieves the offset of a fragment's target
* @fdt: Base device tree blob
* @fdto: Device tree overlay blob
* @fragment: node offset of the fragment in the overlay
* @pathp: pointer which receives the path of the target (or NULL)
*
* overlay_get_target() retrieves the target offset in the base
* device tree of a fragment, no matter how the actual targetting is
* done (through a phandle or a path)
*
* returns:
* the targetted node offset in the base device tree
* Negative error code on error
*/
static int overlay_get_target(const void *fdt, const void *fdto,
int fragment, char const **pathp)
{
uint32_t phandle;
const char *path = NULL;
int path_len = 0, ret;
/* Try first to do a phandle based lookup */
phandle = overlay_get_target_phandle(fdto, fragment);
if (phandle == (uint32_t)-1)
return -FDT_ERR_BADPHANDLE;
/* no phandle, try path */
if (!phandle) {
/* And then a path based lookup */
path = fdt_getprop(fdto, fragment, "target-path", &path_len);
if (path)
ret = fdt_path_offset(fdt, path);
else
ret = path_len;
} else
ret = fdt_node_offset_by_phandle(fdt, phandle);
/*
* If we haven't found either a target or a
* target-path property in a node that contains a
* __overlay__ subnode (we wouldn't be called
* otherwise), consider it a improperly written
* overlay
*/
if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
ret = -FDT_ERR_BADOVERLAY;
/* return on error */
if (ret < 0)
return ret;
/* return pointer to path (if available) */
if (pathp)
*pathp = path ? path : NULL;
return ret;
}
int fdtdec_get_int_array_count(const void *blob, int node,
const char *prop_name, u32 *array, int count)
{
const u32 *cell;
int len, elems;
int i;
debug("%s: %s\n", __func__, prop_name);
cell = fdt_getprop(blob, node, prop_name, &len);
if (!cell)
return -FDT_ERR_NOTFOUND;
elems = len / sizeof(u32);
if (count > elems)
count = elems;
for (i = 0; i < count; i++)
array[i] = fdt32_to_cpu(cell[i]);
return count;
}
int fdtdec_count_strings(const void *fdt, int node, const char *prop_name)
{
int length, i, count = 0;
const char *list;
list = fdt_getprop(fdt, node, prop_name, &length);
if (!list)
return -length;
for (i = 0; i < length; i++) {
int len = strlen(list);
list += len + 1;
i += len;
count++;
}
return count;
}
void ft_fixup_cpu(void *blob)
{
int off;
__maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
fdt32_t *reg;
int addr_cells;
u64 val, core_id;
size_t *boot_code_size = &(__secondary_boot_code_size);
off = fdt_path_offset(blob, "/cpus");
if (off < 0) {
puts("couldn't find /cpus node\n");
return;
}
of_bus_default_count_cells(blob, off, &addr_cells, NULL);
off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
while (off != -FDT_ERR_NOTFOUND) {
reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
core_id = of_read_number(reg, addr_cells);
if (reg) {
if (core_id == 0 || (is_core_online(core_id))) {
val = spin_tbl_addr;
val += id_to_core(core_id) *
SPIN_TABLE_ELEM_SIZE;
val = cpu_to_fdt64(val);
fdt_setprop_string(blob, off, "enable-method",
"spin-table");
fdt_setprop(blob, off, "cpu-release-addr",
&val, sizeof(val));
} else {
debug("skipping offline core\n");
}
} else {
puts("Warning: found cpu node without reg property\n");
}
off = fdt_node_offset_by_prop_value(blob, off, "device_type",
"cpu", 4);
}
fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
*boot_code_size);
}
static int dt_add_psci_cpu_enable_methods(void *fdt)
{
int offs = 0;
while (1) {
offs = fdt_next_node(fdt, offs, NULL);
if (offs < 0)
break;
if (fdt_getprop(fdt, offs, "enable-method", NULL))
continue; /* already set */
if (check_node_compat_prefix(fdt, offs, "arm,cortex-a"))
continue; /* no compatible */
if (fdt_setprop_string(fdt, offs, "enable-method", "psci"))
return -1;
/* Need to restart scanning as offsets may have changed */
offs = 0;
}
return 0;
}
fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
const char *prop_name, fdt_size_t *sizep)
{
const fdt32_t *ptr, *end;
int parent, na, ns, len;
fdt_addr_t addr;
debug("%s: %s: ", __func__, prop_name);
parent = fdt_parent_offset(blob, node);
if (parent < 0) {
debug("(no parent found)\n");
return FDT_ADDR_T_NONE;
}
na = fdt_address_cells(blob, parent);
ns = fdt_size_cells(blob, parent);
ptr = fdt_getprop(blob, node, prop_name, &len);
if (!ptr) {
debug("(not found)\n");
return FDT_ADDR_T_NONE;
}
end = ptr + len / sizeof(*ptr);
if (ptr + na + ns > end) {
debug("(not enough data: expected %d bytes, got %d bytes)\n",
(na + ns) * 4, len);
return FDT_ADDR_T_NONE;
}
addr = fdtdec_get_number(ptr, na);
if (sizep) {
*sizep = fdtdec_get_number(ptr + na, ns);
debug("addr=%pa, size=%pa\n", &addr, sizep);
} else {
debug("%pa\n", &addr);
}
return addr;
}
static int macb_eth_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
struct macb_device *macb = dev_get_priv(dev);
const char *phy_mode;
__maybe_unused int ret;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
macb->phy_interface = phy_get_interface_by_name(phy_mode);
if (macb->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
return -EINVAL;
}
macb->regs = (void *)pdata->iobase;
#ifdef CONFIG_CLK
ret = macb_enable_clk(dev);
if (ret)
return ret;
#endif
_macb_eth_initialize(macb);
#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
macb->bus = mdio_alloc();
if (!macb->bus)
return -ENOMEM;
strncpy(macb->bus->name, dev->name, MDIO_NAME_LEN);
macb->bus->read = macb_miiphy_read;
macb->bus->write = macb_miiphy_write;
ret = mdio_register(macb->bus);
if (ret < 0)
return ret;
macb->bus = miiphy_get_dev_by_name(dev->name);
#endif
return 0;
}
static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
{
int offset, len, err;
void *p;
int val;
u32 tmp[4][8];
offset = fdt_path_offset(blob, name);
if (offset < 0) {
printf("WARNING: fdt_path_offset can't find path %s: %s\n",
name, fdt_strerror(offset));
return 0;
}
p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
if (!p || len != sizeof(tmp)) {
printf("WARNING: fdt_getprop can't get %s from node %s\n",
"interrupt-map", name);
return 0;
}
memcpy((char *)tmp, p, len);
val = fdt32_to_cpu(tmp[0][6]);
if (rev > REV1_0) {
tmp[1][6] = cpu_to_fdt32(val + 1);
tmp[2][6] = cpu_to_fdt32(val + 2);
tmp[3][6] = cpu_to_fdt32(val + 3);
} else {
tmp[1][6] = cpu_to_fdt32(val);
tmp[2][6] = cpu_to_fdt32(val);
tmp[3][6] = cpu_to_fdt32(val);
}
err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
if (err < 0) {
printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
"interrupt-map", name, fdt_strerror(err));
return 0;
}
return 1;
}
void
ft_board_setup(void *blob, bd_t *bd)
{
int node, tmp[2];
const char *path;
ft_cpu_setup(blob, bd);
node = fdt_path_offset(blob, "/aliases");
tmp[0] = 0;
if (node >= 0) {
#ifdef CONFIG_PCI
path = fdt_getprop(blob, node, "pci0", NULL);
if (path) {
tmp[1] = hose.last_busno - hose.first_busno;
do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
}
#endif
}
}
static void bd82x6x_sata_enable(struct udevice *dev)
{
const void *blob = gd->fdt_blob;
int node = dev->of_offset;
unsigned port_map;
const char *mode;
u16 map = 0;
/*
* Set SATA controller mode early so the resource allocator can
* properly assign IO/Memory resources for the controller.
*/
mode = fdt_getprop(blob, node, "intel,sata-mode", NULL);
if (mode && !strcmp(mode, "ahci"))
map = 0x0060;
port_map = fdtdec_get_int(blob, node, "intel,sata-port-map", 0);
map |= (port_map ^ 0x3f) << 8;
dm_pci_write_config16(dev, 0x90, map);
}
static __init const u8 *kaslr_get_cmdline(void *fdt)
{
static __initconst const u8 default_cmdline[] = CONFIG_CMDLINE;
if (!IS_ENABLED(CONFIG_CMDLINE_FORCE)) {
int node;
const u8 *prop;
node = fdt_path_offset(fdt, "/chosen");
if (node < 0)
goto out;
prop = fdt_getprop(fdt, node, "bootargs", NULL);
if (!prop)
goto out;
return prop;
}
out:
return default_cmdline;
}
/**
* sandbox_tpm_read_state() - read the sandbox EC state from the state file
*
* If data is available, then blob and node will provide access to it. If
* not this function sets up an empty TPM.
*
* @blob: Pointer to device tree blob, or NULL if no data to read
* @node: Node offset to read from
*/
static int sandbox_tpm_read_state(const void *blob, int node)
{
const char *prop;
int len;
int i;
if (!blob)
return 0;
for (i = 0; i < NV_SEQ_COUNT; i++) {
char prop_name[20];
sprintf(prop_name, "nvdata%d", i);
prop = fdt_getprop(blob, node, prop_name, &len);
if (prop && len == NV_DATA_SIZE)
memcpy(state.nvdata[i], prop, NV_DATA_SIZE);
}
return 0;
}
static const char *fit_config_get_image_list(void *fit, int noffset,
int *lenp, int *allow_missingp)
{
static const char default_list[] = FIT_KERNEL_PROP "\0"
FIT_FDT_PROP;
const char *prop;
/* If there is an "image" property, use that */
prop = fdt_getprop(fit, noffset, "sign-images", lenp);
if (prop) {
*allow_missingp = 0;
return *lenp ? prop : NULL;
}
/* Default image list */
*allow_missingp = 1;
*lenp = sizeof(default_list);
return default_list;
}