static int amd_flash_erase_one(struct flash_info *info, long sect)
{
flash_unlock_seq(info);
flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_ERASE_START);
flash_unlock_seq(info);
flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
return flash_status_check(info, sect, info->erase_blk_tout, "erase");
}
static int amd_flash_write_cfibuffer(struct flash_info *info, unsigned long dest,
const u8 *cp, int len)
{
flash_sect_t sector;
int cnt;
void *src = (void *)cp;
void *dst = (void *)dest;
cfiword_t cword;
sector = find_sector (info, dest);
flash_unlock_seq(info);
flash_make_cmd (info, AMD_CMD_WRITE_TO_BUFFER, &cword);
flash_write_word(info, cword, (void *)dest);
if (bankwidth_is_1(info)) {
cnt = len;
flash_write_cmd(info, sector, 0, (u32)cnt - 1);
while (cnt-- > 0) {
flash_write8(flash_read8(src), dst);
src += 1, dst += 1;
}
} else if (bankwidth_is_2(info)) {
cnt = len >> 1;
flash_write_cmd(info, sector, 0, (u32)cnt - 1);
while (cnt-- > 0) {
flash_write16(flash_read16(src), dst);
src += 2, dst += 2;
}
} else if (bankwidth_is_4(info)) {
static int amd_flash_write_cfibuffer (struct flash_info *info, ulong dest, const uchar * cp,
int len)
{
flash_sect_t sector;
int cnt;
int retcode;
volatile cfiptr_t src;
volatile cfiptr_t dst;
cfiword_t cword;
src.cp = (uchar *)cp;
dst.cp = (uchar *) dest;
sector = find_sector (info, dest);
flash_unlock_seq(info);
flash_make_cmd (info, AMD_CMD_WRITE_TO_BUFFER, &cword);
flash_write_word(info, cword, (void *)dest);
if (bankwidth_is_1(info)) {
cnt = len;
flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) *dst.cp++ = *src.cp++;
} else if (bankwidth_is_2(info)) {
cnt = len >> 1;
flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt-- > 0) *dst.wp++ = *src.wp++;
} else if (bankwidth_is_4(info)) {
/*
* read jedec ids from device and set corresponding fields in info struct
*
* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
*
*/
static void amd_read_jedec_ids(struct flash_info *info)
{
info->cmd_reset = AMD_CMD_RESET;
info->manufacturer_id = 0;
info->device_id = 0;
info->device_id2 = 0;
/* calculate command offsets as in the Linux driver */
info->addr_unlock1 = 0x555;
info->addr_unlock2 = 0x2AA;
/*
* modify the unlock address if we are in compatibility mode
*/
if ( /* x8/x16 in x8 mode */
((info->chipwidth == FLASH_CFI_BY8) &&
(info->interface == FLASH_CFI_X8X16)) ||
/* x16/x32 in x16 mode */
((info->chipwidth == FLASH_CFI_BY16) &&
(info->interface == FLASH_CFI_X16X32)))
{
info->addr_unlock1 = 0xaaa;
info->addr_unlock2 = 0x555;
}
flash_write_cmd(info, 0, 0, info->cmd_reset);
flash_unlock_seq(info);
flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
udelay(1000); /* some flash are slow to respond */
info->manufacturer_id = jedec_read_mfr(info);
info->device_id = flash_read_uchar(info,
FLASH_OFFSET_DEVICE_ID);
if (info->device_id == 0x7E) {
/* AMD 3-byte (expanded) device ids */
info->device_id2 = flash_read_uchar(info,
FLASH_OFFSET_DEVICE_ID2);
info->device_id2 <<= 8;
info->device_id2 |= flash_read_uchar(info,
FLASH_OFFSET_DEVICE_ID3);
}
flash_write_cmd(info, 0, 0, info->cmd_reset);
}
/*
* read jedec ids from device and set corresponding fields in info struct
*
* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
*
*/
static void amd_read_jedec_ids (struct flash_info *info)
{
info->manufacturer_id = 0;
info->device_id = 0;
info->device_id2 = 0;
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
flash_unlock_seq(info);
flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
udelay(1000); /* some flash are slow to respond */
info->manufacturer_id = flash_read_uchar (info,
FLASH_OFFSET_MANUFACTURER_ID);
info->device_id = flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID);
if (info->device_id == 0x7E) {
/* AMD 3-byte (expanded) device ids */
info->device_id2 = flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID2);
info->device_id2 <<= 8;
info->device_id2 |= flash_read_uchar (info,
FLASH_OFFSET_DEVICE_ID3);
}
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
}
static void amd_flash_prepare_write(struct flash_info *info)
{
flash_unlock_seq(info);
flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
}
static void amd_flash_prepare_write(struct flash_info *info)
{
flash_unlock_seq(info);
flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
}
