Пример #1
0
/**
 * \brief main function. Do the Fibonacci calculation with and without
 * PicoCache and print the calculation time to the UART console.
 */
int main(void)
{
	/* Initialize the SAM system */
	sysclk_init();
	board_init();

	/* Initialize the console uart */
	configure_console();

	/* Output example information */
	printf("-- FLASHCALW Example3 --\r\n");
	printf("-- %s\n\r", BOARD_NAME);
	printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);

	/* Intialize time tick utilities */
	time_tick_init(sysclk_get_cpu_hz());

	/* Calculate the Fibonacci without PicoCache */
	flash_picocache_example(
		"Fibonacci calculation without PicoCache at 48MHz",
		false);

	/* Calculate the Fibonacci with PicoCache */
	flash_picocache_example(
		"Fibonacci calculation with PicoCache at 48MHz",
		true);

	puts("From now on, System is running at 12MHz\r");
	puts("Please check the power consumption\r");
	printf("Push %s to continue\r\n", BUTTON_0_NAME);
	wait_for_pushbutton();
	sysclk_set_prescalers(2, 0, 0, 0, 0);
	reconfigure_com_port();

	flashcalw_set_wait_state(0);
	/* Calculate the Fibonacci without PicoCache */
	flash_picocache_example(
		"Fibonacci calculation without PicoCache at 12MHz",
		false);

	puts("Please check the power consumption\r");
	printf("Push %s to continue\r\n", BUTTON_0_NAME);
	wait_for_pushbutton();

	/* Calculate the Fibonacci with PicoCache */
	flash_picocache_example(
		"Fibonacci calculation with PicoCache at 12MHz",
		true);

	puts("End");

	while (true) {
	}
}
Пример #2
0
/**
 * \brief Test flashcalw configure functions.
 *
 * This test gets the default wait state first, then it will reset the wait
 * state and validate the result.
 *
 * \param test Current test case.
 */
static void run_flashcalw_control_test(const struct test_case *test)
{
	uint32_t default_ws;
	uint32_t tmp_ws;

	/* Backup default wait state */
	default_ws = flashcalw_get_wait_state();

	/* Set the reversed wait state */
	flashcalw_set_wait_state(default_ws ? 0 : 1);

	/* Get the wait state set */
	tmp_ws = flashcalw_get_wait_state();

	/* Validate the flashcalw set wait state function */
	test_assert_true(test, tmp_ws == (default_ws ? 0 : 1),
		"Test flashcalw control: flashcalw set wait state error!");

	/*Restore default wait state */
	flashcalw_set_wait_state(default_ws);
}
Пример #3
0
int main(void)
{
	sysclk_init();
	board_init();

	/* Enable one wait state for flash access */
	flashcalw_set_wait_state(1);

	/*
	 * Configure systick for 200ms (CPU frequency / 5) at startup time.
	 *
	 * Note: CPU frequency will be changed with below clock switching.
	 */
	if (SysTick_Config(sysclk_get_cpu_hz() / 5)) {
		while (1) { /* Capture error */
		}
	}

	while (1) {
		struct dfll_config dcfg;
		struct pll_config pcfg;
		/* avoid Cppcheck Warning */
		UNUSED(pcfg);

		/*
		 * Initial state: Running from RC80M with all
		 * prescalers set to 2 (Divide frequency by 4).
		 */
		wait_for_switches();

		/*
		 * Divide CPU frequency by 8. This will make the LED
		 * blink half as fast.
		 */
		sysclk_set_prescalers(3, 3, 3, 3, 3);
		wait_for_switches();

		/*
		 * Switch to the DFLL running at ~48 MHz in Open Loop
		 * mode, with the CPU running at ~48 MHz.
		 */
		dfll_config_init_open_loop_mode(&dcfg);
		dfll_config_tune_for_target_hz(&dcfg, 48000000);
		dfll_enable_open_loop(&dcfg, 0);
		sysclk_set_prescalers(1, 1, 1, 1, 1);
		sysclk_set_source(SYSCLK_SRC_DFLL);
		osc_disable(OSC_ID_RC80M);
		wait_for_switches();

		/*
		 * Switch to the slow clock with all prescalers
		 * disabled.
		 */
		sysclk_set_source(SYSCLK_SRC_RCSYS);
		sysclk_set_prescalers(0, 0, 0, 0, 0);
		dfll_disable_open_loop(0);
		wait_for_switches();

		/*
		 * Switch to the RCFAST clock with all prescalers
		 * disabled.
		 */
		osc_enable(OSC_ID_RCFAST);
		sysclk_set_prescalers(0, 0, 0, 0, 0);
		osc_wait_ready(OSC_ID_RCFAST);
		sysclk_set_source(SYSCLK_SRC_RCFAST);
		wait_for_switches();

		/*
		 * Switch to the RC1M clock with all prescalers
		 * disabled.
		 */
		osc_enable(OSC_ID_RC1M);
		sysclk_set_prescalers(0, 0, 0, 0, 0);
		osc_wait_ready(OSC_ID_RC1M);
		sysclk_set_source(SYSCLK_SRC_RC1M);
		osc_disable(OSC_ID_RCFAST);
		wait_for_switches();

		/*
		 * Switch to external OSC0, if available.
		 */
#ifdef BOARD_OSC0_HZ
		osc_enable(OSC_ID_OSC0);
		osc_wait_ready(OSC_ID_OSC0);
		sysclk_set_source(SYSCLK_SRC_OSC0);
		osc_disable(OSC_ID_RC1M);
		wait_for_switches();

		/*
		 * Switch to PLL0 running at 96 MHz. Use OSC0 as the
		 * source
		 */
		pll_config_init(&pcfg, PLL_SRC_OSC0, 1, 96000000 /
				BOARD_OSC0_HZ);
		pll_enable(&pcfg, 0);
		sysclk_set_prescalers(2, 2, 2, 2, 2);
		pll_wait_for_lock(0);
		sysclk_set_source(SYSCLK_SRC_PLL0);
		wait_for_switches();
#endif

		/*
		 * Switch to the DFLL, using the 32 kHz oscillator as a
		 * reference if available, or failing that, the 115 kHz
		 * RCSYS oscillator.
		 */
#ifdef BOARD_OSC32_HZ
		osc_enable(OSC_ID_OSC32);
		dfll_config_init_closed_loop_mode(&dcfg,
				GENCLK_SRC_OSC32K, 1,
				CONFIG_DFLL0_FREQ / BOARD_OSC32_HZ);
		osc_wait_ready(OSC_ID_OSC32);
#else
		dfll_config_init_closed_loop_mode(&dcfg,
				GENCLK_SRC_RCSYS, 1,
				CONFIG_DFLL0_FREQ / OSC_RCSYS_NOMINAL_HZ);
#endif
		dfll_enable_closed_loop(&dcfg, 0);
		sysclk_set_prescalers(1, 1, 1, 1, 1);
		dfll_wait_for_fine_lock(0);
		sysclk_set_source(SYSCLK_SRC_DFLL);
#ifdef BOARD_OSC0_HZ
		osc_disable(OSC_ID_OSC0);
#endif
		wait_for_switches();

		/*
		 * Go back to the initial state and start over.
		 */
		osc_enable(OSC_ID_RC80M);
		sysclk_set_prescalers(2, 2, 2, 2, 2);
		osc_wait_ready(OSC_ID_RC80M);
		sysclk_set_source(SYSCLK_SRC_RC80M);
		dfll_disable_closed_loop(0);
#ifdef BOARD_OSC32_HZ
		osc_disable(OSC_ID_OSC32);
#endif
	}
}