/*
* math coprocessor error
*/
static void
matherror(Ureg *ur, void*)
{
ulong status, pc;
/*
* a write cycle to port 0xF0 clears the interrupt latch attached
* to the error# line from the 387
*/
if(!(m->cpuiddx & Fpuonchip))
outb(0xF0, 0xFF);
/*
* save floating point state to check out error
*/
fpenv(&up->fpsave); /* result ignored, but masks fp exceptions */
fpsave(&up->fpsave); /* also turns fpu off */
fpon();
mathnote();
if((ur->pc & 0xf0000000) == KZERO){
mathstate(&status, &pc, nil);
panic("fp: status %#lux fppc=%#lux pc=%#lux", status, pc, ur->pc);
}
}
/*
* math coprocessor error
*/
static void
matherror(Ureg *ur, void*)
{
ulong status, pc;
/*
* a write cycle to port 0xF0 clears the interrupt latch attached
* to the error# line from the 387
*/
if(!(m->cpuiddx & 0x01))
outb(0xF0, 0xFF);
fpalloc();
/*
* save floating point state to check out error
*/
fpenv(&up->fpsave);
mathnote();
if((ur->pc & 0xf0000000) == KZERO){
mathstate(&status, &pc, nil);
panic("fp: status %#lux fppc=%#lux pc=%#lux", status, pc, ur->pc);
}
}
/*
* math coprocessor error
*/
static void
matherror(Ureg *ur, void*)
{
/*
* a write cycle to port 0xF0 clears the interrupt latch attached
* to the error# line from the 387
*/
if(!(m->cpuiddx & 0x01))
outb(0xF0, 0xFF);
/*
* save floating point state to check out error
*/
fpenv(&up->fpsave);
mathnote();
if((ur->pc & 0xf0000000) == KZERO)
panic("fp: status %ux fppc=0x%lux pc=0x%lux",
up->fpsave.status, up->fpsave.pc, ur->pc);
}