u16 DSPLLE::DSP_ReadMailBoxLow(bool _CPUMailbox)
{
if (_CPUMailbox)
return gdsp_mbox_read_l(GDSP_MBOX_CPU);
else
return gdsp_mbox_read_l(GDSP_MBOX_DSP);
}
static u16 _gdsp_ifx_read(u16 addr)
{
switch (addr & 0xff)
{
case DSP_DMBH:
return gdsp_mbox_read_h(GDSP_MBOX_DSP);
case DSP_DMBL:
return gdsp_mbox_read_l(GDSP_MBOX_DSP);
case DSP_CMBH:
return gdsp_mbox_read_h(GDSP_MBOX_CPU);
case DSP_CMBL:
return gdsp_mbox_read_l(GDSP_MBOX_CPU);
case DSP_DSCR:
return g_dsp.ifx_regs[addr & 0xFF];
case DSP_ACCELERATOR: // ADPCM Accelerator reads
return dsp_read_accelerator();
case DSP_ACDATA1: // Accelerator reads (Zelda type) - "UnkZelda"
return dsp_read_aram_d3();
default:
if ((addr & 0xff) >= 0xa0)
{
if (pdlabels[(addr & 0xFF) - 0xa0].name && pdlabels[(addr & 0xFF) - 0xa0].description)
{
INFO_LOG(DSPLLE, "%04x MR %s (%04x)", g_dsp.pc, pdlabels[(addr & 0xFF) - 0xa0].name, g_dsp.ifx_regs[addr & 0xFF]);
}
else
{
ERROR_LOG(DSPLLE, "%04x MR %04x (%04x)", g_dsp.pc, addr, g_dsp.ifx_regs[addr & 0xFF]);
}
}
else
{
ERROR_LOG(DSPLLE, "%04x MR %04x (%04x)", g_dsp.pc, addr, g_dsp.ifx_regs[addr & 0xFF]);
}
return g_dsp.ifx_regs[addr & 0xFF];
}
}
u16 DSPLLE::DSP_ReadMailBoxLow(bool _CPUMailbox)
{
return gdsp_mbox_read_l(_CPUMailbox ? MAILBOX_CPU : MAILBOX_DSP);
}