/**
* \brief Enable the GLOC module.
*
* \param dev_inst Device structure pointer.
*
*/
void gloc_enable(struct gloc_dev_inst *const dev_inst)
{
struct genclk_config gencfg;
sysclk_enable_peripheral_clock(dev_inst->hw_dev);
sleepmgr_lock_mode(SLEEPMGR_SLEEP_0);
genclk_config_defaults(&gencfg, GLOC_GCLK_NUM);
genclk_enable_source(CONFIG_GLOC_GENCLK_SRC);
genclk_config_set_source(&gencfg, CONFIG_GLOC_GENCLK_SRC);
genclk_config_set_divider(&gencfg, CONFIG_GLOC_GENCLK_DIV);
genclk_enable(&gencfg, GLOC_GCLK_NUM);
}
/**
* \brief Enable the AES.
*
* \param dev_inst Device structure pointer.
*
*/
void aes_enable(struct aes_dev_inst *const dev_inst)
{
struct genclk_config gencfg;
sysclk_enable_peripheral_clock(dev_inst->hw_dev);
sleepmgr_lock_mode(SLEEPMGR_SLEEP_0);
dev_inst->hw_dev->AESA_CTRL = AESA_CTRL_ENABLE;
genclk_config_defaults(&gencfg, AESA_GCLK_NUM);
genclk_enable_source(CONFIG_AESA_GENERIC_SRC);
genclk_config_set_source(&gencfg, CONFIG_AESA_GENERIC_SRC);
genclk_config_set_divider(&gencfg, CONFIG_AESA_GENERIC_DIV);
genclk_enable(&gencfg, AESA_GCLK_NUM);
}
/**
* \brief Test audio data transfer and receive.
*
* \param test Current test case.
*/
static void run_iis_test(const struct test_case *test)
{
uint32_t i;
struct iis_config config;
struct iis_dev_inst dev_inst;
struct genclk_config gencfg;
struct pll_config pcfg;
/* Set the GCLK according to the sample rate */
genclk_config_defaults(&gencfg, IISC_GCLK_NUM);
/* CPUCLK 48M */
pll_config_init(&pcfg, PLL_SRC_OSC0, 2, 96000000 /
BOARD_OSC0_HZ);
pll_enable(&pcfg, 0);
sysclk_set_prescalers(0, 0, 0, 0, 0);
pll_wait_for_lock(0);
sysclk_set_source(SYSCLK_SRC_PLL0);
/* GCLK according fs ratio */
genclk_enable_source(GENCLK_SRC_CLK_CPU);
genclk_config_set_source(&gencfg, GENCLK_SRC_CLK_CPU);
genclk_config_set_divider(&gencfg, 4);
genclk_enable(&gencfg, IISC_GCLK_NUM);
/* Set the configuration */
iis_get_config_defaults(&config);
config.data_format = IIS_DATE_16BIT_COMPACT;
config.slot_length = IIS_SLOT_LENGTH_16BIT;
config.fs_ratio = IIS_FS_RATE_256;
config.tx_channels = IIS_CHANNEL_STEREO;
config.rx_channels = IIS_CHANNEL_STEREO;
config.tx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS;
config.rx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS;
config.loopback = true;
iis_init(&dev_inst, IISC, &config);
/* Enable the IIS module. */
iis_enable(&dev_inst);
/* Config PDCA module */
pdca_enable(PDCA);
pdca_channel_set_config(PDCA_IISC_CHANNEL0, &pdca_iisc_config_tx);
pdca_channel_set_config(PDCA_IISC_CHANNEL1, &pdca_iisc_config_rx);
pdca_channel_write_load(PDCA_IISC_CHANNEL0,
(void *)output_samples, SOUND_SAMPLES / 2);
pdca_channel_write_load(PDCA_IISC_CHANNEL1,
(void *)input_samples, SOUND_SAMPLES / 2);
pdca_channel_enable(PDCA_IISC_CHANNEL0);
pdca_channel_enable(PDCA_IISC_CHANNEL1);
/* Enable the functions */
iis_enable_transmission(&dev_inst);
iis_enable_clocks(&dev_inst);
/**
* Since the transfer and receive timing is not under control, we
* need adjust here the enable sequence and add some delay
* functions if it's needed.
*/
delay_us(20);
iis_enable_reception(&dev_inst);
while (!(pdca_get_channel_status(PDCA_IISC_CHANNEL1)
== PDCA_CH_TRANSFER_COMPLETED)) {
}
/* Disable the PDCA module. */
pdca_channel_disable(PDCA_IISC_CHANNEL0);
pdca_channel_disable(PDCA_IISC_CHANNEL1);
pdca_disable(PDCA);
/* Disable the IISC module. */
iis_disable(&dev_inst);
for (i = 0; i < SOUND_SAMPLES; i++) {
if (input_samples[i] != output_samples[i]) {
flag = false;
}
}
test_assert_true(test, flag == true, "Audio data did not match!");
}
