static void s390_ipl_reset(DeviceState *dev) { S390IPLState *ipl = S390_IPL(dev); S390CPU *cpu = S390_CPU(qemu_get_cpu(0)); CPUS390XState *env = &cpu->env; env->psw.addr = ipl->start_addr; env->psw.mask = IPL_PSW_MASK; if (!ipl->kernel) { /* Tell firmware, if there is a preferred boot device */ env->regs[7] = -1; DeviceState *dev_st = get_boot_device(0); if (dev_st) { VirtioCcwDevice *ccw_dev = (VirtioCcwDevice *) object_dynamic_cast( OBJECT(qdev_get_parent_bus(dev_st)->parent), TYPE_VIRTIO_CCW_DEVICE); if (ccw_dev) { env->regs[7] = ccw_dev->sch->cssid << 24 | ccw_dev->sch->ssid << 16 | ccw_dev->sch->devno; } } } s390_add_running_cpu(cpu); }
void board_recovery_setup(void) { int bootdev = get_boot_device(); switch (bootdev) { #if defined(CONFIG_FASTBOOT_STORAGE_MMC) case SD3_BOOT: case MMC3_BOOT: if (!getenv("bootcmd_android_recovery")) setenv("bootcmd_android_recovery", "booti mmc0 recovery"); break; case SD4_BOOT: case MMC4_BOOT: if (!getenv("bootcmd_android_recovery")) setenv("bootcmd_android_recovery", "booti mmc1 recovery"); break; #endif /*CONFIG_FASTBOOT_STORAGE_MMC*/ #if defined(CONFIG_FASTBOOT_STORAGE_NAND) case NAND_BOOT: if (!getenv("bootcmd_android_recovery")) setenv("bootcmd_android_recovery", "nand read ${loadaddr} ${recovery_nand_offset} " "${recovery_nand_size};booti ${loadaddr}"); break; #endif /*CONFIG_FASTBOOT_STORAGE_NAND*/ default: printf("Unsupported bootup device for recovery: dev: %d\n", bootdev); return; } printf("setup env for recovery..\n"); setenv("bootcmd", "run bootcmd_android_recovery"); }
/* * In addition to updating the iplstate, this function returns: * - 0 if system was ipled with external kernel * - -1 if no valid boot device was found * - ccw id of the boot device otherwise */ static uint64_t s390_update_iplstate(S390IPLState *ipl) { DeviceState *dev_st; if (ipl->iplb_valid) { ipl->cssid = 0; ipl->ssid = 0; ipl->devno = ipl->iplb.devno; goto out; } if (ipl->kernel) { return 0; } dev_st = get_boot_device(0); if (dev_st) { VirtioCcwDevice *ccw_dev = (VirtioCcwDevice *) object_dynamic_cast( OBJECT(qdev_get_parent_bus(dev_st)->parent), TYPE_VIRTIO_CCW_DEVICE); if (ccw_dev) { ipl->cssid = ccw_dev->sch->cssid; ipl->ssid = ccw_dev->sch->ssid; ipl->devno = ccw_dev->sch->devno; goto out; } } return -1; out: return (uint32_t) (ipl->cssid << 24 | ipl->ssid << 16 | ipl->devno); }
void board_fastboot_setup(void) { switch (get_boot_device()) { #if defined(CONFIG_FASTBOOT_STORAGE_MMC) case SD1_BOOT: case MMC1_BOOT: if (!getenv("fastboot_dev")) setenv("fastboot_dev", "mmc0"); if (!getenv("bootcmd")) setenv("bootcmd", "booti mmc0"); break; case SD2_BOOT: case MMC2_BOOT: if (!getenv("fastboot_dev")) setenv("fastboot_dev", "mmc1"); if (!getenv("bootcmd")) setenv("bootcmd", "booti mmc1"); break; case SD3_BOOT: case MMC3_BOOT: if (!getenv("fastboot_dev")) setenv("fastboot_dev", "mmc2"); if (!getenv("bootcmd")) setenv("bootcmd", "booti mmc2"); break; #endif /*CONFIG_FASTBOOT_STORAGE_MMC*/ default: printf("unsupported boot devices\n"); break; } }
void board_recovery_setup(void) { int bootdev = get_boot_device(); switch (bootdev) { #if defined(CONFIG_FASTBOOT_STORAGE_MMC) case SD1_BOOT: case MMC1_BOOT: if (!getenv("bootcmd_android_recovery")) setenv("bootcmd_android_recovery", "boota mmc0 recovery"); break; case SD3_BOOT: case MMC3_BOOT: if (!getenv("bootcmd_android_recovery")) setenv("bootcmd_android_recovery", "boota mmc1 recovery"); break; #endif /*CONFIG_FASTBOOT_STORAGE_MMC*/ default: printf("Unsupported bootup device for recovery: dev: %d\n", bootdev); return; } printf("setup env for recovery..\n"); setenv("bootcmd", "run bootcmd_android_recovery"); }
int board_mmc_init(bd_t *bis) { enum boot_device dev = get_boot_device(); /* Internal MMC */ switch (dev) { case MX6_SD0_BOOT: /* Internal SD card */ puts("Internal SD card\n"); usdhc3_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); return fsl_esdhc_initialize(bis, &usdhc3_cfg); case MX6_SD1_BOOT: /* External SD card */ puts("External SD card\n"); usdhc2_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); return fsl_esdhc_initialize(bis, &usdhc2_cfg); case MX6_SATA_BOOT: puts("Don't yet support booting from SATA\n"); hang(); default: printf("Unrecognized boot source: %d\n", dev); hang(); } return 0; }
static bool s390_gen_initial_iplb(S390IPLState *ipl) { DeviceState *dev_st; dev_st = get_boot_device(0); if (dev_st) { VirtioCcwDevice *virtio_ccw_dev = (VirtioCcwDevice *) object_dynamic_cast(OBJECT(qdev_get_parent_bus(dev_st)->parent), TYPE_VIRTIO_CCW_DEVICE); SCSIDevice *sd = (SCSIDevice *) object_dynamic_cast(OBJECT(dev_st), TYPE_SCSI_DEVICE); VirtIONet *vn = (VirtIONet *) object_dynamic_cast(OBJECT(dev_st), TYPE_VIRTIO_NET); if (vn) { ipl->netboot = true; } if (virtio_ccw_dev) { CcwDevice *ccw_dev = CCW_DEVICE(virtio_ccw_dev); ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN); ipl->iplb.blk0_len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN - S390_IPLB_HEADER_LEN); ipl->iplb.pbt = S390_IPL_TYPE_CCW; ipl->iplb.ccw.devno = cpu_to_be16(ccw_dev->sch->devno); ipl->iplb.ccw.ssid = ccw_dev->sch->ssid & 3; } else if (sd) { SCSIBus *bus = scsi_bus_from_device(sd); VirtIOSCSI *vdev = container_of(bus, VirtIOSCSI, bus); VirtIOSCSICcw *scsi_ccw = container_of(vdev, VirtIOSCSICcw, vdev); CcwDevice *ccw_dev; ccw_dev = (CcwDevice *)object_dynamic_cast(OBJECT(scsi_ccw), TYPE_CCW_DEVICE); if (!ccw_dev) { /* It might be a PCI device instead */ return false; } ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_QEMU_SCSI_LEN); ipl->iplb.blk0_len = cpu_to_be32(S390_IPLB_MIN_QEMU_SCSI_LEN - S390_IPLB_HEADER_LEN); ipl->iplb.pbt = S390_IPL_TYPE_QEMU_SCSI; ipl->iplb.scsi.lun = cpu_to_be32(sd->lun); ipl->iplb.scsi.target = cpu_to_be16(sd->id); ipl->iplb.scsi.channel = cpu_to_be16(sd->channel); ipl->iplb.scsi.devno = cpu_to_be16(ccw_dev->sch->devno); ipl->iplb.scsi.ssid = ccw_dev->sch->ssid & 3; } else { return false; /* unknown device */ } if (!s390_ipl_set_loadparm(ipl->iplb.loadparm)) { ipl->iplb.flags |= DIAG308_FLAGS_LP_VALID; } return true; } return false; }
void board_init_f(ulong dummy) { int ret; /* * Pin muxing needs to be done before UART output, since * on A38x the UART pins need some re-muxing for output * to work. */ board_early_init_f(); /* Example code showing how to enable the debug UART on MVEBU */ #ifdef EARLY_UART /* * Debug UART can be used from here if required: * * debug_uart_init(); * printch('a'); * printhex8(0x1234); * printascii("string"); */ #endif ret = spl_init(); if (ret) { debug("spl_init() failed: %d\n", ret); hang(); } /* Use special translation offset for SPL */ dm_set_translation_offset(0xd0000000 - 0xf1000000); preloader_console_init(); timer_init(); /* Armada 375 does not support SerDes and DDR3 init yet */ #if !defined(CONFIG_ARMADA_375) /* First init the serdes PHY's */ serdes_phy_config(); /* Setup DDR */ ddr3_init(); #endif /* * Return to the BootROM to continue the Marvell xmodem * UART boot protocol. As initiated by the kwboot tool. * * This can only be done by the BootROM and not by the * U-Boot SPL infrastructure, since the beginning of the * image is already read and interpreted by the BootROM. * SPL has no chance to receive this information. So we * need to return to the BootROM to enable this xmodem * UART download. */ if (get_boot_device() == BOOT_DEVICE_UART) return_to_bootrom(); }
static void s390_ipl_set_boot_menu(S390IPLState *ipl) { QemuOptsList *plist = qemu_find_opts("boot-opts"); QemuOpts *opts = QTAILQ_FIRST(&plist->head); uint8_t *flags = &ipl->qipl.qipl_flags; uint32_t *timeout = &ipl->qipl.boot_menu_timeout; const char *tmp; unsigned long splash_time = 0; if (!get_boot_device(0)) { if (boot_menu) { error_report("boot menu requires a bootindex to be specified for " "the IPL device"); } return; } switch (ipl->iplb.pbt) { case S390_IPL_TYPE_CCW: /* In the absence of -boot menu, use zipl parameters */ if (!qemu_opt_get(opts, "menu")) { *flags |= QIPL_FLAG_BM_OPTS_ZIPL; return; } break; case S390_IPL_TYPE_QEMU_SCSI: break; default: if (boot_menu) { error_report("boot menu is not supported for this device type"); } return; } if (!boot_menu) { return; } *flags |= QIPL_FLAG_BM_OPTS_CMD; tmp = qemu_opt_get(opts, "splash-time"); if (tmp && qemu_strtoul(tmp, NULL, 10, &splash_time)) { error_report("splash-time is invalid, forcing it to 0"); *timeout = 0; return; } if (splash_time > 0xffffffff) { error_report("splash-time is too large, forcing it to max value"); *timeout = 0xffffffff; return; } *timeout = cpu_to_be32(splash_time); }
static bool s390_gen_initial_iplb(S390IPLState *ipl) { DeviceState *dev_st; CcwDevice *ccw_dev = NULL; dev_st = get_boot_device(0); if (dev_st) { ccw_dev = s390_get_ccw_device(dev_st); } /* * Currently allow IPL only from CCW devices. */ if (ccw_dev) { SCSIDevice *sd = (SCSIDevice *) object_dynamic_cast(OBJECT(dev_st), TYPE_SCSI_DEVICE); if (sd) { ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_QEMU_SCSI_LEN); ipl->iplb.blk0_len = cpu_to_be32(S390_IPLB_MIN_QEMU_SCSI_LEN - S390_IPLB_HEADER_LEN); ipl->iplb.pbt = S390_IPL_TYPE_QEMU_SCSI; ipl->iplb.scsi.lun = cpu_to_be32(sd->lun); ipl->iplb.scsi.target = cpu_to_be16(sd->id); ipl->iplb.scsi.channel = cpu_to_be16(sd->channel); ipl->iplb.scsi.devno = cpu_to_be16(ccw_dev->sch->devno); ipl->iplb.scsi.ssid = ccw_dev->sch->ssid & 3; } else { VirtIONet *vn = (VirtIONet *) object_dynamic_cast(OBJECT(dev_st), TYPE_VIRTIO_NET); ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN); ipl->iplb.blk0_len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN - S390_IPLB_HEADER_LEN); ipl->iplb.pbt = S390_IPL_TYPE_CCW; ipl->iplb.ccw.devno = cpu_to_be16(ccw_dev->sch->devno); ipl->iplb.ccw.ssid = ccw_dev->sch->ssid & 3; if (vn) { ipl->netboot = true; } } if (!s390_ipl_set_loadparm(ipl->iplb.loadparm)) { ipl->iplb.flags |= DIAG308_FLAGS_LP_VALID; } return true; } return false; }
int checkboard(void) { printf("Board: MX6SoloLite-EVK (0x%x): [ ", fsl_system_rev); switch (__REG(SRC_BASE_ADDR + 0x8)) { case 0x0001: printf("POR"); break; case 0x0009: printf("RST"); break; case 0x0010: case 0x0011: printf("WDOG"); break; default: printf("unknown"); } printf(" ]\n"); printf("Boot Device: "); switch (get_boot_device()) { case WEIM_NOR_BOOT: printf("NOR\n"); break; case ONE_NAND_BOOT: printf("ONE NAND\n"); break; case I2C_BOOT: printf("I2C\n"); break; case SPI_NOR_BOOT: printf("SPI NOR\n"); break; case SD_BOOT: printf("SD\n"); break; case MMC_BOOT: printf("MMC\n"); break; case UNKNOWN_BOOT: default: printf("UNKNOWN\n"); break; } #ifdef CONFIG_SECURE_BOOT get_hab_status(); #endif return 0; }
static struct mmc_part *get_partition(AvbOps *ops, const char *partition) { int ret; u8 dev_num; int part_num = 0; struct mmc_part *part; struct blk_desc *mmc_blk; part = malloc(sizeof(struct mmc_part)); if (!part) return NULL; dev_num = get_boot_device(ops); part->mmc = find_mmc_device(dev_num); if (!part->mmc) { printf("No MMC device at slot %x\n", dev_num); return NULL; } if (mmc_init(part->mmc)) { printf("MMC initialization failed\n"); return NULL; } ret = mmc_switch_part(part->mmc, part_num); if (ret) return NULL; mmc_blk = mmc_get_blk_desc(part->mmc); if (!mmc_blk) { printf("Error - failed to obtain block descriptor\n"); return NULL; } ret = part_get_info_by_name(mmc_blk, partition, &part->info); if (!ret) { printf("Can't find partition '%s'\n", partition); return NULL; } part->dev_num = dev_num; part->mmc_blk = mmc_blk; return part; }
static bool s390_gen_initial_iplb(S390IPLState *ipl) { DeviceState *dev_st; dev_st = get_boot_device(0); if (dev_st) { VirtioCcwDevice *ccw_dev = (VirtioCcwDevice *) object_dynamic_cast( OBJECT(qdev_get_parent_bus(dev_st)->parent), TYPE_VIRTIO_CCW_DEVICE); if (ccw_dev) { ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN); ipl->iplb.blk0_len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN - S390_IPLB_HEADER_LEN); ipl->iplb.pbt = S390_IPL_TYPE_CCW; ipl->iplb.ccw.devno = cpu_to_be16(ccw_dev->sch->devno); ipl->iplb.ccw.ssid = ccw_dev->sch->ssid & 3; return true; } } return false; }
void s390_reipl_request(void) { S390IPLState *ipl = get_ipl_device(); ipl->reipl_requested = true; if (ipl->iplb_valid && !ipl->netboot && ipl->iplb.pbt == S390_IPL_TYPE_CCW && is_virtio_scsi_device(&ipl->iplb)) { CcwDevice *ccw_dev = s390_get_ccw_device(get_boot_device(0)); if (ccw_dev && cpu_to_be16(ccw_dev->sch->devno) == ipl->iplb.ccw.devno && (ccw_dev->sch->ssid & 3) == ipl->iplb.ccw.ssid) { /* * this is the original boot device's SCSI * so restore IPL parameter info from it */ ipl->iplb_valid = s390_gen_initial_iplb(ipl); } } qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); }
void board_fastboot_setup(void) { switch (get_boot_device()) { #if defined(CONFIG_FASTBOOT_STORAGE_MMC) case SD3_BOOT: case MMC3_BOOT: if (!getenv("fastboot_dev")) setenv("fastboot_dev", "mmc0"); if (!getenv("bootcmd")) setenv("bootcmd", "booti mmc0"); break; case SD4_BOOT: case MMC4_BOOT: if (!getenv("fastboot_dev")) setenv("fastboot_dev", "mmc1"); if (!getenv("bootcmd")) setenv("bootcmd", "booti mmc1"); break; #endif /*CONFIG_FASTBOOT_STORAGE_MMC*/ #if defined(CONFIG_FASTBOOT_STORAGE_NAND) case NAND_BOOT: if (!getenv("fastboot_dev")) setenv("fastboot_dev", "nand"); if (!getenv("fbparts")) setenv("fbparts", ANDROID_FASTBOOT_NAND_PARTS); if (!getenv("bootcmd")) setenv("bootcmd", "nand read ${loadaddr} ${boot_nand_offset} " "${boot_nand_size};booti ${loadaddr}"); break; #endif /*CONFIG_FASTBOOT_STORAGE_NAND*/ default: printf("unsupported boot devices\n"); break; } }
u32 spl_boot_device(void) { return get_boot_device(); }
/* * Initialization code. * Called from cold start routine as * soon as a stack and segmentation * have been established. * Functions: * clear and free user core * turn on clock * hand craft 0th process * call all initialization routines * fork - process 0 to schedule * - process 1 execute bootstrap */ int main() { register struct proc *p; register int i; register struct fs *fs = NULL; char inbuf[4]; char inch; int s __attribute__((unused)); startup(); printf ("\n%s", version); cpuidentify(); cnidentify(); /* * Set up system process 0 (swapper). */ p = &proc[0]; p->p_addr = (size_t) &u; p->p_stat = SRUN; p->p_flag |= SLOAD | SSYS; p->p_nice = NZERO; u.u_procp = p; /* init user structure */ u.u_cmask = CMASK; u.u_lastfile = -1; for (i = 1; i < NGROUPS; i++) u.u_groups[i] = NOGROUP; for (i = 0; i < sizeof(u.u_rlimit)/sizeof(u.u_rlimit[0]); i++) u.u_rlimit[i].rlim_cur = u.u_rlimit[i].rlim_max = RLIM_INFINITY; /* Initialize signal state for process 0 */ siginit (p); /* * Initialize tables, protocols, and set up well-known inodes. */ #ifdef LOG_ENABLED loginit(); #endif coutinit(); cinit(); pqinit(); ihinit(); bhinit(); binit(); nchinit(); clkstart(); s = spl0(); rdisk_init(); pipedev = rootdev = get_boot_device(); swapdev = get_swap_device(); /* Mount a root filesystem. */ for (;;) { if(rootdev!=-1) { fs = mountfs (rootdev, (boothowto & RB_RDONLY) ? MNT_RDONLY : 0, (struct inode*) 0); } if (fs) break; printf ("No root filesystem available!\n"); // rdisk_list_partitions(RDISK_FS); retry: printf ("Please enter device to boot from (press ? to list): "); inch=0; inbuf[0] = inbuf[1] = inbuf[2] = inbuf[3] = 0; while((inch=cngetc()) != '\r') { switch(inch) { case '?': printf("?\n"); rdisk_list_partitions(RDISK_FS); printf ("Please enter device to boot from (press ? to list): "); break; default: printf("%c",inch); inbuf[0] = inbuf[1]; inbuf[1] = inbuf[2]; inbuf[2] = inbuf[3]; inbuf[3] = inch; break; } } inch = 0; if(inbuf[0]=='r' && inbuf[1]=='d') { if(inbuf[2]>='0' && inbuf[2] < '0'+rdisk_num_disks()) { if(inbuf[3]>='a' && inbuf[3]<='d') { rootdev=makedev(inbuf[2]-'0',inbuf[3]-'a'+1); inch = 1; } } } else if(inbuf[1]=='r' && inbuf[2]=='d') { if(inbuf[3]>='0' && inbuf[3] < '0'+rdisk_num_disks()) { rootdev=makedev(inbuf[3]-'0',0); inch = 1; } } else if(inbuf[3] == 0) { inch = 1; } if(inch==0) { printf("\nUnknown device.\n\n"); goto retry; } printf ("\n\n"); } printf ("phys mem = %u kbytes\n", physmem / 1024); printf ("user mem = %u kbytes\n", MAXMEM / 1024); if(minor(rootdev)==0) { printf ("root dev = rd%d (%d,%d)\n", major(rootdev), major(rootdev), minor(rootdev) ); } else { printf ("root dev = rd%d%c (%d,%d)\n", major(rootdev), 'a'+minor(rootdev)-1, major(rootdev), minor(rootdev) ); } printf ("root size = %u kbytes\n", fs->fs_fsize * DEV_BSIZE / 1024); mount[0].m_inodp = (struct inode*) 1; /* XXX */ mount_updname (fs, "/", "root", 1, 4); time.tv_sec = fs->fs_time; boottime = time; /* Find a swap file. */ swapstart = 1; while(swapdev == -1) { printf("Please enter swap device (press ? to list): "); inbuf[0] = inbuf[1] = inbuf[2] = inbuf[3] = 0; while((inch = cngetc())!='\r') { switch(inch) { case '?': printf("?\n"); rdisk_list_partitions(RDISK_SWAP); printf("Please enter swap device (press ? to list): "); break; default: printf("%c",inch); inbuf[0] = inbuf[1]; inbuf[1] = inbuf[2]; inbuf[2] = inbuf[3]; inbuf[3] = inch; break; } } inch = 0; if(inbuf[0]=='r' && inbuf[1]=='d') { if(inbuf[2]>='0' && inbuf[2] < '0'+rdisk_num_disks()) { if(inbuf[3]>='a' && inbuf[3]<='d') { swapdev=makedev(inbuf[2]-'0',inbuf[3]-'a'+1); inch = 1; } } } else if(inbuf[1]=='r' && inbuf[2]=='d') { if(inbuf[3]>='0' && inbuf[3] < '0'+rdisk_num_disks()) { swapdev=makedev(inbuf[3]-'0',0); inch = 1; } } if(minor(swapdev)!=0) { if(partition_type(swapdev)!=RDISK_SWAP) { printf("\nNot a swap partition!\n\n"); swapdev=-1; } } } nswap = rdsize(swapdev); if(minor(swapdev)==0) { printf ("swap dev = rd%d (%d,%d)\n", major(swapdev), major(swapdev), minor(swapdev) ); } else { printf ("swap dev = rd%d%c (%d,%d)\n", major(swapdev), 'a'+minor(swapdev)-1, major(swapdev), minor(swapdev) ); } (*bdevsw[major(swapdev)].d_open)(swapdev, FREAD|FWRITE, S_IFBLK); printf ("swap size = %u kbytes\n", nswap * DEV_BSIZE / 1024); if (nswap <= 0) panic ("zero swap size"); /* don't want to panic, but what ? */ mfree (swapmap, nswap, swapstart); /* Kick off timeout driven events by calling first time. */ schedcpu (0); /* Set up the root file system. */ rootdir = iget (rootdev, &mount[0].m_filsys, (ino_t) ROOTINO); iunlock (rootdir); u.u_cdir = iget (rootdev, &mount[0].m_filsys, (ino_t) ROOTINO); iunlock (u.u_cdir); u.u_rdir = NULL; /* * Make init process. */ if (newproc (0) == 0) { /* Parent process with pid 0: swapper. * No return from sched. */ sched(); } /* Child process with pid 1: init. */ s = splhigh(); p = u.u_procp; p->p_dsize = icodeend - icode; p->p_daddr = USER_DATA_START; p->p_ssize = 1024; /* one kbyte of stack */ p->p_saddr = USER_DATA_END - 1024; bcopy ((caddr_t) icode, (caddr_t) USER_DATA_START, icodeend - icode); /* * return goes to location 0 of user init code * just copied out. */ return 0; }
void start_armboot (void) { init_fnc_t **init_fnc_ptr; uchar *buf; char boot_dev_name[8]; u32 si_type, omap4_rev; int len = 0; u8 val = SWITCH_OFF; image_type image; for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) { hang (); } } image.image = 2; image.val =99; omap4_rev = omap_revision(); if (omap4_rev >= OMAP4460_ES1_0) { omap_temp_sensor_check(); if (omap4_rev == OMAP4470_ES1_0) { writel(((TSHUT_HIGH_ADC_CODE << 16) | TSHUT_COLD_ADC_CODE), CORE_TSHUT_THRESHOLD); MV1(WK(CONTROL_SPARE_RW) , (M1)); } si_type = omap4_silicon_type(); if (si_type == PROD_ID_1_SILICON_TYPE_HIGH_PERF) printf("OMAP4470: 1.5 GHz capable SOM\n"); else if (si_type == PROD_ID_1_SILICON_TYPE_STD_PERF) printf("OMAP4470: 1.3 GHz capable SOM\n"); } #ifdef CONFIG_USBBOOT_ERASER /* Erase mlo and poweroff */ mlo_erase(); #else #ifdef CONFIG_USBBOOT /*usb boot does not check power button */ printf("boot_device=0x%x boot_mode=0x%x\n", get_boot_device(), get_boot_mode()); printf("id_code=%08x\n", readl(CONTROL_ID_CODE)); #endif #ifdef CONFIG_USBOOT_MEMTEST /* the device will power off after the test */ mem_test(); /*power off PMIC */ printf("Memtest done, powering off!\n"); select_bus(CFG_I2C_BUS, CFG_I2C_SPEED); val = SWITCH_OFF; i2c_write(TWL6030_PMC_ID, PHOENIX_DEV_ON, 1, &val, 1); /* we should never get here */ hang(); #endif #ifdef START_LOADB_DOWNLOAD strcpy(boot_dev_name, "UART"); do_load_serial_bin (CFG_LOADADDR, 115200); #else buf = (uchar *) (CFG_LOADADDR - 0x120); image.data = (uchar *) (CFG_LOADADDR - 0x120); switch (get_boot_device()) { #ifdef CONFIG_USBBOOT case 0x45: printf("boot_dev=USB\n"); strcpy(boot_dev_name, "USB"); /* read data from usb and write to sdram */ if (usb_read_bootloader(&len) != 0) { hang(); } printf("usb read len=%d\n", len); break; #else case 0x03: strcpy(boot_dev_name, "ONENAND"); #if defined(CFG_ONENAND) for (i = ONENAND_START_BLOCK; i < ONENAND_END_BLOCK; i++) { if (!onenand_read_block(buf, i)) buf += ONENAND_BLOCK_SIZE; else goto error; } #endif break; case 0x02: default: strcpy(boot_dev_name, "NAND"); #if defined(CFG_NAND) for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE) { if (!nand_read_block(buf, i)) buf += NAND_BLOCK_SIZE; /* advance buf ptr */ } #endif break; case 0x05: strcpy(boot_dev_name, "MMC/SD1"); #if defined(CONFIG_MMC) if (mmc_read_bootloader(0) != 0) goto error; #endif break; case 0x06: strcpy(boot_dev_name, "EMMC"); #if defined(CONFIG_MMC) if (mmc_read_bootloader(1) != 0) goto error; #endif break; #endif /* CONFIG_USBBOOT */ }; #endif SEC_ENTRY_Std_Ppa_Call ( PPA_SERV_HAL_BN_CHK , 1 , &image ); if ( image.val == 0 ) { /* go run U-Boot and never return */ printf("Starting OS Bootloader from %s ...\n", boot_dev_name); ((init_fnc_t *)CFG_LOADADDR)(); } /* should never come here */ #if defined(CFG_ONENAND) || defined(CONFIG_MMC) error: #endif printf("Could not read bootloader!\n"); hang(); #endif /* CONFIG_USBBOOT_ERASER */ }
void start_armboot (void) { init_fnc_t **init_fnc_ptr; uchar *buf; char boot_dev_name[8]; u32 si_type, omap4_rev; for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) { hang (); } } omap4_rev = omap_revision(); if (omap4_rev >= OMAP4460_ES1_0) { omap_temp_sensor_check(); if (omap4_rev == OMAP4470_ES1_0) { writel(((TSHUT_HIGH_ADC_CODE << 16) | TSHUT_COLD_ADC_CODE), CORE_TSHUT_THRESHOLD); MV1(WK(CONTROL_SPARE_RW) , (M1)); } si_type = omap4_silicon_type(); if (si_type == PROD_ID_1_SILICON_TYPE_HIGH_PERF) printf("OMAP4460: 1.5 GHz capable SOM\n"); else if (si_type == PROD_ID_1_SILICON_TYPE_STD_PERF) printf("OMAP4460: 1.2 GHz capable SOM\n"); } #ifdef START_LOADB_DOWNLOAD strcpy(boot_dev_name, "UART"); do_load_serial_bin (CFG_LOADADDR, 115200); #else buf = (uchar *) CFG_LOADADDR; switch (get_boot_device()) { case 0x03: strcpy(boot_dev_name, "ONENAND"); #if defined(CFG_ONENAND) for (i = ONENAND_START_BLOCK; i < ONENAND_END_BLOCK; i++) { if (!onenand_read_block(buf, i)) buf += ONENAND_BLOCK_SIZE; else goto error; } #endif break; case 0x02: default: strcpy(boot_dev_name, "NAND"); #if defined(CFG_NAND) for (i = NAND_UBOOT_START; i < NAND_UBOOT_END; i+= NAND_BLOCK_SIZE) { if (!nand_read_block(buf, i)) buf += NAND_BLOCK_SIZE; /* advance buf ptr */ } #endif break; case 0x05: strcpy(boot_dev_name, "MMC/SD1"); #if defined(CONFIG_MMC) if (mmc_read_bootloader(0) != 0) goto error; #endif break; case 0x06: strcpy(boot_dev_name, "EMMC"); #if defined(CONFIG_MMC) if (mmc_read_bootloader(1) != 0) goto error; #endif break; }; #endif /* go run U-Boot and never return */ printf("Starting OS Bootloader from %s ...\n", boot_dev_name); ((init_fnc_t *)CFG_LOADADDR)(); /* should never come here */ #if defined(CFG_ONENAND) || defined(CONFIG_MMC) error: #endif printf("Could not read bootloader!\n"); hang(); }