SelfDescribingJson Utils::get_desktop_context() {
if (!m_desktop_context) {
json data;
data[SNOWPLOW_DESKTOP_OS_TYPE] = get_os_type();
data[SNOWPLOW_DESKTOP_OS_VERSION] = get_os_version();
data[SNOWPLOW_DESKTOP_OS_SERVICE_PACK] = get_os_service_pack();
data[SNOWPLOW_DESKTOP_OS_IS_64_BIT] = get_os_is_64bit();
data[SNOWPLOW_DESKTOP_DEVICE_MANU] = get_device_manufacturer();
data[SNOWPLOW_DESKTOP_DEVICE_MODEL] = get_device_model();
data[SNOWPLOW_DESKTOP_DEVICE_PROC_COUNT] = get_device_processor_count();
m_desktop_context = new SelfDescribingJson(SNOWPLOW_SCHEMA_DESKTOP_CONTEXT, data);
}
SelfDescribingJson copy = *m_desktop_context;
return copy;
}
static int
dektec_probe (device_t dev)
{
switch (get_device_model (dev)) {
case BOARD_MODEL_140:
device_set_desc (dev, "DekTec DTA-140");
return BUS_PROBE_SPECIFIC;
case BOARD_MODEL_145:
device_set_desc (dev, "DekTec DTA-145");
return BUS_PROBE_SPECIFIC;
case BOARD_MODEL_2145:
device_set_desc (dev, "DekTec DTA-2145");
return BUS_PROBE_SPECIFIC;
default:
return ENXIO;
}
}
static int
dektec_attach (device_t dev)
{
int error = 0;
struct dektec_sc *sc = (struct dektec_sc *) device_get_softc (dev);
sc->dev = dev;
sc->model = get_device_model (dev);
TASK_INIT (&sc->task, 0, dektec_task, (void *) sc);
int unit = device_get_unit (dev);
if ((sc->cdev = make_dev (&dektec_cdevsw, unit, UID_ROOT, GID_OPERATOR, 0666, "dektec%d", unit)) == NULL)
goto make_dev;
sc->cdev->si_drv1 = sc;
uint32_t vendor_id = pci_get_vendor (dev);
sc->legacy_plx = vendor_id == PLX_PCI_VENDOR_ID;
if (sc->legacy_plx) {
sc->plx_base_id = PCIR_BAR (0);
sc->plx_base_res = bus_alloc_resource_any (dev, SYS_RES_MEMORY, &sc->plx_base_id, RF_ACTIVE);
if (sc->plx_base_res == NULL)
goto bus_alloc_resource_any_plx_reg;
sc->plx_base_bt = rman_get_bustag (sc->plx_base_res);
sc->plx_base_bh = rman_get_bushandle (sc->plx_base_res);
/* FIXME refactor dta_base */
sc->dta_base_id = PCIR_BAR (2);
sc->dta_base_res = bus_alloc_resource_any (dev, SYS_RES_MEMORY, &sc->dta_base_id, RF_ACTIVE);
if (sc->dta_base_res == NULL)
goto bus_alloc_resource_any_dta_base;
sc->dta_base_bt = rman_get_bustag (sc->dta_base_res);
sc->dta_base_bh = rman_get_bushandle (sc->dta_base_res);
/* DTA-140 */
sc->gen_base = 0x0000; /* FIXME make constant */
sc->tx_base = 0x0080;
sc->rx_base = 0x0100;
sc->dma_base0 = 0x0000;
sc->dma_base1 = 0x0000;
} else {
/* pCh->m_Dma.m_pRegBase = pBase; */
/* pCh->m_Dma.m_pRegDmaDesc = pBase + 0x4; */
/* pCh->m_Dma.m_pRegCmdStat = pBase + 0x8; */
/* FIXME refactor dta_base */
sc->dta_base_id = PCIR_BAR (0);
sc->dta_base_res = bus_alloc_resource_any (dev, SYS_RES_MEMORY, &sc->dta_base_id, RF_ACTIVE);
if (sc->dta_base_res == NULL)
goto bus_alloc_resource_any_dta_base;
sc->dta_base_bt = rman_get_bustag (sc->dta_base_res);
sc->dta_base_bh = rman_get_bushandle (sc->dta_base_res);
/* DTA-145 */
sc->gen_base = 0x0000; /* FIXME make constant */
/* program configurable channel */
// sc->tx_base = 0x0180; /* pFdo->m_TsTx[ti]->m_pRegBase = (char*)(pRegBase + 0x180 + (0x200*i)) */
sc->tx_base = 0x0380; /* pFdo->m_TsTx[ti]->m_pRegBase = (char*)(pRegBase + 0x180 + (0x200*i)) */
sc->rx_base = 0x0100; /* pFdo->m_TsRx[i]->m_pRegBase = (char*)(pRegBase + 0x100 + (0x200*i)) */
sc->dma_base0 = 0x0200;
sc->dma_base1 = 0x0400;
}
sc->irq_id = 0x0;
sc->irq_res = bus_alloc_resource_any (dev, SYS_RES_IRQ, &sc->irq_id, RF_SHAREABLE | RF_ACTIVE);
if (sc->irq_res == NULL)
goto bus_alloc_resource_any_irq;
error = bus_setup_intr (dev, sc->irq_res, INTR_TYPE_MISC, NULL, dektec_intr, sc, &sc->irq_cookie);
if (error)
goto bus_setup_intr;
error = bus_dma_tag_create (NULL, ASI_PLX_SEGMENT_ALIGN, 0,
BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
NULL, NULL,
BUFFER_MAX_DMA_SIZE,
BUFFER_MAX_DMA_SEGMENTS, BUFFER_MAX_DMA_SEGMENT_SIZE,
BUS_DMA_ALLOCNOW,
NULL, NULL,
&sc->buffer_dma_tag);
if (error)
goto bus_dma_tag_create_buffer;
error = bus_dma_tag_create (NULL, ASI_PLX_DESCRIPTOR_ALIGN, 0,
BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
NULL, NULL,
DESC_MAX_DMA_SIZE,
DESC_MAX_DMA_SEGMENTS, DESC_MAX_DMA_SEGMENT_SIZE,
BUS_DMA_ALLOCNOW,
NULL, NULL,
&sc->desc_dma_tag);
if (error)
goto bus_dma_tag_create_desc;
init_buffer (sc, &sc->tx_buffer);
init_buffer (sc, &sc->rx_buffer);
error = allocate_buffer (dev, sc, &sc->tx_buffer);
if (error)
goto allocate_tx_buffer;
error = allocate_buffer (dev, sc, &sc->rx_buffer);
if (error)
goto allocate_rx_buffer;
if (sc->legacy_plx) {
reset_plx (dev);
enable_plx (dev);
}
sc->fw_rev_gen = dta1xx_gen_ctrl_reg_get_firmware_rev (sc->dta_base_bt, sc->dta_base_bh, sc->gen_base);
sc->fw_rev_tx = dta1xx_tx_gen_ctrl_reg_get_firmware_rev (sc->dta_base_bt, sc->dta_base_bh, sc->tx_base);
sc->fw_rev_rx = dta1xx_rx_gen_ctrl_reg_get_firmware_rev (sc->dta_base_bt, sc->dta_base_bh, sc->rx_base);
mtx_init (&sc->dektec_mtx, "dektec", NULL, MTX_DEF);
device_printf (dev, "board model %d, firmware version %d (tx: %d, rx: %d), tx fifo %d MB\n",
dta1xx_rx_gen_ctrl_reg_get_type_number (sc->dta_base_bt, sc->dta_base_bh, sc->rx_base),
sc->fw_rev_gen, sc->fw_rev_tx, sc->fw_rev_rx,
dta1xx_tx_get_fifo_size_reg (sc->dta_base_bt, sc->dta_base_bh, sc->tx_base) / 1024);
goto done;
allocate_rx_buffer:
free_buffer (dev, sc, &sc->tx_buffer);
allocate_tx_buffer:
destroy_buffer (sc, &sc->rx_buffer);
destroy_buffer (sc, &sc->tx_buffer);
bus_dma_tag_destroy (sc->desc_dma_tag);
bus_dma_tag_create_desc:
bus_dma_tag_destroy (sc->buffer_dma_tag);
bus_dma_tag_create_buffer:
bus_teardown_intr (dev, sc->irq_res, sc->irq_cookie);
bus_setup_intr:
bus_release_resource (dev, SYS_RES_IRQ, sc->irq_id, sc->irq_res);
bus_alloc_resource_any_irq:
bus_release_resource (dev, SYS_RES_MEMORY, sc->dta_base_id, sc->dta_base_res);
bus_alloc_resource_any_dta_base:
bus_release_resource (dev, SYS_RES_MEMORY, sc->plx_base_id, sc->plx_base_res);
bus_alloc_resource_any_plx_reg:
destroy_dev (sc->cdev);
make_dev:
done:
return error;
}
