static void init_c3(struct cpuinfo_x86 *c)
{
uint64_t msr_content;
/* Test for Centaur Extended Feature Flags presence */
if (cpuid_eax(0xC0000000) >= 0xC0000001) {
u32 tmp = cpuid_edx(0xC0000001);
/* enable ACE unit, if present and disabled */
if ((tmp & (ACE_PRESENT | ACE_ENABLED)) == ACE_PRESENT) {
rdmsrl(MSR_VIA_FCR, msr_content);
/* enable ACE unit */
wrmsrl(MSR_VIA_FCR, msr_content | ACE_FCR);
printk(KERN_INFO "CPU: Enabled ACE h/w crypto\n");
}
/* enable RNG unit, if present and disabled */
if ((tmp & (RNG_PRESENT | RNG_ENABLED)) == RNG_PRESENT) {
rdmsrl(MSR_VIA_RNG, msr_content);
/* enable RNG unit */
wrmsrl(MSR_VIA_RNG, msr_content | RNG_ENABLE);
printk(KERN_INFO "CPU: Enabled h/w RNG\n");
}
}
if (c->x86 == 0x6 && c->x86_model >= 0xf) {
c->x86_cache_alignment = c->x86_clflush_size * 2;
__set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
}
get_model_name(c);
display_cacheinfo(c);
}
void show_info(struct cpudata *cpu)
{
if (silent)
return;
printf("EFamily: %u EModel: %u Family: %u Model: %u Stepping: %u\n",
cpu->efamily, cpu->emodel, cpu->family,
model(cpu), cpu->stepping);
printf("CPU Model: %s\n", cpu->name);
get_model_name(cpu);
switch (cpu->vendor) {
case VENDOR_AMD:
display_AMD_info(cpu);
break;
case VENDOR_CYRIX:
display_Cyrix_info(cpu);
break;
case VENDOR_CENTAUR:
display_centaur_info(cpu);
break;
case VENDOR_INTEL:
display_Intel_info(cpu);
break;
default:
break;
}
}
int main(int argc, char const *argv[])
{
std::string FILE="/homes/kgori/scratch/basic_pll/GGPS1.phy";
std::string PART="/homes/kgori/scratch/basic_pll/GGPS1.partitions.txt";
std::string TREE="/homes/kgori/scratch/basic_pll/GGPS1.tree";
auto inst = make_unique<pll>(FILE, PART, TREE, 1, 123);
std::cout << inst->get_likelihood() << std::endl;
std::cout << inst->get_partition_name(0) << std::endl;
std::cout << inst->get_model_name(0) << std::endl;
std::cout << inst->get_epsilon() << std::endl;
std::cout << inst->get_alpha(0) << std::endl;
std::cout << inst->get_number_of_partitions() << std::endl;
std::cout << inst->get_tree() << std::endl;
std::cout << inst->get_frac_change() << std::endl;
inst->set_tree("((Ptro:0.00147084048849247711,Ppan:0.00106294370976534763):0.00444598321816729036,(Cjac:0.05157798212603657839,(Csab:0.00440006365327790666,(Mmul:0.00652936575529242547,Panu:0.00101047194512476272):0.00381049900890796569):0.01359968787254225639):0.01375788728353777995,Hsap:0.00674547067186638278):0.0;");
inst->set_epsilon(0.001);
inst->set_alpha(2, 0, true);
auto ef = inst->get_empirical_frequencies();
inst->optimise(true, true, true, true);
inst->optimise_tree_search(true);
std::cout << inst->get_likelihood() << std::endl;
std::cout << inst->get_tree() << std::endl;
return 0;
}
/*******************************************************
* Main Function *
********************************************************/
main ()
{
open_configure();
printf("This relay has model name -> %s",get_model_name());
printf("The version number is -> %s",get_version_number());
printf("Relay status 1 is -> %d.\n", get_relay_status(1));
printf("Relay status 2 is -> %d.\n", get_relay_status(2));
printf("Relay status 3 is -> %d.\n", get_relay_status(3));
printf("Relay status 4 is -> %d.\n", get_relay_status(4));
printf("Relay 1 -> %s\n",switch_relay(1,1));
printf("Relay 2 -> %s\n",switch_relay(2,1));
printf("Relay 3 -> %s\n",switch_relay(3,1));
printf("Relay 4 -> %s\n",switch_relay(4,1));
printf("Relay status 1 is -> %d.\n", get_relay_status(1));
printf("Relay status 2 is -> %d.\n", get_relay_status(2));
printf("Relay status 3 is -> %d.\n", get_relay_status(3));
printf("Relay status 4 is -> %d.\n", get_relay_status(4));
printf("Relay 1 -> %s\n",switch_relay(1,0));
printf("Relay 2 -> %s\n",switch_relay(2,0));
printf("Relay 3 -> %s\n",switch_relay(3,0));
printf("Relay 4 -> %s\n",switch_relay(4,0));
printf("Relay status 1 is -> %d.\n", get_relay_status(1));
printf("Relay status 2 is -> %d.\n", get_relay_status(2));
printf("Relay status 3 is -> %d.\n", get_relay_status(3));
printf("Relay status 4 is -> %d.\n", get_relay_status(4));
close_device();
}
void VoxelEditor::save_as()
{
current_model = get_model_name(this, true);
set_window_file_path(this, current_model);
if (current_model.isEmpty())
// ok, user really doesn't want to save the model
return;
save();
}
void MainWindow::open_model()
{
QString name = get_model_name(this, false);
if (name.isEmpty())
return;
VoxelEditor * ed = new VoxelEditor(this);
QMdiSubWindow * w = mdi->addSubWindow(ed);
ed->load(name);
w->showMaximized();
}
static
int make_lgmon_command( char *command, char *option, int utilbyte, short is_direct ) /* Ver.3.20 add param */
{
char model_name[MODEL_NAME_STR_LEN] ;
int status = CANON_STS_SUCCESS ;
/* Ver.3.20 */
short add_direct = 0;
char *p_ppd_name = getenv("PPD");
ppd_file_t *p_ppd;
/* Ver.3.20 */
add_direct = is_direct;
if( (p_ppd = ppdOpenFile(p_ppd_name)) == NULL )
return CANON_STS_NG;
if( p_ppd->model_number < 356 ) add_direct = 0;
fprintf(stderr,"DEBUG: (cnijusb)p_ppd->model_number=(%d)\n",p_ppd->model_number);
ppdClose(p_ppd);
/* model name buffer initialization */
memset( model_name, 0x00, sizeof( model_name ) ) ;
/* model neme get */
if ( ( status = get_model_name( model_name ) ) == CANON_STS_SUCCESS ) {
/* making lgmon command */
if( utilbyte > 0 ){
if( add_direct == 1 ){ /* Ver.3.20 */
sprintf( command, "%s%s %s %s %s %s %d", LGMON_CMD_BASE_STR,
model_name,
LGMON_CMD_GUI_OPTIN_STR,
LGMON_CMD_CUPS_OPTIN_STR,
LGMON_CMD_DIRECT_OPTIN_STR,
LGMON_CMD_UTIL_OPTIN_STR,
utilbyte) ;
}
else{
sprintf( command, "%s%s %s %s %s %d", LGMON_CMD_BASE_STR,
model_name,
LGMON_CMD_GUI_OPTIN_STR,
LGMON_CMD_CUPS_OPTIN_STR,
LGMON_CMD_UTIL_OPTIN_STR,
utilbyte) ;
}
}
else{ /* in this case, CNBjDirect is never specified. */
sprintf( command, "%s%s %s %s", LGMON_CMD_BASE_STR,
model_name, LGMON_CMD_GUI_OPTIN_STR,
LGMON_CMD_CUPS_OPTIN_STR) ;
}
}
return( status ) ;
}
decklink_producer(const core::video_format_desc& format_desc, size_t device_index, const safe_ptr<core::frame_factory>& frame_factory, const std::wstring& filter)
: decklink_(get_device(device_index))
, input_(decklink_)
, attributes_(decklink_)
, model_name_(get_model_name(decklink_))
, device_index_(device_index)
, filter_(filter)
, format_desc_(format_desc)
, audio_cadence_(format_desc.audio_cadence)
, muxer_(format_desc.fps, frame_factory, filter)
, sync_buffer_(format_desc.audio_cadence.size())
, frame_factory_(frame_factory)
{
hints_ = 0;
frame_buffer_.set_capacity(2);
graph_->set_color("tick-time", diagnostics::color(0.0f, 0.6f, 0.9f));
graph_->set_color("late-frame", diagnostics::color(0.6f, 0.3f, 0.3f));
graph_->set_color("frame-time", diagnostics::color(1.0f, 0.0f, 0.0f));
graph_->set_color("dropped-frame", diagnostics::color(0.3f, 0.6f, 0.3f));
graph_->set_color("output-buffer", diagnostics::color(0.0f, 1.0f, 0.0f));
graph_->set_text(print());
diagnostics::register_graph(graph_);
auto display_mode = get_display_mode(input_, format_desc_.format, bmdFormat8BitYUV, bmdVideoInputFlagDefault);
// NOTE: bmdFormat8BitARGB is currently not supported by any decklink card. (2011-05-08)
if(FAILED(input_->EnableVideoInput(display_mode, bmdFormat8BitYUV, bmdVideoInputFlagDefault)))
BOOST_THROW_EXCEPTION(caspar_exception()
<< msg_info(narrow(print()) + " Could not enable video input.")
<< boost::errinfo_api_function("EnableVideoInput"));
if(FAILED(input_->EnableAudioInput(bmdAudioSampleRate48kHz, bmdAudioSampleType32bitInteger, format_desc_.audio_channels)))
BOOST_THROW_EXCEPTION(caspar_exception()
<< msg_info(narrow(print()) + " Could not enable audio input.")
<< boost::errinfo_api_function("EnableAudioInput"));
if (FAILED(input_->SetCallback(this)) != S_OK)
BOOST_THROW_EXCEPTION(caspar_exception()
<< msg_info(narrow(print()) + " Failed to set input callback.")
<< boost::errinfo_api_function("SetCallback"));
if(FAILED(input_->StartStreams()))
BOOST_THROW_EXCEPTION(caspar_exception()
<< msg_info(narrow(print()) + " Failed to start input stream.")
<< boost::errinfo_api_function("StartStreams"));
}
static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
{
unsigned int cap_mask, uk, max, dummy;
unsigned int cms_rev1, cms_rev2;
unsigned int cpu_rev, cpu_freq, cpu_flags, new_cpu_rev;
char cpu_info[65];
get_model_name(c); /* Same as AMD/Cyrix */
display_cacheinfo(c);
/* Print CMS and CPU revision */
max = cpuid_eax(0x80860000);
cpu_rev = 0;
if ( max >= 0x80860001 ) {
cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
if (cpu_rev != 0x02000000) {
printk(KERN_INFO "CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
(cpu_rev >> 24) & 0xff,
(cpu_rev >> 16) & 0xff,
(cpu_rev >> 8) & 0xff,
cpu_rev & 0xff,
cpu_freq);
}
int parse_args(int argc, char **argv, simengine_opts *opts){
int arg;
int option_index = 0;
memset(opts, 0, sizeof(simengine_opts));
while(1){
arg = getopt_long(argc, argv, "", long_options, &option_index);
if(-1 == arg)
break;
switch(arg){
case HELP:
print_usage();
return 1;
break;
case START:
if(opts->start_time){
printf("ERROR: start time was already set.\n");
return 1;
}
opts->start_time = atof(optarg);
if(!__finite(opts->start_time)){
printf("Error: start time is invalid %f.\n", opts->start_time);
return 1;
}
//printf("Start %s -> %f\n", optarg, opts->start_time);
break;
case STOP:
if(opts->stop_time){
printf("ERROR: stop time was already set.\n");
return 1;
}
opts->stop_time = atof(optarg);
if(!__finite(opts->stop_time)){
printf("Error: start time is invalid %f.\n", opts->stop_time);
return 1;
}
//printf("Stop %s -> %f\n", optarg, opts->stop_time);
break;
case MODELS:
if(opts->num_models){
printf("ERROR: number of models was already set.\n");
return 1;
}
opts->num_models = atoi(optarg);
if(opts->num_models < 1){
printf("ERROR: invalud number of models %d\n", opts->num_models);
return 1;
}
//printf("Number of models %d\n", opts->num_models);
break;
case INPUT_FILE:
opts->inputs_filename = optarg;
opts->inputs = fopen(opts->inputs_filename, "r");
if(!opts->inputs){
printf("ERROR: Could not open input file '%s'.\n", opts->inputs_filename);
return 1;
}
break;
case STATE_INIT_FILE:
opts->states_filename = optarg;
opts->states = fopen(opts->states_filename, "r");
if(!opts->states){
printf("ERROR: Could not open state initial value file '%s'.\n", opts->states_filename);
return 1;
}
break;
case OUTPUT_FILE:
opts->outputs_filename = optarg;
opts->outputs = fopen(opts->outputs_filename, "w");
if(!opts->outputs){
printf("ERROR: Could not open output file '%s'.\n", opts->outputs_filename);
return 1;
}
break;
case CPU:
if(opts->target){
printf("ERROR: target already set\n");
return 1;
}
opts->target = "CPU";
//printf("Target CPU\n");
break;
case OPENMP:
if(opts->target){
printf("ERROR: target already set\n");
return 1;
}
opts->target = "OPENMP";
//printf("Target Parallel CPU\n");
break;
case GPU:
if(opts->target){
printf("ERROR: target already set\n");
return 1;
}
opts->target = "GPU";
//printf("Target GPU\n");
break;
case FLOAT:
if(opts->precision){
printf("ERROR: precision already set\n");
return 1;
}
opts->precision = "float";
//printf("Single precision\n");
break;
case DOUBLE:
if(opts->precision){
printf("ERROR: precision already set\n");
return 1;
}
opts->precision = "double";
//printf("Double precision\n");
break;
case DEBUG:
opts->debug = 1;
printf("Debugging enabled\n");
break;
case EMULATE:
opts->emulate = 1;
printf("Emulation enabled\n");
break;
case PROFILE:
opts->profile = 1;
printf("Profiling enabled\n");
break;
case REMAKE:
opts->remake = 1;
printf("Skipping simEngine compilation and only recompiling C code.\n");
break;
case NOCOMPILE:
opts->nocompile = 1;
printf("Skipping all compilation and executing simulation.\n");
break;
default:
printf("ERROR: invalid argument %s\n", argv[optind]);
return 1;
}
}
if(optind+1 < argc){
printf("Error: too many models passed to simex\n");
while(optind < argc)
printf("\t%s\n", argv[optind++]);
return 1;
}
if(optind == argc){
printf("Error: no model passed to simex\n");
return 1;
}
opts->model_file = argv[optind];
opts->model_name = get_model_name(opts->model_file);
//printf("DSL model file '%s'.\n", opts->model_file);
if(opts->stop_time < opts->start_time){
printf("ERROR: stop time (%f) must be greater than start time (%f)\n",
opts->stop_time, opts->start_time);
return 1;
}
// Set defaults for any unset options
if(!opts->target){
opts->target = "CPU";
}
if(!opts->num_models){
opts->num_models = 1;
}
if(!opts->precision){
opts->precision = "double";
}
if(!opts->outputs){
opts->outputs = stdout;
}
return 0;
}
static void __cpuinit init_amd(struct cpuinfo_x86 *c)
{
u32 l, h;
int mbytes = num_physpages >> (20-PAGE_SHIFT);
int r;
#ifdef CONFIG_SMP
unsigned long long value;
/* Disable TLB flush filter by setting HWCR.FFDIS on K8
* bit 6 of msr C001_0015
*
* Errata 63 for SH-B3 steppings
* Errata 122 for all steppings (F+ have it disabled by default)
*/
if (c->x86 == 15) {
rdmsrl(MSR_K7_HWCR, value);
value |= 1 << 6;
wrmsrl(MSR_K7_HWCR, value);
}
#endif
early_init_amd(c);
/*
* FIXME: We should handle the K5 here. Set up the write
* range and also turn on MSR 83 bits 4 and 31 (write alloc,
* no bus pipeline)
*/
/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
clear_bit(0*32+31, c->x86_capability);
r = get_model_name(c);
switch(c->x86)
{
case 4:
/*
* General Systems BIOSen alias the cpu frequency registers
* of the Elan at 0x000df000. Unfortuantly, one of the Linux
* drivers subsequently pokes it, and changes the CPU speed.
* Workaround : Remove the unneeded alias.
*/
#define CBAR (0xfffc) /* Configuration Base Address (32-bit) */
#define CBAR_ENB (0x80000000)
#define CBAR_KEY (0X000000CB)
if (c->x86_model==9 || c->x86_model == 10) {
if (inl (CBAR) & CBAR_ENB)
outl (0 | CBAR_KEY, CBAR);
}
break;
case 5:
if( c->x86_model < 6 )
{
/* Based on AMD doc 20734R - June 2000 */
if ( c->x86_model == 0 ) {
clear_bit(X86_FEATURE_APIC, c->x86_capability);
set_bit(X86_FEATURE_PGE, c->x86_capability);
}
break;
}
if ( c->x86_model == 6 && c->x86_mask == 1 ) {
const int K6_BUG_LOOP = 1000000;
int n;
void (*f_vide)(void);
unsigned long d, d2;
printk(KERN_INFO "AMD K6 stepping B detected - ");
/*
* It looks like AMD fixed the 2.6.2 bug and improved indirect
* calls at the same time.
*/
n = K6_BUG_LOOP;
f_vide = vide;
rdtscl(d);
while (n--)
f_vide();
rdtscl(d2);
d = d2-d;
if (d > 20*K6_BUG_LOOP)
printk("system stability may be impaired when more than 32 MB are used.\n");
else
printk("probably OK (after B9730xxxx).\n");
printk(KERN_INFO "Please see http://membres.lycos.fr/poulot/k6bug.html\n");
}
/* K6 with old style WHCR */
if (c->x86_model < 8 ||
(c->x86_model== 8 && c->x86_mask < 8)) {
/* We can only write allocate on the low 508Mb */
if(mbytes>508)
mbytes=508;
rdmsr(MSR_K6_WHCR, l, h);
if ((l&0x0000FFFF)==0) {
unsigned long flags;
l=(1<<0)|((mbytes/4)<<1);
local_irq_save(flags);
wbinvd();
wrmsr(MSR_K6_WHCR, l, h);
local_irq_restore(flags);
printk(KERN_INFO "Enabling old style K6 write allocation for %d Mb\n",
mbytes);
}
break;
}
if ((c->x86_model == 8 && c->x86_mask >7) ||
c->x86_model == 9 || c->x86_model == 13) {
/* The more serious chips .. */
if(mbytes>4092)
mbytes=4092;
rdmsr(MSR_K6_WHCR, l, h);
if ((l&0xFFFF0000)==0) {
unsigned long flags;
l=((mbytes>>2)<<22)|(1<<16);
local_irq_save(flags);
wbinvd();
wrmsr(MSR_K6_WHCR, l, h);
local_irq_restore(flags);
printk(KERN_INFO "Enabling new style K6 write allocation for %d Mb\n",
mbytes);
}
/* Set MTRR capability flag if appropriate */
if (c->x86_model == 13 || c->x86_model == 9 ||
(c->x86_model == 8 && c->x86_mask >= 8))
set_bit(X86_FEATURE_K6_MTRR, c->x86_capability);
break;
}
if (c->x86_model == 10) {
/* AMD Geode LX is model 10 */
/* placeholder for any needed mods */
break;
}
break;
case 6: /* An Athlon/Duron */
/* Bit 15 of Athlon specific MSR 15, needs to be 0
* to enable SSE on Palomino/Morgan/Barton CPU's.
* If the BIOS didn't enable it already, enable it here.
*/
if (c->x86_model >= 6 && c->x86_model <= 10) {
if (!cpu_has(c, X86_FEATURE_XMM)) {
printk(KERN_INFO "Enabling disabled K7/SSE Support.\n");
rdmsr(MSR_K7_HWCR, l, h);
l &= ~0x00008000;
wrmsr(MSR_K7_HWCR, l, h);
set_bit(X86_FEATURE_XMM, c->x86_capability);
}
}
/* It's been determined by AMD that Athlons since model 8 stepping 1
* are more robust with CLK_CTL set to 200xxxxx instead of 600xxxxx
* As per AMD technical note 27212 0.2
*/
if ((c->x86_model == 8 && c->x86_mask>=1) || (c->x86_model > 8)) {
rdmsr(MSR_K7_CLK_CTL, l, h);
if ((l & 0xfff00000) != 0x20000000) {
printk ("CPU: CLK_CTL MSR was %x. Reprogramming to %x\n", l,
((l & 0x000fffff)|0x20000000));
wrmsr(MSR_K7_CLK_CTL, (l & 0x000fffff)|0x20000000, h);
}
}
break;
}
static void __cpuinit
identify_cpu (struct cpuinfo_ia64 *c)
{
union {
unsigned long bits[5];
struct {
/* id 0 & 1: */
char vendor[16];
/* id 2 */
u64 ppn; /* processor serial number */
/* id 3: */
unsigned number : 8;
unsigned revision : 8;
unsigned model : 8;
unsigned family : 8;
unsigned archrev : 8;
unsigned reserved : 24;
/* id 4: */
u64 features;
} field;
} cpuid;
pal_vm_info_1_u_t vm1;
pal_vm_info_2_u_t vm2;
pal_status_t status;
unsigned long impl_va_msb = 50, phys_addr_size = 44; /* Itanium defaults */
int i;
for (i = 0; i < 5; ++i)
cpuid.bits[i] = ia64_get_cpuid(i);
memcpy(c->vendor, cpuid.field.vendor, 16);
#ifdef CONFIG_SMP
c->cpu = smp_processor_id();
/* below default values will be overwritten by identify_siblings()
* for Multi-Threading/Multi-Core capable cpu's
*/
c->threads_per_core = c->cores_per_socket = c->num_log = 1;
c->socket_id = -1;
identify_siblings(c);
#endif
c->ppn = cpuid.field.ppn;
c->number = cpuid.field.number;
c->revision = cpuid.field.revision;
c->model = cpuid.field.model;
c->family = cpuid.field.family;
c->archrev = cpuid.field.archrev;
c->features = cpuid.field.features;
c->model_name = get_model_name(c->family, c->model);
status = ia64_pal_vm_summary(&vm1, &vm2);
if (status == PAL_STATUS_SUCCESS) {
impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
}
c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
}
static
int check_options( FILE** fp, short *is_setregi, int *utilbyte,
char* tmp_file, char* option , short *is_direct)
{
cups_option_t *p_opt = NULL;
int num_opt = 0;
int i,result = 0;
short regi_flag=0;
short direct_flag=0;
int cmdlen = 0;
int bscc_id = 0;
if( (num_opt = cupsParseOptions(option, 0, &p_opt)) > 0 ){
for( i=0; i< num_opt; i++ ){
/* bscc */
if( strcmp( p_opt[i].name, REGI_OPTION)== 0){
bscc_id = atoi(p_opt[i].value);
regi_flag = 1;
}
else if( strcmp( p_opt[i].name, UTIL_OPTION)== 0 ){
cmdlen = atoi(p_opt[i].value);
*utilbyte = cmdlen;
}
/* Ver.3.20 */
else if( strcmp( p_opt[i].name, DIRECT_OPTION)== 0 ){
direct_flag = 1;
}
}
}
if( regi_flag ){
char model_name[MODEL_NAME_STR_LEN] ;
char bscc_file[256];
char bscc_buf[256];
char cmd_buf[512];
int r_size,total_size;
FILE* tmp_fp = NULL;
sprintf( tmp_file, "/tmp/CNBjBackend%d", getpid());
// if( (tmp_fp =fopen( tmp_file, "w")) == NULL )
if( (tmp_fp =fopen( tmp_file, "w+b")) == NULL ){ /* Ver.2.90 */
fprintf(stderr,"CNBjBackend open_error\n");
goto open_error;
}
total_size = cmdlen;
while( total_size > 0 ){
r_size = fread( cmd_buf, 1,total_size,(FILE*)(*fp) );
fwrite( cmd_buf, r_size, 1, tmp_fp);
total_size -= r_size;
}
fseek( tmp_fp, 0, SEEK_SET );
r_size = fread( bscc_buf, 1, 256, (FILE*)(*fp) );
fprintf(stderr,"bscc_buf r_size=%d\n",r_size);
/* bscc file */
get_model_name( model_name );
sprintf( bscc_file, "%scif%s.bscc", BSCCFILEPATH, model_name );
//sprintf( bscc_file, "%sbjfilter%s.bscc", BSCCFILEPATH, model_name );
if( write_to_bsccfile( bscc_file, bscc_buf, bscc_id ) )
result = -1;
*fp = tmp_fp;
}
*is_setregi = regi_flag;
*is_direct = direct_flag; /* Ver.3.20 */
cupsFreeOptions( num_opt, p_opt );
return result;
open_error:
cupsFreeOptions( num_opt, p_opt );
return -1;
}
