/**
* Checks whether node high is a sign extension of low.
*/
static bool is_sign_extend(ir_node *low, ir_node *high)
{
if (is_Shrs(high)) {
ir_node *high_r = get_Shrs_right(high);
if (!is_Const(high_r)) return false;
ir_tarval *shift_count = get_Const_tarval(high_r);
if (!tarval_is_long(shift_count)) return false;
if (get_tarval_long(shift_count) != 31) return false;
ir_node *high_l = get_Shrs_left(high);
if (is_Conv(low) && get_Conv_op(low) == high_l) return true;
if (is_Conv(high_l) && get_Conv_op(high_l) == low) return true;
} else if (is_Const(low) && is_Const(high)) {
ir_tarval *tl = get_Const_tarval(low);
ir_tarval *th = get_Const_tarval(high);
if (tarval_is_long(th) && tarval_is_long(tl)) {
long l = get_tarval_long(tl);
long h = get_tarval_long(th);
return (h == 0 && l >= 0) || (h == -1 && l < 0);
}
}
return false;
}
bool x86_match_immediate(x86_imm32_t *immediate, const ir_node *node,
char const constraint)
{
ir_mode *const mode = get_irn_mode(node);
if (get_mode_arithmetic(mode) != irma_twos_complement)
return false;
ir_tarval *offset;
ir_entity *entity;
if (!be_match_immediate(node, &offset, &entity))
return false;
long val = 0;
if (offset) {
if (!tarval_is_long(offset)) {
be_warningf(node, "tarval is not long");
return false;
}
val = get_tarval_long(offset);
if (!check_immediate_constraint(val, constraint))
return false;
}
if (entity != NULL) {
/* we need full 32bits for entities */
if (constraint != 'i' && constraint != 'g')
return false;
}
/* we are fine */
immediate->entity = entity;
immediate->offset = (int32_t)val;
return true;
}
long fold_expression_to_int(const expression_t *expression)
{
ir_tarval *tv = fold_expression(expression);
if (!tarval_is_long(tv)) {
panic("result of constant folding is not integer");
}
return get_tarval_long(tv);
}
static bool eat_imm(x86_address_t *const addr, ir_node const *const node,
bool basereg_usable)
{
switch (get_irn_opcode(node)) {
case iro_Add:
/* Add is supported as long as both operands are immediates. */
return
!x86_is_non_address_mode_node(node) &&
eat_imm(addr, get_Add_left(node), basereg_usable) &&
eat_imm(addr, get_Add_right(node), basereg_usable);
case iro_Address:
/* The first Address of a DAG can be folded into an immediate. */
if (addr->imm.entity)
return false;
addr->imm.entity = get_Address_entity(node);
addr->imm.kind = X86_IMM_ADDR;
if (is_tls_entity(addr->imm.entity))
addr->tls_segment = true;
return true;
case iro_Const: {
/* Add the value to the offset. */
ir_tarval *const tv = get_Const_tarval(node);
if (!tarval_possible(tv))
return false;
addr->imm.offset += get_tarval_long(tv);
return true;
}
case iro_Unknown:
/* Use '0' for Unknowns. */
return true;
default:
if (be_is_Relocation(node)) {
if (addr->imm.entity)
return false;
addr->imm.entity = be_get_Relocation_entity(node);
x86_immediate_kind_t const kind
= (x86_immediate_kind_t)be_get_Relocation_kind(node);
addr->imm.kind = kind;
if (kind == X86_IMM_GOTPCREL || kind == X86_IMM_PCREL) {
if (!basereg_usable)
return false;
addr->ip_base = true;
}
return true;
}
/* All other nodes are no immediates. */
return false;
}
}
static bool tarval_possible(ir_tarval *tv)
{
ir_mode *mode = get_tarval_mode(tv);
if (get_mode_size_bits(mode) <= 32) {
assert(tarval_is_long(tv));
return true;
}
if (!tarval_is_long(tv))
return false;
/* immediates on x86_64 are at most 32bit and get sign extended */
long val = get_tarval_long(tv);
int32_t val32 = (long)val;
return val == (long)val32;
}
/**
* Try to place a Shl into an address mode.
*
* @param addr the address mode data so far
* @param node the node to place
* @return true on success
*/
static bool eat_shl(x86_address_t *addr, ir_node *node)
{
/* we can only eat a shl if we don't have a scale or index set yet */
if (addr->scale != 0 || addr->index != NULL)
return false;
ir_node *shifted_val;
long val;
if (is_Shl(node)) {
/* we can use shl with 0,1,2 or 3 shift */
ir_node *right = get_Shl_right(node);
if (!is_Const(right))
return false;
ir_tarval *tv = get_Const_tarval(right);
if (!tarval_is_long(tv))
return false;
val = get_tarval_long(tv);
if (val < 0 || val > 3)
return false;
if (val == 0)
be_warningf(node, "found unoptimized Shl x,0");
shifted_val = get_Shl_left(node);
} else if (is_Add(node)) {
/* might be an add x, x */
ir_node *left = get_Add_left(node);
ir_node *right = get_Add_right(node);
if (left != right)
return false;
if (is_Const(left))
return false;
val = 1;
shifted_val = left;
} else {
return false;
}
if (x86_is_non_address_mode_node(node))
return false;
addr->scale = val;
addr->index = shifted_val;
return true;
}
void x86_create_address_mode(x86_address_t *addr, ir_node *node,
x86_create_am_flags_t flags)
{
addr->imm.kind = X86_IMM_VALUE;
if (eat_immediate(addr, node, true)) {
addr->variant = addr->ip_base ? X86_ADDR_RIP : X86_ADDR_JUST_IMM;
return;
}
assert(!addr->ip_base);
if (!(flags & x86_create_am_force) && x86_is_non_address_mode_node(node)
&& (!(flags & x86_create_am_double_use) || get_irn_n_edges(node) > 2)) {
addr->variant = X86_ADDR_BASE;
addr->base = node;
return;
}
ir_node *eat_imms = eat_immediates(addr, node, flags, false);
if (eat_imms != node) {
if (flags & x86_create_am_force)
eat_imms = be_skip_downconv(eat_imms, true);
node = eat_imms;
if (x86_is_non_address_mode_node(node)) {
addr->variant = X86_ADDR_BASE;
addr->base = node;
return;
}
}
/* starting point Add, Sub or Shl, FrameAddr */
if (is_Shl(node)) {
/* We don't want to eat add x, x as shl here, so only test for real Shl
* instructions, because we want the former as Lea x, x, not Shl x, 1 */
if (eat_shl(addr, node)) {
addr->variant = X86_ADDR_INDEX;
return;
}
} else if (eat_immediate(addr, node, true)) {
/* we can hit this case in x86_create_am_force mode */
addr->variant = addr->ip_base ? X86_ADDR_RIP : X86_ADDR_JUST_IMM;
return;
} else if (is_Add(node)) {
ir_node *left = get_Add_left(node);
ir_node *right = get_Add_right(node);
if (flags & x86_create_am_force) {
left = be_skip_downconv(left, true);
right = be_skip_downconv(right, true);
}
left = eat_immediates(addr, left, flags, false);
right = eat_immediates(addr, right, flags, false);
if (eat_shl(addr, left)) {
left = NULL;
} else if (eat_shl(addr, right)) {
right = NULL;
}
/* (x & 0xFFFFFFFC) + (x >> 2) -> lea(x >> 2, x >> 2, 4) */
if (left != NULL && right != NULL) {
ir_node *and;
ir_node *shr;
if (is_And(left) && (is_Shr(right) || is_Shrs(right))) {
and = left;
shr = right;
goto tryit;
}
if (is_And(right) && (is_Shr(left) || is_Shrs(left))) {
and = right;
shr = left;
tryit:
if (get_And_left(and) == get_binop_left(shr)) {
ir_node *and_right = get_And_right(and);
ir_node *shr_right = get_binop_right(shr);
if (is_Const(and_right) && is_Const(shr_right)) {
ir_tarval *and_mask = get_Const_tarval(and_right);
ir_tarval *shift_amount = get_Const_tarval(shr_right);
ir_mode *mode = get_irn_mode(and);
ir_tarval *all_one = get_mode_all_one(mode);
ir_tarval *shift_mask = tarval_shl(tarval_shr(all_one, shift_amount), shift_amount);
long val = get_tarval_long(shift_amount);
if (and_mask == shift_mask && val >= 0 && val <= 3) {
addr->variant = X86_ADDR_BASE_INDEX;
addr->base = shr;
addr->index = shr;
addr->scale = val;
return;
}
}
}
}
}
if (left != NULL) {
ir_node *base = addr->base;
if (base == NULL) {
addr->variant = addr->index != NULL ? X86_ADDR_BASE_INDEX
: X86_ADDR_BASE;
addr->base = left;
} else {
addr->variant = X86_ADDR_BASE_INDEX;
assert(addr->index == NULL && addr->scale == 0);
assert(right == NULL);
/* esp must be used as base */
if (is_Proj(left) && is_Start(get_Proj_pred(left))) {
addr->index = base;
addr->base = left;
} else {
addr->index = left;
}
}
}
if (right != NULL) {
ir_node *base = addr->base;
if (base == NULL) {
addr->variant = addr->index != NULL ? X86_ADDR_BASE_INDEX
: X86_ADDR_BASE;
addr->base = right;
} else {
addr->variant = X86_ADDR_BASE_INDEX;
assert(addr->index == NULL && addr->scale == 0);
/* esp must be used as base */
if (is_Proj(right) && is_Start(get_Proj_pred(right))) {
addr->index = base;
addr->base = right;
} else {
addr->index = right;
}
}
}
return;
}
addr->variant = X86_ADDR_BASE;
addr->base = node;
}
