static int init_sunxi_hci(struct sunxi_hci_hcd *sunxi_hci, u32 usbc_no, u32 ohci, const char *hci_name)
{
s32 ret = 0;
memset(sunxi_hci, 0, sizeof(struct sunxi_hci_hcd));
sunxi_hci->usbc_no = usbc_no;
sunxi_hci->usbc_type = ohci ? SUNXI_USB_OHCI : SUNXI_USB_EHCI;
if(ohci){
sunxi_hci->irq_no = ohci_irq_no[sunxi_hci->usbc_no];
}else{
sunxi_hci->irq_no = ehci_irq_no[sunxi_hci->usbc_no];
}
sprintf(sunxi_hci->hci_name, "%s%d", hci_name, sunxi_hci->usbc_no);
sunxi_hci->usb_vbase = (void __iomem *)usbc_base[sunxi_hci->usbc_no];
sunxi_hci->sram_vbase = (void __iomem *)SUNXI_SRAMCTRL_VBASE;
sunxi_hci->clock_vbase = (void __iomem *)SUNXI_CCM_VBASE;
sunxi_hci->gpio_vbase = (void __iomem *)SUNXI_PIO_VBASE;
sunxi_hci->sdram_vbase = (void __iomem *)SUNXI_SDMMC1_VBASE;
get_usb_cfg(sunxi_hci);
request_usb_regulator_io(sunxi_hci);
sunxi_hci->open_clock = open_clock;
sunxi_hci->close_clock = close_clock;
sunxi_hci->set_power = sunxi_set_vbus;
sunxi_hci->usb_passby = usb_passby;
sunxi_hci->port_configure = hci_port_configure;
#ifdef CONFIG_USB_SUNXI_HSIC
u32 reg_value = 0;
reg_value = USBC_Readl(sunxi_hci->sram_vbase+ SUNXI_USB_PMU_IRQ_ENABLE);
reg_value |= (1 << 1);
reg_value |= (1 << 20);
reg_value |= (1 << 17);
USBC_Writel(reg_value, (sunxi_hci->sram_vbase+ SUNXI_USB_PMU_IRQ_ENABLE));
#endif
#ifndef CONFIG_ARCH_SUN9IW1
#ifdef SUNXI_USB_FPGA
fpga_config_use_hci((__u32 __force)sunxi_hci->sram_vbase);
#endif
#endif
ret = clock_init(sunxi_hci, ohci);
if(ret != 0){
DMSG_PANIC("ERR: clock_init failed\n");
goto failed1;
}
print_sunxi_hci(sunxi_hci);
return 0;
failed1:
return -1;
}
/*
*******************************************************************************
* init_sw_hci
*
* Description:
* void
*
* Parameters:
* void
*
* Return value:
* void
*
* note:
* void
*
*******************************************************************************
*/
static int init_sw_hci(struct sw_hci_hcd *sw_hci, u32 usbc_no, u32 ohci, const char *hci_name)
{
s32 ret = 0;
memset(sw_hci, 0, sizeof(struct sw_hci_hcd));
sw_hci->usbc_no = usbc_no;
sw_hci->usbc_type = ohci ? SW_USB_OHCI : SW_USB_EHCI;
if(ohci){
sw_hci->irq_no = ohci_irq_no[sw_hci->usbc_no];
}else{
sw_hci->irq_no = ehci_irq_no[sw_hci->usbc_no];
}
sprintf(sw_hci->hci_name, "%s%d", hci_name, sw_hci->usbc_no);
sw_hci->usb_vbase = (void __iomem *)usbc_base[sw_hci->usbc_no];
sw_hci->sram_vbase = (void __iomem *)SW_VA_SRAM_IO_BASE;
sw_hci->clock_vbase = (void __iomem *)SW_VA_CCM_IO_BASE;
sw_hci->gpio_vbase = (void __iomem *)SW_VA_PORTC_IO_BASE;
sw_hci->sdram_vbase = (void __iomem *)SW_VA_DRAM_IO_BASE;
get_usb_cfg(sw_hci);
sw_hci->open_clock = open_clock;
sw_hci->close_clock = close_clock;
sw_hci->set_power = sw_set_vbus;
sw_hci->usb_passby = usb_passby;
sw_hci->port_configure = hci_port_configure;
ret = clock_init(sw_hci, ohci);
if(ret != 0){
DMSG_PANIC("ERR: clock_init failed\n");
goto failed1;
}
print_sw_hci(sw_hci);
return 0;
failed1:
return -1;
}
static int init_sw_hci(struct sw_hci_hcd *sw_hci, u32 usbc_no, u32 ohci,
const char *hci_name)
{
s32 ret = 0;
u32 drv_vbus_Handle = 0;
memset(sw_hci, 0, sizeof(struct sw_hci_hcd));
sw_hci->usbc_no = usbc_no;
sprintf(sw_hci->hci_name, "%s%d", hci_name, sw_hci->usbc_no);
sw_hci->usb_vbase = (void __iomem *)usbc_base[sw_hci->usbc_no];
get_usb_cfg(sw_hci);
drv_vbus_Handle = alloc_pin(&sw_hci->drv_vbus_gpio_set);
if (drv_vbus_Handle == 0) {
DMSG_PANIC("ERR: alloc_pin failed\n");
goto failed1;
}
sw_hci->drv_vbus_Handle = drv_vbus_Handle;
sw_hci->open_clock = open_clock;
sw_hci->close_clock = close_clock;
sw_hci->set_power = sw_set_vbus;
sw_hci->usb_passby = usb_passby;
sw_hci->port_configure = hci_port_configure;
ret = clock_init(sw_hci, ohci);
if (ret != 0) {
DMSG_PANIC("ERR: clock_init failed\n");
goto failed1;
}
print_sw_hci(sw_hci);
return 0;
failed1:
return -1;
}
/*
*******************************************************************************
* usb_manager_init
*
* Description:
* void
*
* Parameters:
* void
*
* Return value:
* void
*
* note:
* void
*
*******************************************************************************
*/
static int __init usb_manager_init(void)
{
__s32 ret = 0;
bsp_usbc_t usbc;
u32 i = 0;
#ifdef CONFIG_USB_SW_SUN4I_USB0_OTG
struct task_struct *th = NULL;
#endif
DMSG_MANAGER_DEBUG("[sw usb]: usb_manager_init\n");
#if defined(CONFIG_USB_SW_SUN4I_USB0_DEVICE_ONLY)
DMSG_INFO_MANAGER("CONFIG_USB_SW_SUN4I_USB0_DEVICE_ONLY\n");
#elif defined(CONFIG_USB_SW_SUN4I_USB0_HOST_ONLY)
DMSG_INFO_MANAGER("CONFIG_USB_SW_SUN4I_USB0_HOST_ONLY\n");
#elif defined(CONFIG_USB_SW_SUN4I_USB0_OTG)
DMSG_INFO_MANAGER("CONFIG_USB_SW_SUN4I_USB0_OTG\n");
#else
DMSG_INFO_MANAGER("CONFIG_USB_SW_SUN4I_USB0_NULL\n");
return 0;
#endif
memset(&g_usb_cfg, 0, sizeof(struct usb_cfg));
g_usb_cfg.usb_global_enable = 1;
g_usb_cfg.usbc_num = 3;
ret = get_usb_cfg(&g_usb_cfg);
if(ret != 0){
DMSG_PANIC("ERR: get_usb_cfg failed\n");
return -1;
}
if(g_usb_cfg.port[0].enable == 0){
DMSG_PANIC("wrn: usb0 is disable\n");
return 0;
}
memset(&usbc, 0, sizeof(bsp_usbc_t));
for(i = 0; i < USBC_MAX_CTL_NUM; i++){
usbc.usbc_info[i].num = i;
switch(i){
case 0:
usbc.usbc_info[i].base = SW_VA_USB0_IO_BASE;
break;
case 1:
usbc.usbc_info[i].base = SW_VA_USB1_IO_BASE;
break;
case 2:
usbc.usbc_info[i].base = SW_VA_USB2_IO_BASE;
break;
default:
DMSG_PANIC("ERR: unkown cnt(%d)\n", i);
usbc.usbc_info[i].base = 0;
}
}
usbc.sram_base = SW_VA_SRAM_IO_BASE;
USBC_init(&usbc);
usbc0_platform_device_init(&g_usb_cfg.port[0]);
#ifdef CONFIG_USB_SW_SUN4I_USB0_OTG
if(g_usb_cfg.port[0].port_type == USB_PORT_TYPE_OTG
&& g_usb_cfg.port[0].detect_type == USB_DETECT_TYPE_VBUS_ID){
usb_hw_scan_init(&g_usb_cfg);
thread_run_flag = 1;
thread_stopped_flag = 0;
th = kthread_create(usb_hardware_scan_thread, &g_usb_cfg, "usb-hardware-scan");
if(IS_ERR(th)){
DMSG_PANIC("ERR: kthread_create failed\n");
return -1;
}
wake_up_process(th);
}
#endif
DMSG_MANAGER_DEBUG("[sw usb]: usb_manager_init end\n");
return 0;
}
