rtems_status_code bsp_interrupt_facility_initialize(void)
{
volatile gic_cpuif *cpuif = GIC_CPUIF;
volatile gic_dist *dist = ARM_GIC_DIST;
uint32_t id_count = get_id_count(dist);
uint32_t id;
arm_cp15_set_exception_handler(
ARM_EXCEPTION_IRQ,
_ARMV4_Exception_interrupt
);
for (id = 0; id < id_count; ++id) {
gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
}
for (id = 32; id < id_count; ++id) {
gic_id_set_targets(dist, id, 0x01);
}
cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
cpuif->iccicr = GIC_CPUIF_ICCICR_ENABLE;
dist->icddcr = GIC_DIST_ICDDCR_ENABLE;
return RTEMS_SUCCESSFUL;
}
void bsp_interrupt_set_affinity(
rtems_vector_number vector,
const Processor_mask *affinity
)
{
volatile gic_dist *dist = ARM_GIC_DIST;
uint8_t targets = (uint8_t) _Processor_mask_To_uint32_t(affinity, 0);
gic_id_set_targets(dist, vector, targets);
}
rtems_status_code arm_gic_irq_set_affinity(
rtems_vector_number vector,
uint8_t targets
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
if (bsp_interrupt_is_valid_vector(vector)) {
volatile gic_dist *dist = ARM_GIC_DIST;
gic_id_set_targets(dist, vector, targets);
} else {
sc = RTEMS_INVALID_ID;
}
return sc;
}
