static int __init msm_setup_fiq_handler(void)
{
int i, ret = 0;
spin_lock_init(&msm_fiq_lock);
claim_fiq(&msm7k_fh);
set_fiq_handler(&msm7k_fiq_start, msm7k_fiq_length);
for_each_possible_cpu(i) {
msm7k_fiq_stack[i] = (void *)__get_free_pages(GFP_KERNEL,
THREAD_SIZE_ORDER);
if (msm7k_fiq_stack[i] == NULL)
break;
}
if (i != nr_cpumask_bits) {
pr_err("FIQ STACK SETUP IS NOT SUCCESSFUL\n");
for (i = 0; i < nr_cpumask_bits && msm7k_fiq_stack[i] != NULL;
i++)
free_pages((unsigned long)msm7k_fiq_stack[i],
THREAD_SIZE_ORDER);
return -ENOMEM;
}
fiq_set_type(msm_fiq_no, IRQF_TRIGGER_RISING);
if (cpu_is_msm8625() || cpu_is_msm8625q())
gic_set_irq_secure(msm_fiq_no);
else
msm_fiq_select(msm_fiq_no);
enable_irq(msm_fiq_no);
pr_info("%s : MSM FIQ handler setup--done\n", __func__);
return ret;
}
static int __init msm_setup_fiq_handler(void)
{
int ret = 0;
claim_fiq(&msm7k_fh);
set_fiq_handler(&msm7k_fiq_start, msm7k_fiq_length);
msm7k_fiq_stack = (void *)__get_free_pages(GFP_KERNEL,
THREAD_SIZE_ORDER);
if (msm7k_fiq_stack == NULL) {
pr_err("FIQ STACK SETUP IS NOT SUCCESSFUL\n");
return -ENOMEM;
}
fiq_set_type(MSM8625_INT_A9_M2A_2, IRQF_TRIGGER_RISING);
gic_set_irq_secure(MSM8625_INT_A9_M2A_2);
enable_irq(MSM8625_INT_A9_M2A_2);
pr_info("%s : msm7k fiq setup--done\n", __func__);
return ret;
}
int msm_setup_fiq_handler(void)
{
int ret = 0;
//void *stack = NULL;
claim_fiq(&msm_7k_fh);
set_fiq_handler(&msm_7k_fiq_start, msm_7k_fiq_length);
msm_fiq_stack = (void *)__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
printk(" %s : free pages available -%p ::\n",__func__,msm_fiq_stack);
if (msm_fiq_stack == NULL) {
printk("No free pages available - %s fails\n",
__func__);
panic("FIQ STACK SETUP IS NOT SUCCESSFUL");
return -ENOMEM;
}
//msm_7k_fiq_setup(stack);
irq_set_irq_type(MSM8625_INT_A9_M2A_2, IRQF_TRIGGER_RISING);
gic_set_irq_secure(MSM8625_INT_A9_M2A_2);
enable_irq(MSM8625_INT_A9_M2A_2);
printk("%s : setup_fiq_handler --done \n", __func__);
return ret;
}
