void __init wx5800_pci_hw_init(void)
{
/* Disable PCI clock */
*IXP425_GPIO_GPCLKR &= ~IXP425_PCI_CLK_ENABLE;
/* configure PCI-related GPIO */
gpio_line_config(IXP425_PCI_CLK_PIN, IXP425_GPIO_OUT);
gpio_line_config(IXP425_PCI_RESET_GPIO, IXP425_GPIO_OUT);
gpio_line_config(IXP425_PCI_INTA_GPIO,
IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(IXP425_PCI_INTB_GPIO,
IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(IXP425_PCI_INTA_GPIO);
gpio_line_isr_clear(IXP425_PCI_INTB_GPIO);
/* Assert reset for PCI controller */
gpio_line_set(IXP425_PCI_RESET_GPIO, IXP425_GPIO_LOW);
/* wait 1ms to satisfy "minimum reset assertion time" of the PCI spec. */
udelay(1000);
/* Config PCI clock */
*IXP425_GPIO_GPCLKR |= (0xf << IXP425_PCI_CLK_TC_LSH) |
(0xf << IXP425_PCI_CLK_DC_LSH);
/* Enable PCI clock */
*IXP425_GPIO_GPCLKR |= IXP425_PCI_CLK_ENABLE;
/* wait 100us to satisfy "minimum reset assertion time from clock stable"
* requirement of the PCI spec. */
udelay(100);
/* Deassert reset for PCI controller */
gpio_line_set(IXP425_PCI_RESET_GPIO, IXP425_GPIO_HIGH);
/* wait a while to let other devices get ready after PCI reset */
udelay(1000);
}
static int __init ixdp2400_i2c_init(void)
{
if(machine_is_ixdp2400()) {
int i = 0;
/*
* GPIO2 needs to be high for SDA to work on this board
*/
gpio_line_set(IXDP2400_GPIO_HIGH, 1);
gpio_line_config(IXDP2400_GPIO_HIGH, GPIO_OUT);
ixdp2400_gpio.sda_gpio = IXDP2400_GPIO_SCL;
ixdp2400_gpio.scl_gpio = IXDP2400_GPIO_SDA;
gpio_line_config(ixdp2400_gpio.sda_gpio, GPIO_OUT);
gpio_line_config(ixdp2400_gpio.scl_gpio, GPIO_OUT);
gpio_line_set(ixdp2400_gpio.scl_gpio, 0);
gpio_line_set(ixdp2400_gpio.sda_gpio, 0);
gpio_line_config(ixdp2400_gpio.scl_gpio, GPIO_IN);
for(i = 0; i < 10; i++);
gpio_line_config(ixdp2400_gpio.sda_gpio, GPIO_IN);
}
if (i2c_bit_add_bus(&ixdp2400_i2c_adapter)) {
printk("i2c-ixdp2400: I2C adapter registration failed\n");
return -EIO;
} else printk("i2c-ixdp2400: I2C bus initialized\n");
return 0;
}
static int ivpnss_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
switch (cmd) {
case ISET_ETH0:
printk("%s(%d): cannot disable eth0!\n", __FILE__, __LINE__);
break;
case ISET_ETH1:
/* Enable/disable second ethernet port */
if (arg)
gpio_line_set(IXP425_GPIO_PIN_3, 0);
else
gpio_line_set(IXP425_GPIO_PIN_3, 1);
break;
case ISET_WIFI0:
/* Best I can figure is to hold the device in reset */
if (arg)
gpio_line_set(IXP425_GPIO_PIN_6, 1);
else
gpio_line_set(IXP425_GPIO_PIN_6, 0);
break;
default:
return -EINVAL;
}
return 0;
}
static int ixp4xx_i2c_probe(struct device *dev)
{
int err;
struct platform_device *plat_dev = to_platform_device(dev);
struct ixp4xx_i2c_pins *gpio = plat_dev->dev.platform_data;
struct ixp4xx_i2c_data *drv_data =
kmalloc(sizeof(struct ixp4xx_i2c_data), GFP_KERNEL);
if(!drv_data)
return -ENOMEM;
memzero(drv_data, sizeof(struct ixp4xx_i2c_data));
drv_data->gpio_pins = gpio;
/*
* We could make a lot of these structures static, but
* certain platforms may have multiple GPIO-based I2C
* buses for various device domains, so we need per-device
* algo_data->data.
*/
drv_data->algo_data.data = gpio;
drv_data->algo_data.setsda = ixp4xx_bit_setsda;
drv_data->algo_data.setscl = ixp4xx_bit_setscl;
drv_data->algo_data.getsda = ixp4xx_bit_getsda;
drv_data->algo_data.getscl = ixp4xx_bit_getscl;
drv_data->algo_data.udelay = 10;
drv_data->algo_data.mdelay = 10;
drv_data->algo_data.timeout = 100;
drv_data->adapter.id = I2C_HW_B_IXP4XX,
drv_data->adapter.algo_data = &drv_data->algo_data,
drv_data->adapter.dev.parent = &plat_dev->dev;
gpio_line_config(gpio->scl_pin, IXP4XX_GPIO_IN);
gpio_line_config(gpio->sda_pin, IXP4XX_GPIO_IN);
gpio_line_set(gpio->scl_pin, 0);
gpio_line_set(gpio->sda_pin, 0);
if ((err = i2c_bit_add_bus(&drv_data->adapter) != 0)) {
printk(KERN_ERR "ERROR: Could not install %s\n", dev->bus_id);
kfree(drv_data);
return err;
}
dev_set_drvdata(&plat_dev->dev, drv_data);
return 0;
}
void snapi2c_setup(void)
{
down(&snapi2c_sem);
/* Initially set the IIC lines to be outputs from the IXP4xx */
gpio_line_config(SCL, OUT);
gpio_line_config(SDA, OUT);
/* Set IIC bus into idle mode */
gpio_line_set(SCL, 1);
gpio_line_set(SDA, 1);
up(&snapi2c_sem);
}
static void wdt_refresh(unsigned long data)
{
if (test_bit(WDT_RUNNING, &wdt_status)) {
if (atomic_dec_and_test(&wdt_counter)) {
printk(KERN_WARNING "Avila watchdog expired, expect a reboot soon!\n");
clear_bit(WDT_RUNNING, &wdt_status);
return;
}
}
/* strobe to the watchdog */
gpio_line_set(14, IXP4XX_GPIO_HIGH);
gpio_line_set(14, IXP4XX_GPIO_LOW);
mod_timer(&wdt_timer, jiffies + msecs_to_jiffies(500));
}
static void n2100_restart(char mode, const char *cmd)
{
gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
while (1)
;
}
static int hss_open(int port, void *pdev,
void (*set_carrier_cb)(void *pdev, int carrier))
{
int i, irq;
if (!port)
irq = gpio_irq(GPIO_HSS0_DCD_N);
else
irq = gpio_irq(GPIO_HSS1_DCD_N);
gpio_line_get(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N, &i);
set_carrier_cb(pdev, !i);
set_carrier_cb_tab[!!port] = set_carrier_cb;
if ((i = request_irq(irq, hss_dcd_irq, 0, "IXP4xx HSS", pdev)) != 0) {
printk(KERN_ERR "ixp4xx_hss: failed to request IRQ%i (%i)\n",
irq, i);
return i;
}
set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 0);
output_control();
gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 0);
return 0;
}
static void dsmg600_power_handler(unsigned long data)
{
/* This routine is called twice per second to check the
* state of the power button.
*/
if (gpio_get_value(DSMG600_PB_GPIO)) {
/* IO Pin is 1 (button pushed) */
if (power_button_countdown > 0)
power_button_countdown--;
} else {
/* Done on button release, to allow for auto-power-on mods. */
if (power_button_countdown == 0) {
/* Signal init to do the ctrlaltdel action,
* this will bypass init if it hasn't started
* and do a kernel_restart.
*/
ctrl_alt_del();
/* Change the state of the power LED to "blink" */
gpio_line_set(DSMG600_LED_PWR_GPIO, IXP4XX_GPIO_LOW);
} else {
power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
}
}
mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500));
}
static void spi_gpio_chipselect(struct spi_device *dev, int on)
{
struct spi_gpio *sp = spidev_to_sg(dev);
if (sp->info->cs_activelow)
on = !on;
gpio_line_set(sp->info->pin_cs, on ? 1 : 0);
}
void __init montejade_pci_init(void *sysdata)
{
printk("PCI: reset bus...\n");
gpio_line_set(IXP425_GPIO_PIN_8, 0);
gpio_line_config(IXP425_GPIO_PIN_8, IXP425_GPIO_OUT);
gpio_line_set(IXP425_GPIO_PIN_8, 0);
mdelay(50);
gpio_line_set(IXP425_GPIO_PIN_8, 1);
mdelay(50);
gpio_line_config(INTA_PIN, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(INTB_PIN, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(INTA_PIN);
gpio_line_isr_clear(INTB_PIN);
ixp425_pci_init(sysdata);
}
static void dsmg600_power_off(void)
{
/* enable the pwr cntl gpio */
gpio_line_config(DSMG600_PO_GPIO, IXP4XX_GPIO_OUT);
/* poweroff */
gpio_line_set(DSMG600_PO_GPIO, IXP4XX_GPIO_HIGH);
}
void __init ixdp2x00_init_machine(void)
{
gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);
gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
ixp2000_uart_init();
}
static int ixp4xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
int level)
{
gpio_line_set(gpio, level);
gpio_line_config(gpio, IXP4XX_GPIO_OUT);
return 0;
}
void __init ess710_pci_preinit(void)
{
printk("PCI: reset bus...\n");
gpio_line_set(13, 0);
gpio_line_config(13, IXP4XX_GPIO_OUT);
gpio_line_set(13, 0);
mdelay(50);
gpio_line_set(13, 1);
mdelay(50);
gpio_line_config(6, IXP4XX_GPIO_IN);
set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW); /* INTA */
gpio_line_config(7, IXP4XX_GPIO_IN);
set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW); /* INTB */
gpio_line_config(8, IXP4XX_GPIO_IN);
set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW); /* INTC */
ixp4xx_pci_preinit();
}
static void nslu2_power_off(void)
{
/* */
/* */
gpio_line_config(NSLU2_PO_GPIO, IXP4XX_GPIO_OUT);
/* */
gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
}
static void nas100d_power_off(void)
{
/* This causes the box to drop the power and go dead. */
/* enable the pwr cntl gpio */
gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT);
/* do the deed */
gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH);
}
static void hss_close(int port, void *pdev)
{
free_irq(port ? gpio_irq(GPIO_HSS1_DCD_N) : gpio_irq(GPIO_HSS0_DCD_N),
pdev);
set_carrier_cb_tab[!!port] = NULL; /* catch bugs */
set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 1);
output_control();
gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 1);
}
void ivpnss_hwsetup(void)
{
int i;
if (ivpnss_hwinited)
return;
/* Setup IXP4xx chip selects, CS1 is for 8bit, CS2 is 16bit */
*IXP425_EXP_CS1 = 0x97d10c03;
*IXP425_EXP_CS2 = 0x97d10c02;
/* expansion bus speeds */
// *IXP425_GPIO_GPCLKR = (*IXP425_GPIO_GPCLKR & 0x0000ffff) | 0x01420000;
/* Setup IRQ line, we use GPIO7 which maps tp IRQ 24 */
gpio_line_config(IXP425_GPIO_PIN_7,
(IXP425_GPIO_IN | IXP425_GPIO_FALLING_EDGE));
gpio_line_isr_clear(IXP425_GPIO_PIN_7);
/* Setup PCMCIA/CF REG line (for accessing attribute space) */
gpio_line_config(IXP425_GPIO_PIN_10, IXP425_GPIO_OUT);
gpio_line_set(IXP425_GPIO_PIN_10, 1);
/* Setup PCMCIA/CF IO/MEM (confusingly called RD/WR) select */
gpio_line_config(IXP425_GPIO_PIN_8, IXP425_GPIO_OUT);
gpio_line_set(IXP425_GPIO_PIN_10, 1);
/* Setup PCMCIA/CF RESET line, and issue a short reset */
gpio_line_set(IXP425_GPIO_PIN_6, 0);
gpio_line_config(IXP425_GPIO_PIN_6, IXP425_GPIO_OUT);
/*
for (i = 0; (i < 100); i++)
udelay(1000);
gpio_line_set(IXP425_GPIO_PIN_6, 1);
*/
/* Leave the region idling in "attribute" mode */
ivpnss_mem_mode = MODE_ATTRIBUTE;
ivpnss_enable_attribute();
ivpnss_hwinited = 1;
}
static void ixp4xx_spkr_control(unsigned int pin, unsigned int count)
{
unsigned long flags;
spin_lock_irqsave(&beep_lock, flags);
if (count) {
gpio_line_config(pin, IXP4XX_GPIO_OUT);
gpio_line_set(pin, IXP4XX_GPIO_LOW);
*IXP4XX_OSRT2 = (count & ~IXP4XX_OST_RELOAD_MASK) | IXP4XX_OST_ENABLE;
} else {
gpio_line_config(pin, IXP4XX_GPIO_IN);
gpio_line_set(pin, IXP4XX_GPIO_HIGH);
*IXP4XX_OSRT2 = 0;
}
spin_unlock_irqrestore(&beep_lock, flags);
}
static int ixp2000_i2c_probe(struct platform_device *plat_dev)
{
int err;
struct ixp2000_i2c_pins *gpio = plat_dev->dev.platform_data;
struct ixp2000_i2c_data *drv_data =
kzalloc(sizeof(struct ixp2000_i2c_data), GFP_KERNEL);
if (!drv_data)
return -ENOMEM;
drv_data->gpio_pins = gpio;
drv_data->algo_data.data = gpio;
drv_data->algo_data.setsda = ixp2000_bit_setsda;
drv_data->algo_data.setscl = ixp2000_bit_setscl;
drv_data->algo_data.getsda = ixp2000_bit_getsda;
drv_data->algo_data.getscl = ixp2000_bit_getscl;
drv_data->algo_data.udelay = 6;
drv_data->algo_data.timeout = 100;
drv_data->adapter.id = I2C_HW_B_IXP2000,
strlcpy(drv_data->adapter.name, plat_dev->dev.driver->name,
sizeof(drv_data->adapter.name));
drv_data->adapter.algo_data = &drv_data->algo_data,
drv_data->adapter.dev.parent = &plat_dev->dev;
gpio_line_config(gpio->sda_pin, GPIO_IN);
gpio_line_config(gpio->scl_pin, GPIO_IN);
gpio_line_set(gpio->scl_pin, 0);
gpio_line_set(gpio->sda_pin, 0);
if ((err = i2c_bit_add_bus(&drv_data->adapter)) != 0) {
dev_err(&plat_dev->dev, "Could not install, error %d\n", err);
kfree(drv_data);
return err;
}
platform_set_drvdata(plat_dev, drv_data);
return 0;
}
static void
ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
int offset = (int)this->priv;
if (ctrl & NAND_CTRL_CHANGE) {
if (ctrl & NAND_NCE) {
gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW);
udelay(5);
} else
gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH);
offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
this->priv = (void *)offset;
}
if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W + offset);
}
static void wdt_enable(void)
{
atomic_set(&wdt_counter, heartbeat * 2);
/* Disable clock generator output on GPIO 14/15 */
*IXP4XX_GPIO_GPCLKR &= ~(1 << 8);
/* activate GPIO 14 out */
gpio_line_config(14, IXP4XX_GPIO_OUT);
gpio_line_set(14, IXP4XX_GPIO_LOW);
if (!test_bit(WDT_RUNNING, &wdt_status))
wdt_refresh(0);
set_bit(WDT_RUNNING, &wdt_status);
}
static inline void off(void)
{
#if defined(LIRC_SERIAL_NSLU2)
if(type == LIRC_NSLU2)
{
gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
return;
}
#endif
if (txsense)
{
soutp(UART_MCR,hardware[type].on);
}
else
{
soutp(UART_MCR,hardware[type].off);
}
}
static inline void on(void)
{
#if defined(LIRC_SERIAL_NSLU2)
/* On NSLU2, we put the transmit diode between the output of the green
status LED and ground */
if(type == LIRC_NSLU2)
{
gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
return;
}
#endif
if (txsense)
{
soutp(UART_MCR,hardware[type].off);
}
else
{
soutp(UART_MCR,hardware[type].on);
}
}
int __init cs6_init(void)
{
*IXP425_EXP_CS6 = EXP_CS6_INIT;
cs6_resource = request_mem_region(IXP425_EXP_BUS_CS6_BASE_PHYS,
SZ_1M, "cs6");
if (!cs6_resource)
{
printk(__FILE__": request_mem_region() failed\n");
goto Error;
}
cs6_addr = (u8 *)ioremap(IXP425_EXP_BUS_CS6_BASE_PHYS, SZ_1M);
if (!cs6_addr)
{
printk(__FILE__": ioremap() failed\n");
goto Error;
}
/* reset cardbus controller, usb, switch */
cs6_state = RST_MODULE | RST_CARDBUS | RST_USB | RST_SWITCH;
*cs6_addr = cs6_state;
gpio_line_config(IXP425_GPIO_PIN_3, IXP425_GPIO_OUT);
gpio_line_set(IXP425_GPIO_PIN_3, IXP425_GPIO_LOW);
cs6_state &= ~(RST_MODULE | RST_CARDBUS | RST_USB);
#ifdef CONFIG_RG_RGLOADER
/* XXX: fix switch reset in a way it could read configuration
* from EEPROM
*/
cs6_state &= ~RST_SWITCH;
#endif
*cs6_addr = cs6_state;
udelay(1000);
cs6_state |= (RST_MODULE | RST_CARDBUS | RST_USB | RST_SWITCH);
*cs6_addr = cs6_state;
return 0;
Error:
cs6_cleanup();
return -1;
}
static void set_str(u8 value)
{
gpio_line_set(GPIO_STR, !!value);
udelay(3);
}
static void set_sda(u8 value)
{
gpio_line_set(GPIO_SDA, !!value);
udelay(3);
}
static void set_scl(u8 value)
{
gpio_line_set(GPIO_SCL, !!value);
udelay(3);
}
static void ixp4xx_gpio_set_value(struct gpio_chip *chip, unsigned gpio,
int value)
{
gpio_line_set(gpio, value);
}
