int gpu_pm_qos_command(struct exynos_context *platform, gpu_pmqos_state state) { DVFS_ASSERT(platform); if (!platform->devfreq_status) return 0; switch (state) { case GPU_CONTROL_PM_QOS_INIT: pm_qos_add_request(&exynos5_g3d_mif_min_qos, PM_QOS_BUS_THROUGHPUT, 0); if (platform->pmqos_mif_max_clock) pm_qos_add_request(&exynos5_g3d_mif_max_qos, PM_QOS_BUS_THROUGHPUT_MAX, PM_QOS_BUS_THROUGHPUT_MAX_DEFAULT_VALUE); if (!platform->pmqos_int_disable) pm_qos_add_request(&exynos5_g3d_int_qos, PM_QOS_DEVICE_THROUGHPUT, 0); pm_qos_add_request(&exynos5_g3d_cpu_cluster0_min_qos, PM_QOS_CLUSTER0_FREQ_MIN, 0); pm_qos_add_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CLUSTER1_FREQ_MAX, PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE); if (platform->boost_egl_min_lock) pm_qos_add_request(&exynos5_g3d_cpu_cluster1_min_qos, PM_QOS_CLUSTER1_FREQ_MIN, 0); break; case GPU_CONTROL_PM_QOS_DEINIT: pm_qos_remove_request(&exynos5_g3d_mif_min_qos); if (platform->pmqos_mif_max_clock) pm_qos_remove_request(&exynos5_g3d_mif_max_qos); if (!platform->pmqos_int_disable) pm_qos_remove_request(&exynos5_g3d_int_qos); pm_qos_remove_request(&exynos5_g3d_cpu_cluster0_min_qos); pm_qos_remove_request(&exynos5_g3d_cpu_cluster1_max_qos); if (platform->boost_egl_min_lock) pm_qos_remove_request(&exynos5_g3d_cpu_cluster1_min_qos); break; case GPU_CONTROL_PM_QOS_SET: KBASE_DEBUG_ASSERT(platform->step >= 0); if (platform->perf_gathering_status) { gpu_mif_pmqos(platform, platform->table[platform->step].mem_freq); } else { pm_qos_update_request(&exynos5_g3d_mif_min_qos, platform->table[platform->step].mem_freq); if (platform->pmqos_mif_max_clock && (platform->table[platform->step].clock >= platform->pmqos_mif_max_clock_base)) pm_qos_update_request(&exynos5_g3d_mif_max_qos, platform->pmqos_mif_max_clock); } if (!platform->pmqos_int_disable) pm_qos_update_request(&exynos5_g3d_int_qos, platform->table[platform->step].int_freq); pm_qos_update_request(&exynos5_g3d_cpu_cluster0_min_qos, platform->table[platform->step].cpu_freq); if (!platform->boost_is_enabled) pm_qos_update_request(&exynos5_g3d_cpu_cluster1_max_qos, platform->table[platform->step].cpu_max_freq); break; case GPU_CONTROL_PM_QOS_RESET: pm_qos_update_request(&exynos5_g3d_mif_min_qos, 0); if (platform->pmqos_mif_max_clock) pm_qos_update_request(&exynos5_g3d_mif_max_qos, PM_QOS_BUS_THROUGHPUT_MAX_DEFAULT_VALUE); if (!platform->pmqos_int_disable) pm_qos_update_request(&exynos5_g3d_int_qos, 0); pm_qos_update_request(&exynos5_g3d_cpu_cluster0_min_qos, 0); pm_qos_update_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE); break; case GPU_CONTROL_PM_QOS_EGL_SET: pm_qos_update_request(&exynos5_g3d_cpu_cluster1_min_qos, platform->boost_egl_min_lock); break; case GPU_CONTROL_PM_QOS_EGL_RESET: pm_qos_update_request(&exynos5_g3d_cpu_cluster1_min_qos, 0); break; default: break; } return 0; }
int gpu_pm_qos_command(struct exynos_context *platform, gpu_pmqos_state state) { int idx; DVFS_ASSERT(platform); if (!platform->devfreq_status) return 0; #ifdef CONFIG_MALI_DVFS #ifdef CONFIG_PM_DEVFREQ switch (state) { case GPU_CONTROL_PM_QOS_INIT: pm_qos_add_request(&exynos5_g3d_mif_min_qos, PM_QOS_BUS_THROUGHPUT, 0); if (platform->pmqos_mif_max_clock) pm_qos_add_request(&exynos5_g3d_mif_max_qos, PM_QOS_BUS_THROUGHPUT_MAX, PM_QOS_BUS_THROUGHPUT_MAX_DEFAULT_VALUE); if (!platform->pmqos_int_disable) pm_qos_add_request(&exynos5_g3d_int_qos, PM_QOS_DEVICE_THROUGHPUT, 0); pm_qos_add_request(&exynos5_g3d_cpu_cluster0_min_qos, PM_QOS_CLUSTER0_FREQ_MIN, 0); pm_qos_add_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CLUSTER1_FREQ_MAX, PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE); if (platform->boost_egl_min_lock) pm_qos_add_request(&exynos5_g3d_cpu_cluster1_min_qos, PM_QOS_CLUSTER1_FREQ_MIN, 0); for(idx=0; idx<platform->table_size; idx++) platform->save_cpu_max_freq[idx] = platform->table[idx].cpu_max_freq; break; case GPU_CONTROL_PM_QOS_DEINIT: pm_qos_remove_request(&exynos5_g3d_mif_min_qos); if (platform->pmqos_mif_max_clock) pm_qos_remove_request(&exynos5_g3d_mif_max_qos); if (!platform->pmqos_int_disable) pm_qos_remove_request(&exynos5_g3d_int_qos); pm_qos_remove_request(&exynos5_g3d_cpu_cluster0_min_qos); pm_qos_remove_request(&exynos5_g3d_cpu_cluster1_max_qos); if (platform->boost_egl_min_lock) pm_qos_remove_request(&exynos5_g3d_cpu_cluster1_min_qos); break; case GPU_CONTROL_PM_QOS_SET: KBASE_DEBUG_ASSERT(platform->step >= 0); if (platform->perf_gathering_status) { gpu_mif_pmqos(platform, platform->table[platform->step].mem_freq); #ifdef CONFIG_EXYNOS8890_BTS_OPTIMIZATION bts_update_gpu_mif(platform->table[platform->step].mem_freq); #endif } else { pm_qos_update_request(&exynos5_g3d_mif_min_qos, platform->table[platform->step].mem_freq); #ifdef CONFIG_EXYNOS8890_BTS_OPTIMIZATION bts_update_gpu_mif(platform->table[platform->step].mem_freq); #endif if (platform->pmqos_mif_max_clock && (platform->table[platform->step].clock >= platform->pmqos_mif_max_clock_base)) pm_qos_update_request(&exynos5_g3d_mif_max_qos, platform->pmqos_mif_max_clock); } if (!platform->pmqos_int_disable) pm_qos_update_request(&exynos5_g3d_int_qos, platform->table[platform->step].int_freq); pm_qos_update_request(&exynos5_g3d_cpu_cluster0_min_qos, platform->table[platform->step].cpu_freq); if (!platform->boost_is_enabled) { if (platform->sustainable.low_power_cluster1_clock > 0 && platform->sustainable.sustainable_gpu_clock == platform->table[platform->step].clock) pm_qos_update_request(&exynos5_g3d_cpu_cluster1_max_qos, platform->sustainable.low_power_cluster1_clock); else pm_qos_update_request(&exynos5_g3d_cpu_cluster1_max_qos, platform->table[platform->step].cpu_max_freq); } break; case GPU_CONTROL_PM_QOS_RESET: pm_qos_update_request(&exynos5_g3d_mif_min_qos, 0); #ifdef CONFIG_EXYNOS8890_BTS_OPTIMIZATION bts_update_gpu_mif(0); #endif if (platform->pmqos_mif_max_clock) pm_qos_update_request(&exynos5_g3d_mif_max_qos, PM_QOS_BUS_THROUGHPUT_MAX_DEFAULT_VALUE); if (!platform->pmqos_int_disable) pm_qos_update_request(&exynos5_g3d_int_qos, 0); pm_qos_update_request(&exynos5_g3d_cpu_cluster0_min_qos, 0); pm_qos_update_request(&exynos5_g3d_cpu_cluster1_max_qos, PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE); break; case GPU_CONTROL_PM_QOS_EGL_SET: //pm_qos_update_request(&exynos5_g3d_cpu_cluster1_min_qos, platform->boost_egl_min_lock); for(idx=0; idx<platform->table_size; idx++) platform->table[idx].cpu_max_freq = PM_QOS_CLUSTER1_FREQ_MAX_DEFAULT_VALUE; break; case GPU_CONTROL_PM_QOS_EGL_RESET: //pm_qos_update_request(&exynos5_g3d_cpu_cluster1_min_qos, 0); for(idx=0; idx<platform->table_size; idx++) platform->table[idx].cpu_max_freq = platform->save_cpu_max_freq[idx]; break; default: break; } #endif #endif return 0; }