/* Radio "interrupt" routine.
* (but it is only manually called) */
void nrf_irq()
{
uint8_t irq_flags;
// Read and clear IRQ flags from radio.
irq_flags = hal_nrf_get_clear_irq_flags();
switch (irq_flags) {
// Transmission success
case (1 << (uint8_t)HAL_NRF_TX_DS):
send_success = true;
// Data has been sent
break;
// Transmission failed (maximum re-transmits)
case (1 << (uint8_t)HAL_NRF_MAX_RT):
hal_nrf_flush_tx();
send_success = false;
break;
// Data received
case (1 << (uint8_t)HAL_NRF_RX_DR):
// Read payload
while (!hal_nrf_rx_fifo_empty()) {
hal_nrf_read_rx_payload(rcvd_buf);
}
packet_received = true;
break;
default:
;
}
}
/** Initialized the RF configurations and powre up the RF.
* Use this function to initialize RF configurations.
* Note that the pipe isn't opened in this function,
* please use "rf_rcv_pipe_config" after using this
* function to configure RX pipe.
*
* @param in_channel RF Frequency (in_channel + 2400MHz)
* @param in_datarate Data rate of the RF transmission. (1Mbps or 2Mbps)
* @param in_output_power RF output power configuration.
* @param in_auto_retr Enable auto retransmission or not.
* @param in_auto_retr_delay Auto retransmission delay.
* @param in_addr_width Address width configuration for both PTX and PRX pipe.
* @param in_crc_mode CRC enable or disable configuration.
* @param in_spi_clk_rate SPI clock rate. (SPI speed)
* @param in_rf_int RF interrupt enable bit.
*/
void epl_rf_en_init(unsigned char in_channel, epl_rf_en_datarate_t in_datarate, char in_output_power, unsigned char in_auto_retr, unsigned int in_auto_retr_delay, char in_addr_width, epl_rf_en_crc_mode_t in_crc_mode, unsigned char in_rf_int)
{
RFCKEN = 1; // RF clock enable.
CE_LOW();
//--- Default static setup. These setting is optimized to match the RF protocol with nRF24E1. ---//
hal_nrf_close_pipe(HAL_NRF_ALL); // Close all pipes first. By default, pipe0 and pipe1 are opened.
hal_nrf_set_datarate(in_datarate);
hal_nrf_set_auto_retr(in_auto_retr, in_auto_retr_delay); // First parameter is set to zero indicating the auto retransmission is off.
hal_nrf_set_output_power(in_output_power); // Maximum radio output power (0dbm).
hal_nrf_set_crc_mode(in_crc_mode);
hal_nrf_set_address_width(in_addr_width); // Both RX and TX's address width are Configured.
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter RF TX mode
hal_nrf_set_rf_channel(in_channel);
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up radio
hal_nrf_get_clear_irq_flags();
// IEN1 RF interrupt enable bit
RF = in_rf_int;
}
void epl_dbg_print(uint8_t *pload, uint8_t size)
{
uint8_t xdata outbuf[MAX_RF_PLOAD];
uint8_t i = 0;
if (size > MAX_RF_PLOAD -1)
{
size = MAX_RF_PLOAD -1;
}
// first byte indicate pload length
outbuf[0] = size;
/*
// at most 32 bytes pload
if (size > MAX_RF_PLOAD)
{
size = MAX_RF_PLOAD;
}
else // padding
{
for(i=size;i<MAX_RF_PLOAD;i++)
{
outbuf[i] = '\0';
}
}
*/
for(i=1;i<=size;i++)
{
outbuf[i] = (*pload++);
}
for(i=0;i<MAX_RF_PLOAD;i++)
{
epl_uart_puthex(outbuf[i]);
epl_uart_putstr(" ");
}
epl_uart_putstr("\n");
epl_rf_en_send(outbuf, MAX_RF_PLOAD);
hal_nrf_get_clear_irq_flags();
}
// Radio interrupt
NRF_ISR()
{
uint8_t irq_flags;
// Read and clear IRQ flags from radio
irq_flags = hal_nrf_get_clear_irq_flags();
// If data received
if((irq_flags & (1<<(uint8_t)HAL_NRF_RX_DR)) > 0)
{
// Read payload
while(!hal_nrf_rx_fifo_empty())
{
hal_nrf_read_rx_payload(payload);
}
// Write received payload[0] to port 0
P0 = payload[0];
}
}
void radio_irq(void)
{
if (RADIO_ACTIVITY()) // Check if an interupt is
{ // triggered
switch(hal_nrf_get_clear_irq_flags ())
{
case (1<<HAL_NRF_MAX_RT): // Max retries reached
hal_nrf_flush_tx(); // flush tx fifo, avoid fifo jam
radio_set_status (RF_MAX_RT);
break;
case (1<<HAL_NRF_TX_DS): // Packet sent
radio_set_status (RF_TX_DS);
break;
case (1<<HAL_NRF_RX_DR): // Packet received
while (!hal_nrf_rx_fifo_empty ())
{
hal_nrf_read_rx_pload(pload);
}
radio_set_status (RF_RX_DR);
break;
case ((1<<HAL_NRF_RX_DR)|(1<<HAL_NRF_TX_DS)): // Ack payload recieved
while (!hal_nrf_rx_fifo_empty ())
{
hal_nrf_read_rx_pload(pload);
}
radio_set_status (RF_TX_AP);
break;
default:
break;
}
RESET_RADIO_ACTIVITY();
}
}
void gzll_init(void)
{
uint32_t flag;
uint8_t temp_adr[GZLL_ADDRESS_WIDTH] = GZLL_DEFAULT_ADDRESS_PIPE1;
flag = gzll_interupts_save();
GZLL_RFCE_LOW();
hal_nrf_enable_ack_payload(true);
hal_nrf_enable_dynamic_payload(true);
hal_nrf_setup_dynamic_payload(0xff);
/*
Initialize status variables.
*/
gzll_channel_tab_index = 0;
gzll_channel_tab_size = GZLL_DEFAULT_CHANNEL_TAB_SIZE;
gzll_pending_goto_idle = false;
gzll_timer_period_modified = false;
gzll_current_tx_pipe = 0;
gzll_pending_tx_start = false;
gzll_tx_setup_modified = true;
gzll_rx_setup_modified = true;
gzll_radio_active_f = false;
gzll_tx_success_f = true;
gzll_sync_period = 0;
gzll_sync_on = false;
gzll_rx_dr = false;
gzll_rx_power_high_f = false;
gzll_ack_rx_pipe_fifo_cnt = 0;
/*
Set up default addresses.
*/
hal_nrf_set_address(HAL_NRF_PIPE0, gzll_p0_adr);
hal_nrf_set_address(HAL_NRF_PIPE1, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE2;
hal_nrf_set_address(HAL_NRF_PIPE2, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE3;
hal_nrf_set_address(HAL_NRF_PIPE3, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE4;
hal_nrf_set_address(HAL_NRF_PIPE4, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE5;
hal_nrf_set_address(HAL_NRF_PIPE5, temp_adr);
/*
Set up default channel.
*/
hal_nrf_set_rf_channel(gzll_channel_tab[gzll_channel_tab_index]);
/*
Initialize dynamic parameters using default values.
*/
gzll_dyn_params[GZLL_PARAM_DEVICE_MODE] = GZLL_DEFAULT_PARAM_DEVICE_MODE;
gzll_dyn_params[GZLL_PARAM_TX_TIMEOUT] = GZLL_DEFAULT_PARAM_TX_TIMEOUT;
gzll_dyn_params[GZLL_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_ON] = GZLL_DEFAULT_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_ON;
gzll_dyn_params[GZLL_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_OFF] = GZLL_DEFAULT_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_OFF;
gzll_dyn_params[GZLL_PARAM_HOST_MODE] = GZLL_DEFAULT_PARAM_HOST_MODE;
gzll_dyn_params[GZLL_PARAM_RX_PIPES] = GZLL_DEFAULT_PARAM_RX_PIPES;
gzll_dyn_params[GZLL_PARAM_CRYPT_PIPES] = GZLL_DEFAULT_PARAM_CRYPT_PIPES;
gzll_dyn_params[GZLL_PARAM_RX_TIMEOUT] = GZLL_DEFAULT_PARAM_RX_TIMEOUT;
gzll_dyn_params[GZLL_PARAM_HOST_MODE_1_CYCLE_PERIOD] = GZLL_DEFAULT_PARAM_HOST_MODE_1_CYCLE_PERIOD;
gzll_dyn_params[GZLL_PARAM_RX_PERIOD] = GZLL_DEFAULT_PARAM_RX_PERIOD;
gzll_dyn_params[GZLL_PARAM_RX_PERIOD_MODIFIER] = GZLL_DEFAULT_PARAM_RX_PERIOD_MODIFIER;
gzll_dyn_params[GZLL_PARAM_RX_CHANNEL_HOLD_PERIODS] = GZLL_DEFAULT_PARAM_RX_CHANNEL_HOLD_PERIODS;
gzll_dyn_params[GZLL_PARAM_OUTPUT_POWER] = GZLL_DEFAULT_PARAM_OUTPUT_POWER;
gzll_dyn_params[GZLL_PARAM_POWER_DOWN_IDLE_ENABLE] = GZLL_DEFAULT_PARAM_POWER_DOWN_IDLE_ENABLE;
gzll_dyn_params[GZLL_PARAM_MAX_SYNC_PERIOD] = GZLL_DEFAULT_PARAM_MAX_SYNC_PERIOD;
gzll_dyn_params[GZLL_PARAM_COLLISION_CHANNEL_SWITCH_LIMIT] = GZLL_DEFAULT_PARAM_COLLISION_CHANNEL_SWITCH_LIMIT;
/*
Set up default output power.
*/
hal_nrf_set_output_power((hal_nrf_output_power_t) gzll_dyn_params[GZLL_PARAM_OUTPUT_POWER]);
/*
Static radio setup.
*/
hal_nrf_set_datarate(GZLL_HAL_DATARATE);
hal_nrf_set_crc_mode(GZLL_CRC);
hal_nrf_set_address_width(GZLL_ADDRESS_WIDTH);
/*
Clear radio IRQ flags.
*/
//lint -esym(534, hal_nrf_get_clear_irq_flags) "return value ignored"
hal_nrf_get_clear_irq_flags();
hal_nrf_flush_rx();
hal_nrf_flush_tx();
gzll_set_timer_period(GZLL_DEFAULT_PARAM_RX_PERIOD);
gzll_set_system_idle();
gzll_interupts_restore(flag);
}
