static void writeA(RomMapperRsIde* rm, UInt8 value) { rm->ideAddress = value & 0x07; rm->ideIoRead = value & 0x40 ? 0:1; rm->ideIoWrite = value & 0x20 ? 0:1; if (rm->ideIoRead) { switch (rm->ideAddress) { case 0: rm->ideData = harddiskIdeRead(rm->hdide); break; default: rm->ideData = harddiskIdeReadRegister(rm->hdide, rm->ideAddress); break; } } if (rm->ideIoWrite) { switch (rm->ideAddress) { case 0: harddiskIdeWrite(rm->hdide, rm->ideData); break; default: harddiskIdeWriteRegister(rm->hdide, rm->ideAddress, (UInt8)rm->ideData); break; } } }
static void writeIo(RomMapperGIde* rm, UInt16 ioPort, UInt8 value) { switch (ioPort & 0x0f) { case 0x04: // Reserved for expansion board break; case 0x05: // RTC 72421 rtc72421Write(ioPort >> 8, value); break; case 0x06: // GIDE digital output register rm->intEnable = value & 0x01?1:0; if (value & 0x02) harddiskIdeReset(rm->hdide); break; case 0x07: // GIDE drive address register break; case 0x08: // IDE data register harddiskIdeWrite(rm->hdide, value); break; case 0x09: // IDE write precomp register harddiskIdeWriteRegister(rm->hdide, 1, value); break; case 0x0a: // IDE sector count register harddiskIdeWriteRegister(rm->hdide, 2, value); break; case 0x0b: // IDE sector number register harddiskIdeWriteRegister(rm->hdide, 3, value); break; case 0x0c: // IDE cylinder low register harddiskIdeWriteRegister(rm->hdide, 4, value); break; case 0x0d: // IDE cylinder high register harddiskIdeWriteRegister(rm->hdide, 5, value); break; case 0x0e: // IDE drive/head register rm->drvSelect = value; harddiskIdeWriteRegister(rm->hdide, 6, value); break; case 0x0f: // IDE command register harddiskIdeWriteRegister(rm->hdide, 7, value); break; } }
void sunriseIdeWrite(SunriseIde* ide, UInt16 value) { harddiskIdeWrite(ide->hdide[ide->currentDevice], value); }