static void hdmi_set_audio_flat(u8 value)
{
/* Indicates the subpacket represents a flatline sample */
hdmi_mask_writeb(value, HDMI_FC_AUDSCONF,
HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET,
HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK);
}
static void hdmi_set_layout(unsigned int channels)
{
hdmi_mask_writeb((channels > 2) ? 1 : 0, HDMI_FC_AUDSCONF,
HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET,
HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK);
}
static void hdmi_fifo_reset(void)
{
hdmi_mask_writeb(1, HDMI_AHB_DMA_CONF0,
HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET,
HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK);
}
static void hdmi_dma_start(void)
{
hdmi_mask_writeb(1, HDMI_AHB_DMA_START,
HDMI_AHB_DMA_START_START_OFFSET,
HDMI_AHB_DMA_START_START_MASK);
}
static void hdmi_dma_stop(void)
{
hdmi_mask_writeb(1, HDMI_AHB_DMA_STOP,
HDMI_AHB_DMA_STOP_STOP_OFFSET,
HDMI_AHB_DMA_STOP_STOP_MASK);
}
static void imx_hdmi_phy_sel_data_en_pol(struct imx_hdmi *hdmi, u8 enable)
{
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_SELDATAENPOL_OFFSET,
HDMI_PHY_CONF0_SELDATAENPOL_MASK);
}
static void imx_hdmi_phy_sel_interface_control(struct imx_hdmi *hdmi, u8 enable)
{
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_SELDIPIF_OFFSET,
HDMI_PHY_CONF0_SELDIPIF_MASK);
}
static void imx_hdmi_phy_gen2_txpwron(struct imx_hdmi *hdmi, u8 enable)
{
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET,
HDMI_PHY_CONF0_GEN2_TXPWRON_MASK);
}
static void imx_hdmi_phy_gen2_pddq(struct imx_hdmi *hdmi, u8 enable)
{
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET,
HDMI_PHY_CONF0_GEN2_PDDQ_MASK);
}
static void imx_hdmi_phy_enable_tmds(struct imx_hdmi *hdmi, u8 enable)
{
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_ENTMDS_OFFSET,
HDMI_PHY_CONF0_ENTMDS_MASK);
}
static void imx_hdmi_phy_enable_power(struct imx_hdmi *hdmi, u8 enable)
{
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_PDZ_OFFSET,
HDMI_PHY_CONF0_PDZ_MASK);
}
static void dw_hdmi_phy_enable_spare(struct dw_hdmi *hdmi, u8 enable)
{
hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
HDMI_PHY_CONF0_SPARECTRL_OFFSET,
HDMI_PHY_CONF0_SPARECTRL_MASK);
}
