/* * This is the start function which initializes clocks , gpios for hdmi * & powers on the HDMI core */ void hdmi_power_init() { pm8921_low_voltage_switch_enable(lvs_7); apq8064_ext_3p3V_enable(); pm8921_HDMI_Switch(); hdmi_gpio_config(); hdmi_phy_reset(); hdmi_msm_set_mode(1); }
int target_hdmi_panel_clock(uint8_t enable, struct msm_panel_info *pinfo) { uint32_t ret; dprintf(SPEW, "%s: target_panel_clock\n", __func__); if (enable) { mdp_gdsc_ctrl(enable); mmss_bus_clock_enable(); mdp_clock_enable(); ret = restore_secure_cfg(SECURE_DEVICE_MDSS); if (ret) { dprintf(CRITICAL, "%s: Failed to restore MDP security configs", __func__); mdp_clock_disable(); mmss_bus_clock_disable(); mdp_gdsc_ctrl(0); return ret; } hdmi_phy_reset(); hdmi_pll_config(); hdmi_vco_enable(); hdmi_clk_enable(); } else if(!target_cont_splash_screen()) { /* Disable clocks if continuous splash off */ hdmi_clk_disable(); hdmi_vco_disable(); mdp_clock_disable(); mmss_bus_clock_disable(); mdp_gdsc_ctrl(enable); } return NO_ERROR; }
static int hpd_enable(struct hdmi_connector *hdmi_connector) { struct hdmi *hdmi = hdmi_connector->hdmi; const struct hdmi_platform_config *config = hdmi->config; struct device *dev = &hdmi->pdev->dev; uint32_t hpd_ctrl; int i, ret; unsigned long flags; for (i = 0; i < config->hpd_reg_cnt; i++) { ret = regulator_enable(hdmi->hpd_regs[i]); if (ret) { dev_err(dev, "failed to enable hpd regulator: %s (%d)\n", config->hpd_reg_names[i], ret); goto fail; } } ret = pinctrl_pm_select_default_state(dev); if (ret) { dev_err(dev, "pinctrl state chg failed: %d\n", ret); goto fail; } ret = gpio_config(hdmi, true); if (ret) { dev_err(dev, "failed to configure GPIOs: %d\n", ret); goto fail; } for (i = 0; i < config->hpd_clk_cnt; i++) { if (config->hpd_freq && config->hpd_freq[i]) { ret = clk_set_rate(hdmi->hpd_clks[i], config->hpd_freq[i]); if (ret) dev_warn(dev, "failed to set clk %s (%d)\n", config->hpd_clk_names[i], ret); } ret = clk_prepare_enable(hdmi->hpd_clks[i]); if (ret) { dev_err(dev, "failed to enable hpd clk: %s (%d)\n", config->hpd_clk_names[i], ret); goto fail; } } hdmi_set_mode(hdmi, false); hdmi_phy_reset(hdmi); hdmi_set_mode(hdmi, true); hdmi_write(hdmi, REG_HDMI_USEC_REFTIMER, 0x0001001b); /* enable HPD events: */ hdmi_write(hdmi, REG_HDMI_HPD_INT_CTRL, HDMI_HPD_INT_CTRL_INT_CONNECT | HDMI_HPD_INT_CTRL_INT_EN); /* set timeout to 4.1ms (max) for hardware debounce */ spin_lock_irqsave(&hdmi->reg_lock, flags); hpd_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); hpd_ctrl |= HDMI_HPD_CTRL_TIMEOUT(0x1fff); /* Toggle HPD circuit to trigger HPD sense */ hdmi_write(hdmi, REG_HDMI_HPD_CTRL, ~HDMI_HPD_CTRL_ENABLE & hpd_ctrl); hdmi_write(hdmi, REG_HDMI_HPD_CTRL, HDMI_HPD_CTRL_ENABLE | hpd_ctrl); spin_unlock_irqrestore(&hdmi->reg_lock, flags); return 0; fail: return ret; }