void ICACHE_FLASH_ATTR
user_init()
{
void* p;
uint32 now,diff;
//~ system_timer_reinit(); //US_TIMER
uart_init(BIT_RATE_115200, BIT_RATE_115200);
os_printf("\n\nESP8266 IRMP Test v0.3 W.Strobl 20151120\n");
os_printf("F_INTERRUPTS==%d\n",F_INTERRUPTS);
sysinfo();
hw_timer_init(NMI_SOURCE,1);
hw_timer_set_func(irmp_timer);
hw_timer_arm (1000000/F_INTERRUPTS);
// Initialize the GPIO subsystem.
gpio_init();
irmp_init ();
//Start os task
system_os_task(user_procTask, user_procTaskPrio,user_procTaskQueue, user_procTaskQueueLen);
system_os_post(user_procTaskPrio, 0, 0 );
os_printf("IRMP listening ...\n");
}
static void zcdimmer_hw_timer_cb(){
if(hw_timer_armed){
if(dimval){
u32 ct=system_get_time();
if(triac_open){
gpio_output_set(0,lamppin_bit, lamppin_bit, 0);
triac_open=0;
u32 t0=zeroCrossCalculator.times[zeroCrossCalculator.current_time],
T2=zeroCrossCalculator.halfperiod,
Dt=zeroCrossCalculator.detector_shift;
size_t i;
if(zeroCrossCalculator.last_state){
//t0+=Dt;//see the detector tick for more info
}else{
//t0-=Dt;
//This is not a good solution due to the instability of the falling edge.
i=zeroCrossCalculator.current_time;
t0=zeroCrossCalculator.times[DECI(i,times_size)];
t0+=T2;
}
if(t0>ct) t0-=T2;
Dt=256;
Dt-=dimval_abs;
Dt*=T2;
Dt>>=8;
Dt+=t0;
if(Dt<ct) Dt+=T2;
HW_t_targ=Dt;
}else if(HW_t_targ<ct){
gpio_output_set(lamppin_bit,0, lamppin_bit, 0);
triac_open=1;
}
hw_timer_arm(hw_timer_poll);
}else{
static void ICACHE_FLASH_ATTR initDone_cb() {
TESTP("Start test\n");
easygpio_pinMode(LED, EASYGPIO_NOPULL, EASYGPIO_OUTPUT);
easygpio_outputEnable(LED, 0);
easygpio_pinMode(XMIT, EASYGPIO_NOPULL, EASYGPIO_OUTPUT);
easygpio_outputEnable(XMIT, 0);
os_timer_disarm(&xmit_timer);
os_timer_setfn(&xmit_timer, (os_timer_func_t *) xmitWordCb, NULL);
os_timer_arm(&xmit_timer, 2000, true); // repeat every 2S
hw_timer_init(FRC1_SOURCE, 1);
hw_timer_set_func(hw_timer_cb);
hw_timer_arm(PULSE_WIDTH);
}
void user_init(void)
{
hw_timer_init(1);
hw_timer_set_func(hw_test_timer_cb);
hw_timer_arm(100);
}
void ir_tx_handler()//u8 ir_tx_addr, u8 ir_tx_data,u16 ir_tx_rep)
{
u32 t_expire=0;
static u32 rep_expire_us=110000;//for nec 32bit mode
static u16 data_tmp=0;
static u8 ir_tx_bit_num=0;
static u8 ir_bit_state=TX_BIT_CARRIER;
#if IR_TX_STATUS_MACHINE_HW_TIMER
hw_timer_stop();
#else
os_timer_disarm(&ir_tx_timer);
#endif
switch(ir_tx_state)
{
case IR_TX_IDLE:
{
gen_carrier_clk();
ir_tx_state = IR_TX_HEADER;
#if IR_TX_STATUS_MACHINE_HW_TIMER
hw_timer_arm(IR_NEC_HEADER_HIGH_US);
hw_timer_start();
#else
os_timer_arm_us(&ir_tx_timer, IR_NEC_HEADER_HIGH_US, 0);//143 9ms
#endif
break;
}
case IR_TX_HEADER:
{
ir_tx_carrier_clr();
#if IR_TX_STATUS_MACHINE_HW_TIMER
hw_timer_arm(IR_NEC_HEADER_LOW_US);
hw_timer_start();
#else
os_timer_arm_us(&ir_tx_timer, IR_NEC_HEADER_LOW_US, 0);//71 ,4.5ms
#endif
ir_tx_state=IR_TX_DATA;
ir_bit_state=TX_BIT_CARRIER;
data_tmp=ir_tx_addr;
rep_expire_us-=13500;
break;
}
case IR_TX_DATA:
{
if(ir_bit_state==TX_BIT_CARRIER){
t_expire=IR_NEC_DATA_HIGH_US;
ir_bit_state=TX_BIT_LOW;
gen_carrier_clk();
}else if(ir_bit_state==TX_BIT_LOW){
ir_tx_carrier_clr();
if( (data_tmp>>(ir_tx_bit_num% IR_NEC_BIT_NUM ))&0x1){
t_expire=IR_NEC_DATA_LOW_1_US;
} else{
t_expire=IR_NEC_DATA_LOW_0_US;
}
ir_tx_bit_num++;
if(ir_tx_bit_num==IR_NEC_BIT_NUM ){
if(ir_tx_standard) data_tmp=(~ir_tx_addr);
else data_tmp = ir_tx_addr2;
}else if(ir_tx_bit_num==IR_NEC_BIT_NUM*2 ){
if(ir_tx_standard) data_tmp=ir_tx_cmd;
else data_tmp=ir_tx_cmd;
}else if(ir_tx_bit_num==IR_NEC_BIT_NUM*3){
if(ir_tx_standard) data_tmp=(~ir_tx_cmd);
else data_tmp=ir_tx_cmd2;
}else if((ir_tx_bit_num==(IR_NEC_BIT_NUM*4+1))){
//clean up state for next or for repeat
ir_tx_state=IR_TX_IDLE;
ir_tx_bit_num=0;
ir_bit_state=TX_BIT_CARRIER;
#if IR_TX_STATUS_MACHINE_HW_TIMER
hw_timer_stop();
#else
os_timer_disarm(&ir_tx_timer);
#endif
if(ir_tx_rep>0){
t_expire= (rep_expire_us -5);
#if IR_TX_STATUS_MACHINE_HW_TIMER
hw_timer_arm(t_expire);
hw_timer_start();
#else
os_timer_arm_us(&ir_tx_timer, t_expire, 0);//71
#endif
rep_expire_us=IR_NEC_REP_CYCLE;
ir_tx_state=IR_TX_REP;
}else{
rep_expire_us=IR_NEC_REP_CYCLE;
ir_tx_state=IR_TX_IDLE;
}
break;
}
ir_bit_state=TX_BIT_CARRIER;
}else{
}
void ICACHE_FLASH_ATTR user_init(void)
{
hw_timer_init(FRC1_SOURCE, 1);
hw_timer_set_func(hw_test_timer_cb);
hw_timer_arm(100);
}
void ZCD_startTimer(){
if(!hw_timer_armed){
hw_timer_armed=1;
hw_timer_arm(hw_timer_poll);
}
}