int i2c_write(int device, unsigned char *buf, int count)
{
int cnt = count;
int timeout = 5;
device &= 0xFF;
i2c_open();
__i2c_send_nack(); /* Master does not send ACK, slave sends it */
W_try_again:
if (timeout < 0)
goto W_timeout;
cnt = count;
__i2c_send_start();
if (i2c_put_data( (device << 1) | I2C_WRITE ) < 0)
goto device_err;
#if 0 //CONFIG_JZ_TPANEL_ATA2508
if (address == 0xff)
{
while (cnt)
{
if (i2c_put_data_nack(*buf) < 0)
break;
cnt--;
buf++;
}
}
else
#endif
{
while (cnt)
{
if (i2c_put_data(*buf) < 0)
break;
cnt--;
buf++;
}
}
__i2c_send_stop();
i2c_close();
return count - cnt;
device_err:
timeout--;
__i2c_send_stop();
goto W_try_again;
W_timeout:
logf("Write I2C device 0x%2x failed.", device);
__i2c_send_stop();
i2c_close();
return -1;
}
int i2c_read(int device, unsigned char *buf, int count)
{
int cnt = count;
int timeout = 5;
device &= 0xFF;
i2c_open();
L_try_again:
if (timeout < 0)
goto L_timeout;
__i2c_send_nack(); /* Master does not send ACK, slave sends it */
__i2c_send_start();
if (i2c_put_data( (device << 1) | I2C_READ ) < 0)
goto device_err;
__i2c_send_ack(); /* Master sends ACK for continue reading */
while (cnt)
{
if (cnt == 1)
{
if (i2c_get_data(buf, 0) < 0)
break;
}
else
{
if (i2c_get_data(buf, 1) < 0)
break;
}
cnt--;
buf++;
}
__i2c_send_stop();
i2c_close();
return count - cnt;
device_err:
timeout--;
__i2c_send_stop();
goto L_try_again;
L_timeout:
__i2c_send_stop();
logf("Read I2C device 0x%2x failed.", device);
i2c_close();
return -1;
}
int main(int argc, char *argv[])
{
int mode,i;
char data[8];
if( i2c_open(BUS,I2C_DEVICE) < 0)
return -1;
if(argc == 2 && argv[1][0] == 'h')
mode = 1;
else
mode = 0;
data[0] = 0;
data[1] = 0;
for(i=2;i<8;i++)
data[i] = '0';
//i2c_write(data,10);
data[0] = 0;
data[1] = 0;
i2c_write(data,2);
dumpEeprom(mode);
i2c_close();
return 0;
}
/*!
* \brief Execute quit shell.
*
* \param pI2C Pointer to \h_i2c handle.
* \param nArgc Number of input arguments.
* \param sArgv Array of input argument strings.
*
* \return Returns RC_QUIT.
*/
static int execQuit(i2c_t *pI2C, int nArgc, const char *sArgv[])
{
//printf("execQuit(%s, %d, ...)\n", sArgv[0], nArgc);
i2c_close(pI2C);
return RC_QUIT;
}
//---------------------------------------------------------------------------
void QboxDialog::on_openBtn_clicked()
{
if(isOpen()) {
close_frontend();
return;
}
#if 1
i2c_close();
unsigned char tmp8[2];
i2c_fd = i2c_open("/dev/i2c-5");
if(i2c_fd < 0) {
qDebug("Failed to open i2c");
return;
}
// read device id from system register
if(i2c_read(1, 0x00) > 0)
qDebug("Device ID Register: 0x%02x, Device id: 0x%02x revision: 0x%02x",
i2c_rx_buf[0],
(i2c_rx_buf[0] >> 4),
(i2c_rx_buf[0] & 0x0f));
// read system mode register
if(i2c_read(1, 0x01) > 0) {
tmp8[0] = (i2c_rx_buf[0] >> 3) & 0x03;
tmp8[1] = i2c_rx_buf[0] & 0x07;
qDebug("System mode: 0x%02x, Modulation: %s, Mode: %s",
i2c_rx_buf[0],
tmp8[0] == 0x00 ? "BPSK":(tmp8[0] == 0x01 ? "QPSK":"Reservd"),
tmp8[1] == 0x00 ? "DVB-S":(tmp8[1] == 0x01 ? "DSS":"Reservd"));
}
/**
* Close communication with I2C slave device
*
* @param self
* @param args none
* @return none
*/
static PyObject* py_close(PyObject* self, PyObject *args) {
/* Close file descriptor */
if (i2c_close(fd) < 0) {
return PyErr_SetFromErrno(PyExc_IOError);
}
Py_RETURN_NONE;
}
void aversive_close(aversive_dev_t* dev)
{
#if CONFIG_USE_I2C
i2c_close(&dev->i2c_dev);
#elif CONFIG_USE_CAN
can_close(dev->can_dev);
#endif
}
int shut_systems() {
i2c_close(); // Zavri i2c soubory
// motor_close(); // Zavri motory (pid, zavirat pred enc)
enc_close(); // Zavri encodery
input_event_close(); // Klavesnice
led_close();
var_save(CONFIG_FILE); //Uloz vsechny promenne
return 0;
}
//---------------------------------------------------------------------------
QboxDialog::~QboxDialog()
{
delete ui;
close_frontend();
i2c_close();
free(i2c_rx_buf);
free(i2c_tx_buf);
}
int ledrgb_close () {
if(ledrgb_open_count && --ledrgb_open_count == 0) {
i2c_open();
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_CONFIG, 0);
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_ENABLE, 0);
i2c_close();
}
}
int main(void) {
int result = 0;
timer_t timerid;
// struct sigevent sev;
// struct itimerspec its;
// long long freq_nanosecs;
// sigset_t mask;
// struct sigaction sa;
//
// sa.sa_flags=SA_SIGINFO; //
// Create timer
// timer_create(, &sev, &timerid);
// printf("timer ID is 0x%lx\n", (long) timerid);
debug_print("Calling i2c init and test functions..\n",0);
result = i2c_init();
if (result != 0)
debug_print("MAIN: Error I2C initialisation.", 0);
// test ncurses
// initscr();
// printw("Hello World");
// refresh();
// getch();
// endwin();
//return 0;
while (1)
{
// A small test for Keys,.
#define ASCII_ESC 27
#define ESC 27
show_keystate();
usleep(10000);
if (i2c_keypressed(1)) printf( "%c[2J", ESC );
if (i2c_keypressed(2)) fputc(64,stdout);
if (i2c_keypressed(4)) break;
}
(void) printf("Terminate\n");
i2c_close();
return 0;
}
int
cam_init(void)
{
int i=0;
unsigned char pair[2];
int not_finished=1;
i2ch=i2c_open(I2CBUS, CAM_ADDR);
// do a reset
// reset the sensor
pair[0]=MT9M001_RESET; pair[1]=0x0001;
i2c_write(i2ch, CAM_ADDR, pair, 2);
delay_ms(999);
do
{
// obtain address and value to program
pair[0]=params_1280x1024[i];
pair[1]=params_1280x1024[i+1];
// reached end?
if ((pair[0]==0xaa) && (pair[1]==0xbb))
{
if ((params_1280x1024[i+2]==0xcc) && (params_1280x1024[i+3]==0xdd))
{
// end sequence seen.
not_finished=0;
break;
}
}
//i2c_write(i2ch, pair, 2);
i2c_write(i2ch, CAM_ADDR, pair, 2);
delay_ms(10);
i=i+2;
}while (not_finished);
// test
//pair[0]=OV9655_COM3; pair[1]=0x80;
//i2c_write_ignore_nack(i2ch, CAM_ADDR, pair, 2);
//delay_ms(10);
cam_id_dump();
i2c_close(i2ch);
printf("Camera should be working\n");
return(0);
}
int main(int argc, char** argv) {
i2c_init();
bool cable = i2c_start_cable_present();
printf("%x\n", cable);
i2c_close();
if (cable != 0)
return 0;
else
return 1;
}
void ledrgb_set(uint8_t rgb_mask, uint8_t r, uint8_t g, uint8_t b)
{
//TRACE_INFO("ledrgb_set %x %x %x\r\n", r, g, b);
i2c_open();
if (rgb_mask & 0x1)
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_RPWM, r);
if (rgb_mask & 0x2)
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_GPWM, g);
if (rgb_mask & 0x4)
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_BPWM, b);
i2c_close();
}
/**
* @brief Open an I2C device
*
* @param pcI2C_busName I2C bus device name
* @param devAddr address of the I2C device on the bus
* @return pointer to the I2C device structure, or INVALID_I2C_BUS, INVALID_I2C_ADDRESS error codes.
*/
i2c_device
i2c_open(const char *pcI2C_busName, uint32_t devAddr)
{
struct i2c_device_unix *id = malloc(sizeof(struct i2c_device_unix));
if (id == 0)
return INVALID_I2C_BUS ;
id->fd = open(pcI2C_busName, O_RDWR | O_NOCTTY | O_NONBLOCK);
if (id->fd == -1) {
perror("Cannot open I2C bus");
i2c_close(id);
return INVALID_I2C_BUS ;
}
if (ioctl(id->fd, I2C_SLAVE, devAddr) < 0) {
perror("Cannot select I2C device");
i2c_close(id);
return INVALID_I2C_ADDRESS ;
}
return id;
}
int cam_trigger() {
int i=0;
unsigned char pair[2];
i2ch=i2c_open(I2CBUS, CAM_ADDR);
// trigger an exposure
pair[0]=MT9M001_FRAME_RESTART; pair[1]=0x0001;
i2c_write(i2ch, CAM_ADDR, pair, 2);
cam_id_dump();
i2c_close(i2ch);
return(0);
}
unsigned char cam_reg_read(unsigned char addr, unsigned char reg)
{
int ret;
unsigned char buf[2];
// To read from the camera, we first write the register value
buf[0]=reg;
//i2c_write_ignore_nack(i2ch, CAM_ADDR, buf, 1);
i2c_write(i2ch, (char *) CAM_ADDR, buf, 1);
i2c_close(i2ch);
i2ch=i2c_open(I2CBUS, CAM_ADDR);
ret=i2c_read_no_ack(i2ch, CAM_ADDR, buf, 1);
if (ret<0)
printf("cam_reg_read error!\n");
return(buf[0]);
}
static be_jse_symbol_t *i2c_module_handle_cb(be_jse_vm_ctx_t *execInfo, be_jse_symbol_t *var, const char *name)
{
if (0 == strcmp(name, "open")) {
return i2c_open();
}
if (0 == strcmp(name, "read")) {
return i2c_read();
}
if (0 == strcmp(name, "write")) {
return i2c_write();
}
if (0 == strcmp(name, "close")) {
return i2c_close();
}
return (BE_JSE_FUNC_UNHANDLED);
}
int ledrgb_open () {
if(!ledrgb_open_count++) {
i2c_open();
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_ENABLE, LEDRGB_CHIPEN);
//delay(500);
Task_sleep(1);
//i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_CONFIG, LEDRGB_CPMODE_AUTO|LEDRGB_PWM_HF|LEDRGB_INT_CLK_EN|LEDRGB_R_TO_BATT);
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_CONFIG, LEDRGB_CPMODE_AUTO|LEDRGB_PWM_HF|LEDRGB_INT_CLK_EN|LEDRGB_R_TO_BATT|LEDRGB_PWRSAVE_EN);
//delay(20);
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_OPMODE, LEDRGB_RMODE_DC|LEDRGB_GMODE_DC|LEDRGB_BMODE_DC);
//config lights:
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_RCURRENT, 0x20);
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_GCURRENT, 0x20);
i2cMasterWrite(LEDRGB_PHY_ADDR, 1, LEDRGB_REG_BCURRENT, 0x20);
i2c_close();
}
}
int main(int argc, char** argv) {
if (argc < 3) {
fprintf(stderr, "Must specify I2C bus number and command\n");
return -1;
}
int returnVal = -1;
int fd = i2c_open(atoi(argv[1]), I2C_ADDRESS);
if (fd == -1)
return -1;
if (strcmp(argv[2], "s") == 0) {
returnVal = switch_application(fd);
} else if (strcmp(argv[2], "v") == 0) {
unsigned char version[INFO_SIZE];
version[INFO_SIZE] = '\0';
returnVal = read_version(fd, version, INFO_SIZE);
if (returnVal != -1)
printf("%s\n", version);
} else if (strcmp(argv[2], "c") == 0) {
unsigned char buffer[2];
returnVal = read_checksum(fd, buffer, sizeof(buffer));
if (returnVal != -1) {
printf("%02X %02X\n", buffer[0], buffer[1]);
}
} else {
fprintf(stderr, "Unknown command\n");
}
i2c_close(fd);
return returnVal;
}
/*common write */
int i2c_common_write(struct i2c_dev_info_s *dev, void *data, int offset, int size)
{
int fd = 0, write_len, ret;
halI2CLock();
fd = hal_i2c_init(i2c_dev->i2c_controler);
if(fd < 0)
{
ret = ERROR;
goto out;
}
i2c_channel_switch(dev, fd);
ret = hal_i2c_write(fd, i2c_dev->dev_addr[0], offset, buf, size);
if(ret < 0)
goto out;
out:
if(fd > 0)
i2c_close(fd);
halI2CUnLock();
return ret;
}
static u32 omap5evm_get_board_rev(void)
{
u32 ret = 0;
hal_i2c i2c_id = HAL_I2C1;
u32 clk32;
u16 slave;
u16 reg_addr;
u16 cmd[7];
ret = i2c_init(i2c_id);
if (ret != 0) {
printf("Failed to init I2C-%d\n", i2c_id);
return ret;
}
slave = 0x50; reg_addr = 0x8;
cmd[0] = (reg_addr & 0xFF);
clk32 = readl(CLK32K_COUNTER_REGISTER);
ret = i2c_read(i2c_id, slave, 12, &cmd[0], clk32, 0xFF);
if (ret != 0) {
printf("I2C read failed, ret = %d\n", ret);
return ret;
}
ret = i2c_close(i2c_id);
if (ret != 0) {
printf("i2c close for bus %d failed, ret = %d\n",
i2c_id, ret);
return ret;
}
ret = crc_board_rev((u8 *) cmd);
return ret;
}
int main() {
file = i2c_open("/dev/i2c-4");
if (file == -1) {
printf("Unable to open i2c bus.\n");
exit(1);
}
printf("Opened i2c bus\n");
__u8 tmp;
/*
* Accel configuration
*/
/* CTRL_REG1_A: low power disabled, 400Hz update rate, all axes enabled */
tmp = 0x97;
if(i2c_write(file, ACCEL_ADDRESS, ACCEL_CTRL_REG1_A, 1, &tmp) != 1) {
printf("Unable to write CTRL_REG1A\n");
}
/* CTRL_REG4_A: scale, high res update mode */
tmp = 0x08;
if(i2c_write(file, ACCEL_ADDRESS, ACCEL_CTRL_REG4_A, 1, &tmp) != 1) {
printf("Unable to write CTRL_REG4A\n");
}
/*
* Compass configuration
*/
/* CRA_REG_M: temp sensor on, update rate set to 220Hz */
tmp = 0x9C;
if(i2c_write(file, MAGNET_ADDRESS, MAGNET_CRA_REG_M, 1, &tmp) != 1) {
printf("Unable to write CRA_REG_M\n");
}
/* CRB_REG_M: gain setting */
tmp = 0xE0;
if(i2c_write(file, MAGNET_ADDRESS, MAGNET_CRB_REG_M, 1, &tmp) != 1) {
printf("Unable to write CRB_REG_M\n");
}
/* MR_REG_M continous-conversion mode */
tmp = 0x00;
if(i2c_write(file, MAGNET_ADDRESS, MAGNET_MR_REG_M, 1, &tmp) != 1) {
printf("Unable to write MR_REG_M\n");
}
/*
* Gyro configuration
*/
/* CTRL_REG1 ODR, bandwidth, power down off, all axes enabled */
tmp = 0xEF;
if(i2c_write(file, GYRO_ADDRESS, GYRO_CTRL_REG1, 1, &tmp) != 1) {
printf("Unable to write CTRL_REG1_A\n");
}
/* CTRL_REG4 ODR, full scale */
tmp = 0x10;
if(i2c_write(file, GYRO_ADDRESS, GYRO_CTRL_REG4, 1, &tmp) != 1) {
printf("Unable to write CTRL_REG1_A\n");
}
__u8 accel_axes[6];
__u8 magnet_axes[6];
__u8 gyro_axes[6];
__s16 accel_values[3];
__s16 magnet_values[3];
__s16 gyro_values[3];
while(1) {
if(i2c_read(file, ACCEL_ADDRESS, ACCEL_AXES_REG, 6, accel_axes) != 6) {
printf("Unable to read from accel device\n");
}
accel_values[0] = (__s16)(accel_axes[1]<<8 | accel_axes[0]);
accel_values[1] = (__s16)(accel_axes[3]<<8 | accel_axes[2]);
accel_values[2] = (__s16)(accel_axes[5]<<8 | accel_axes[4]);
if(i2c_read(file, MAGNET_ADDRESS, MAGNET_AXES_REG, 6, magnet_axes) != 6) {
printf("Unable to read from magnet device\n");
}
magnet_values[0] = (__s16)(magnet_axes[1]<<8 | magnet_axes[0]);
magnet_values[2] = (__s16)(magnet_axes[3]<<8 | magnet_axes[2]);
magnet_values[1] = (__s16)(magnet_axes[5]<<8 | magnet_axes[4]);
if(i2c_read(file, GYRO_ADDRESS, GYRO_AXES_REG, 6, gyro_axes) != 6) {
printf("Unable to read from gyro device\n");
}
gyro_values[0] = (__s16)(gyro_axes[1]<<8 | gyro_axes[0]);
gyro_values[1] = (__s16)(gyro_axes[3]<<8 | gyro_axes[2]);
gyro_values[2] = (__s16)(gyro_axes[5]<<8 | gyro_axes[4]);
printf("a: %06hi, %06hi, %06hi m: %06hi, %06hi, %06hi g:%06hi, %06hi, %06hi \n",
accel_values[0], accel_values[1], accel_values[2],
magnet_values[0], magnet_values[1], magnet_values[2],
gyro_values[0], gyro_values[1], gyro_values[2]);
}
if (i2c_close(file) != 0) {
printf("Unable to close i2c bus.\n");
}
return 0;
}
/*!
* mxc91231_tcd_mod_init() - initial tcd setup
* This performs the platform specific hardware setup for the MX2ADS.
*/
int mxc91231_tcd_mod_init (void)
{
int i2c = 1;
int gpio = 1;
bool res;
unsigned int reg_value;
int i;
#if 0
#ifdef CONFIG_OTG_ZASEVB_DIFFERENTIAL_UNIDIRECTIONAL
int mode = XCVR_D_D;
#elif CONFIG_OTG_ZASEVB_DIFFERENTIAL_BIDIRECTIONAL
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_UNIDIRECTIONAL
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_BIDIRECTIONAL
int mode = XCVR_SE0_SE0;
#endif /* CONFIG_OTG_ZASEVB_.... */
#endif
#if 1
#ifdef CONFIG_OTG_ZASEVB_DIFFERENTIAL_BIDIRECTIONAL
int hwmode = XCVR_D_D;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_ZASEVB_DIFFERENTIAL_UNIDIRECTIONAL
int hwmode = XCVR_D_SE0_NEW;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_UNIDIRECTIONAL
int hwmode = XCVR_SE0_D_NEW;
int newmode = XCVR_SE0_D_NEW;
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_BIDIRECTIONAL
int hwmode = XCVR_SE0_SE0;
int newmode = XCVR_SE0_SE0;
#else
#error Please Configure Transceiver Mode
#endif /* CONFIG_OTG_ZASEVB_.... */
#endif
printk(KERN_INFO"%s: AAAA22\n",__FUNCTION__);
TRACE_MSG0(TCD, "1. MC13783 Connectivity");
mxc_mc13783_mod_init();
TRACE_MSG0(TCD, "2. Transceiver setup");
switch(hwmode) {
case XCVR_D_D:
case XCVR_SE0_D_NEW:
case XCVR_D_SE0_NEW:
break;
case XCVR_SE0_SE0:
// this works with XCVR_SE0_SE0 if AP_GPIO_AP_C16 not configured
//isp1301_configure(dat_se0_bidirectional, spd_susp_reg); // XCVR_SEO_SE0
// XXX configure mc13783 transceiver here
break;
}
//isp1301_configure(vp_vm_bidirectional, spd_susp_reg); // XCVR_D_D
TRACE_MSG0(TCD, "5. SET TCD OPS");
THROW_UNLESS(mxc91231_tcd_instance = otg_set_tcd_ops(&tcd_ops), error);
mxc_iomux_gpio_mc13783_set (hwmode);
#if 0
/*
*
* Default
* USB_TXEO_B OE (9 OE)
* USB_DAT_VP DAT_VP (14 DAT/VP)
* USB_SE0_VM SE0_VM (13 SE0/VM)
*
* USB_RXD RCV (12 RCV)
*
* USB_VP VP (11 VP)
* USB_VM VM (10 VM)
*
* AR_USB_VP GP_AP_C16 MUX3 - USB_VP1 AP_GPIO_AP_C16
* AR_USB_VM GP_AP_C17 MUX3 - USB_VM1 AP_GPIO_AP_C17
*/
TRACE_MSG0(OCD, "6. Setup USBOTG IOMUX");
#if defined(CONFIG_ARCH_MXC91231)
printk(KERN_INFO"IOMUX setting for MXC91231\n");
iomux_config_mux(SP_USB_TXOE_B, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_DAT_VP, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_SE0_VM, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_RXD, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
#endif
#if defined(CONFIG_MACH_I30030EVB) || defined(CONFIG_ARCH_I30030EVB)
printk(KERN_INFO"IOMUX setting for I30030EVB\n");
iomux_config_mux(PIN_USB_XRXD, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_TXENB, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
#endif /* CONFIG_ARCH_I30030EVB */
#endif
switch(hwmode) {
case XCVR_D_SE0_NEW:
TRACE_MSG0(TCD, "D_D - vp_vm_bidirectional");
printk(KERN_INFO"%s: D_D - Differential Unidirectional\n", __FUNCTION__);
// #if defined(CONFIG_ARCH_MXC91231)
// iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// #endif
mc13783_convity_set_single_ended_mode(FALSE);
mc13783_convity_set_directional_mode(FALSE);
break;
case XCVR_SE0_D_NEW:
TRACE_MSG0(TCD, "SE0_D");
printk(KERN_INFO"%s: SE0_D - Single Ended Unidirectional\n", __FUNCTION__);
mc13783_convity_set_single_ended_mode(TRUE);
mc13783_convity_set_directional_mode(FALSE);
break;
case XCVR_D_D:
TRACE_MSG0(TCD, "D_SE0");
printk(KERN_INFO"%s: D_SE0 - Differential Bidirectional\n", __FUNCTION__);
mc13783_convity_set_single_ended_mode(FALSE);
mc13783_convity_set_directional_mode(TRUE);
break;
case XCVR_SE0_SE0:
TRACE_MSG0(TCD, "SE0_SE0 - SEO_bidirectional");
printk(KERN_INFO"%s: SE0_SE0 - Single Ended Bidirectional\n", __FUNCTION__);
mc13783_convity_set_single_ended_mode(TRUE);
mc13783_convity_set_directional_mode(TRUE);
break;
}
TRACE_MSG0(TCD, "7. SET HWMODE");
mxc_set_transceiver_mode(newmode);
mc13783_convity_set_var_disconnect (TRUE); // variable 1k5 and UDP/UDM pull-down are disconnected. (PULLOVER)
mc13783_convity_set_usb_transceiver (TRUE); //USB transceiver is disabled (USBXCVREN)
mc13783_convity_set_udp_auto_connect (FALSE); //variable UDP is not automatically connected (SE0CONN)
mc13783_convity_set_pull_down_switch (PD_UDP_150, FALSE); //150K UDP pull-up switch is out (DP150KPU)
mc13783_convity_set_udp_pull(FALSE); //1.5K UDP pull-up and USB xcver is controlled by SPI bits.(USBCNTRL)
mc13783_convity_set_output (TRUE, FALSE); //disable vbus
mc13783_convity_set_output (FALSE, FALSE); //disable vusb
mc13783_convity_set_output (FALSE, TRUE); //enable vusb
#if 1
for (i=48; i<51; i++){
mc13783_read_reg (PRIO_CONN, i, ®_value);
printk (KERN_INFO"Register %d = %8X\n", i, reg_value);
}
#endif
#if 0 //test for interrupt on changing DP
iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_NONE);
iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_NONE);
gpio_config(2, 16, false, GPIO_INT_RISE_EDGE);
gpio = gpio_request_irq(2, 16, GPIO_HIGH_PRIO, gpio_c16_int_hndlr,
SA_SHIRQ, "VP1", NULL);
THROW_IF(gpio, error);
gpio_config_int_en(2, 16, TRUE); // XXX this might not be needed
gpio_config(2, 17, false, GPIO_INT_RISE_EDGE);
gpio = gpio_request_irq(2, 17, GPIO_HIGH_PRIO, gpio_c17_int_hndlr,
SA_SHIRQ, "VP1", NULL);
THROW_IF(gpio, error);
gpio_config_int_en(2, 17, TRUE); // XXX this might not be needed
while (1){
udelay(1000);
}
#endif
#if 0
while(1){
// mc13783_convity_set_var_disconnect (FALSE);
// mc13783_convity_set_udp_pull (FALSE);
// mc13783_convity_set_udp_auto_connect (TRUE);
// mc13783_convity_set_speed_mode (TRUE);
// mc13783_convity_set_pull_down_switch(PD_PU, FALSE);
}
#endif
#if 0 //beautiful pulse between zero and 3.3 on DP
mc13783_convity_set_speed_mode (FALSE); //set high speed
while(1){
mc13783_convity_set_pull_down_switch(PD_PU, TRUE); //variable 1.5K pull-up switch in
mc13783_convity_set_pull_down_switch(PD_UPD_15, FALSE); //DP pull down switch is off
udelay(1000);
mc13783_convity_set_pull_down_switch(PD_PU, FALSE); //variable 1.5K pull-up switch off
mc13783_convity_set_pull_down_switch(PD_UPD_15, TRUE); //DP pull down switch is on
udelay(1000);
}
#endif
#if 0 //beautiful pulse between zero and 3.3 on DM
mc13783_convity_set_speed_mode (TRUE); //set low speed
while(1){
mc13783_convity_set_pull_down_switch(PD_PU, TRUE); //variable 1.5K pull-up switch in
mc13783_convity_set_pull_down_switch(PD_UDM_15, FALSE); //DP pull down switch is off
udelay(1000);
mc13783_convity_set_pull_down_switch(PD_PU, FALSE); //variable 1.5K pull-up switch off
mc13783_convity_set_pull_down_switch(PD_UDM_15, TRUE); //DP pull down switch is on
udelay(1000);
}
#endif
#if 0 //checking VBUS
mc13783_convity_set_output (TRUE, TRUE); //enable VBUS
udelay(1000);
// mc13783_convity_set_output (TRUE, FALSE); //disable VBUS
while(1){
udelay(1000);
}
#endif
#if 0
while (1){
mc13783_convity_set_vbus (FALSE); //pull-down NMOS switch is on
}
#endif
#if 0
mc13783_convity_set_vusb_voltage (TRUE); //set the VUSB voltage to 3.3
mc13783_convity_set_output (FALSE, TRUE); //enable VUSB
#endif
/* Success! */
TRACE_MSG0(TCD, "8. Success!");
CATCH(error) {
printk(KERN_INFO"%s: failed\n", __FUNCTION__);
UNLESS (i2c) i2c_close();
//SHP
//UNLESS (gpio) gpio_free_irq (3, GPIO_PIN, GPIO_HIGH_PRIO);
return -EINVAL;
}
TRACE_MSG0(TCD, "MX2_MOD_TCD_INIT FINISHED");
return 0;
}
void c_entry(void)
{
static I2C_SETUP_T i2c_setup[2];
static volatile I2C_MTX_SETUP_T i2c_mtx_setup;
static I2C_MTXRX_SETUP_T i2c_mtxrx_setup;
static I2C_MRX_SETUP_T i2c_mrx_setup;
UNS_8 rx_data[16], tx_data[16];
/* Disable interrupts in ARM core */
disable_irq();
/* Setup miscellaneous board functions */
ea3250_board_init();
/* Set virtual address of MMU table */
cp15_set_vmmu_addr((void *)
(IRAM_BASE + (256 * 1024) - (16 * 1024)));
/* Initialize interrupt system */
int_initialize(0xFFFFFFFF);
/* Install standard IRQ dispatcher at ARM IRQ vector */
int_install_arm_vec_handler(IRQ_VEC, (PFV) lpc32xx_irq_handler);
/* Enable I2C1/2 clock */
clkpwr_clk_en_dis(CLKPWR_I2C1_CLK,1);
clkpwr_clk_en_dis(CLKPWR_I2C2_CLK,1);
/* install default I2C1 & I2C2 interrupt handlers */
int_install_ext_irq_handler(IRQ_I2C_1,
(PFV) i2c1_user_interrupt, ACTIVE_LOW, 1);
int_install_ext_irq_handler(IRQ_I2C_2,
(PFV) i2c2_user_interrupt, ACTIVE_LOW, 1);
/* Enable IRQ interrupts in the ARM core */
enable_irq();
/* open I2C1 */
i2cdev1 = i2c_open(I2C1, 0);
/* formally assign a 7-bit slave address 0x50 to I2C1 */
/* I2C1 clock is 100 kHz, 50% duty cycle, high pin drive */
i2c_setup[0].addr_mode = ADDR7BIT;
// i2c_setup[0].sl_addr = 0x60;
i2c_setup[0].rate_option= I2C_RATE_RELATIVE;
i2c_setup[0].rate = 100000;
i2c_setup[0].low_phase = 50;
i2c_setup[0].high_phase = 50;
i2c_setup[0].pins_drive = I2C_PINS_HIGH_DRIVE;
i2c_ioctl((UNS_32) i2cdev1, I2C_SETUP, (UNS_32) &i2c_setup[0]);
/* Write 9 bytes to PCA9532 and init registers, starting with reg 0x02 + auto increment = 0x10 */
tx_data[0] = 0x12;
tx_data[1] = 151; /*PSC0 = blink 1s*/
tx_data[2] = 256/3; /*PWM0 1/3 duty cycle*/
tx_data[3] = 0; /*PSC1 = blink 1/152s*/
tx_data[4] = 256/32;/*PWM1 = 1/32 duty cycle*/
tx_data[5] = 0x00; /*LS0 outputs 0 - 3 High impedance*/
tx_data[6] = 0x00; /*LS1 outputs 4 - 7 High impedance*/
tx_data[7] = 0xE4; /*LS2 output 8 High impedance (LED1 OFF)
output 9 LOW (LED2 ON)
output 10 blinks at PWM0 rate
output 11 blinks at PWM1 rate*/
tx_data[8] = 0xE4; /*LS2 output 12 High impedance (LED1 OFF)
output 13 LOW (LED2 ON)
output 14 blinks at PWM0 rate
output 15 blinks at PWM1 rate*/
i2c_mtx_setup.addr_mode = ADDR7BIT;
i2c_mtx_setup.sl_addr = 0x60;
i2c_mtx_setup.tx_data = &tx_data[0];
i2c_mtx_setup.tx_length = 9;
i2c_mtx_setup.retransmissions_max = 10;
i2c_ioctl(i2cdev1, I2C_MASTER_TX, (INT_32)&i2c_mtx_setup);
while (( i2c_mtx_setup.status & I2C_SETUP_STATUS_DONE) == 0 /*&& mtx_irq < 100000*/);
i2c_close(i2cdev1);
}
int main()
{
int handle = i2c_open(1);
printf("handle = %d\n", handle);
unsigned long long int errors = 0;
unsigned long long int transactions = 0;
FILE * errcnt = fopen("errcnt", "w");
if(!errcnt)
{
printf("cannot open file: errcnt\n");
return -1;
}
printf("errcnt opened.\n");
fseek(errcnt, 0, SEEK_SET);
fprintf(errcnt, "errcnt = %llu\n", errors);
fflush(errcnt);
while(1)
{
/*
int ioctlret = 0;
uint8_t rx;
ioctlret = I2CreadByte(0x10, 0, &rx, handle);
printf("rx = %d\n", rx);
sleep(1);
ioctlret = I2CwriteByte(0x10, 0, 8, handle);
//printf("ioctlret = %d\n", ioctlret);
sleep(1);
*/
uint8_t txb[]= {3, 0, 22};
uint8_t rxb[2];
int retry = 0;
uint8_t c;
transactions++;
do
{
i2c_transfer(0x10, 0, txb, 3, rxb, handle);
printf("\t rx = [ %d %d ]\n", rxb[0], rxb[1]);
c = get_checksum(rxb, 1);
if(c == rxb[1])
{
printf("\tchecksum good\n");
}
else
{
printf("\tchecksum not good. expected %d, received %d retry=%d\n", c, rxb[1], retry);
fprintf(errcnt, "retry\n");
fflush(errcnt);
retry++;
}
}
while(c!=rxb[1] && retry<10);
if(c!=rxb[1])
{
//declare as error.
errors++;
printf("ERROR\n");
fprintf(errcnt, "errcnt = %llu transactions = %llu\n", errors, transactions);
fflush(errcnt);
}
if(transactions%2000 == 0)
{
fprintf(errcnt, "errcnt = %llu transactions = %llu\n", errors, transactions);
fflush(errcnt);
}
//usleep(1);
/*
char block[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
I2CwriteBlock(0x10, 0, block, 11, handle);
// sleep(1);
for(volatile unsigned long long int d=0; d<=50000ULL; d++);
uint8_t rx = 0;
ioctlret = I2CreadByte(0x10, 9, &rx, handle);
//printf("ioctlret=%d rx=%d\n", ioctlret, rx);
fflush(stdout);
// sleep(1);
for(volatile unsigned long long int d=0; d<=2000ULL; d++);
transactions++;
if(rx != 9)
{
errors++;
//fseek(errcnt, 0, SEEK_SET);
fprintf(errcnt, "errcnt = %llu transactions = %llu\n", errors, transactions);
fflush(errcnt);
}
*/
/*
int i2cret;
uint8_t rx=0;
do
{
printf("Checking readiness before sending adc command.\n");
i2cret = I2CreadByte(0x10, _READY3, &rx, handle);
printf("i2cret=%d rx=%d\n", i2cret, rx);
fflush(stdout);
if(rx!=1){sleep(1);}
}
while( !(rx==1 && i2cret==1) );
printf("Sending adc command.\n");
i2cret = I2CwriteByte(0x10, _CMD3, 48, handle);
usleep(25000);
do
{
usleep(1000);
printf("Waiting before adc conversion.\n");
i2cret = I2CreadByte(0x10, _READY3, &rx, handle);
printf("i2cret=%d rx=%d\n", i2cret, rx);
fflush(stdout);
}
while( !(rx==1 && i2cret==1) );
uint8_t replyH, replyL;
i2cret = I2CreadByte(0x10, _REPLY3H, &replyH, handle);
i2cret = I2CreadByte(0x10, _REPLY3L, &replyL, handle);
printf("ADC = %d\n\n", (replyH<<8)|replyL);
sleep(1);
/*
int i2cret;
uint8_t ready2;
do
{
i2cret = I2CreadByte(0x10, _READY2, &ready2, handle);
printf("i2cret=%d rx=%d\n", i2cret, ready2);
fflush(stdout);
if(ready2!=1)
{
usleep(1000);
}
}
while(ready2!=1);
i2cret = I2CwriteByte(0x10, _CMD2, 12, handle);
sleep(1);
do
{
i2cret = I2CreadByte(0x10, _READY2, &ready2, handle);
printf("i2cret=%d rx=%d\n", i2cret, ready2);
fflush(stdout);
if(ready2!=1)
{
usleep(1000);
}
}
while(ready2!=1);
i2cret = I2CwriteByte(0x10, _CMD2, 8, handle);
sleep(1);
*/
}
i2c_close(handle);
return 0;
}
/*!
* zasevb_tcd_mod_init() - initial tcd setup
* This performs the platform specific hardware setup for the MX2ADS.
*/
int zasevb_tcd_mod_init (void)
{
int i2c = 1;
int gpio = 1;
/* ------------------------------------------------------------------------ */
#ifdef CONFIG_OTG_ZASEVB_DIFFERENTIAL_UNIDIRECTIONAL
int hwmode = XCVR_D_SE0_NEW;
int newmode = XCVR_D_D;
isp1301_tx_mode_t tx_mode = vp_vm_unidirectional; // MXC91231 ok
printk (KERN_INFO"Current setting is DIFFERENTIAL UNIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_UNIDIRECTIONAL
int hwmode = XCVR_SE0_D_NEW;
int newmode = XCVR_SE0_D_NEW;
isp1301_tx_mode_t tx_mode = dat_se0_unidirectional; // MXC91331 ok
printk (KERN_INFO"Current setting is SINGLE ENDED UNIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#elif CONFIG_OTG_ZASEVB_DIFFERENTIAL_BIDIRECTIONAL
int hwmode = XCVR_D_D;
int newmode = XCVR_D_D;
isp1301_tx_mode_t tx_mode = vp_vm_bidirectional; // MXC91331 ok
printk (KERN_INFO"Current setting is DIFFERENTIAL BIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_BIDIRECTIONAL
int hwmode = XCVR_SE0_SE0;
int newmode = XCVR_SE0_SE0;
isp1301_tx_mode_t tx_mode = dat_se0_bidirectional; //MXC91231 ok
printk (KERN_INFO"Current setting is SINGLE ENDED BIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#else
#error Please Configure Transceiver Mode
#endif /* CONFIG_OTG_ZASEVB_.... */
/* ------------------------------------------------------------------------ */
TRACE_MSG0(TCD, "1. I2C setup");
THROW_IF ((i2c = i2c_configure(ADAPTER_NAME, ISP1301_I2C_ADDR_HIGH)), error);
TRACE_MSG0(TCD, "2. ISP1301 module setup");
// isp1301_mod_init(&zasevb_isp1301_bh);
TRACE_MSG0(TCD, "3. SET TCD OPS");
THROW_UNLESS(zasevb_tcd_instance = otg_set_tcd_ops(&tcd_ops), error);
TRACE_MSG0(TCD, "4. ISP1301 device setup");
mxc_iomux_gpio_isp1301_set (hwmode);
#ifdef CONFIG_ARCH_MXC91131
writel (0x00000051, PLL2_DP_HFSOP);
writel (0x00000051, PLL2_DP_OP);
#endif /* CONFIG_ARCH_MXC91131 */
/* ------------------------------------------------------------------------ */
TRACE_MSG0(TCD, "7. SET HWMODE");
isp1301_configure(tx_mode, spd_susp_reg);
mxc_main_clock_on();
//mxc_host_clock_on();
//mxc_func_clock_on();
mxc_set_transceiver_mode(newmode);
/* Success!
*/
TRACE_MSG0(TCD, "8. Success!");
CATCH(error) {
printk(KERN_INFO"%s: failed\n", __FUNCTION__);
UNLESS (i2c) i2c_close();
// UNLESS (gpio) gpio_free_irq (ZGPIO_PORT, ZGPIO_PIN, GPIO_HIGH_PRIO);
return -EINVAL;
}
TRACE_MSG0(TCD, "MX2_MOD_TCD_INIT FINISHED");
return 0;
}
/*!
* mxc91231_tcd_mod_init() - initial tcd setup
* This performs the platform specific hardware setup for the MX2ADS.
*/
int mxc91231_tcd_mod_init (void)
{
int i2c = 1;
int gpio = 1;
bool res;
unsigned int reg_value;
int i;
#if 1
#ifdef CONFIG_OTG_BRASSBOARD_DIFFERENTIAL_BIDIRECTIONAL
int hwmode = XCVR_D_D;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_BRASSBOARD_DIFFERENTIAL_UNIDIRECTIONAL
int hwmode = XCVR_D_SE0_NEW;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_BRASSBOARD_SINGLE_ENDED_UNIDIRECTIONAL
int hwmode = XCVR_SE0_D_NEW;
int newmode = XCVR_SE0_D_NEW;
#elif CONFIG_OTG_BRASSBOARD_SINGLE_ENDED_BIDIRECTIONAL
int hwmode = XCVR_SE0_SE0;
int newmode = XCVR_SE0_SE0;
#else
#error Please Configure Transceiver Mode
#endif /* CONFIG_OTG_BRASSBOARD_.... */
#endif
printk(KERN_INFO"%s: AAAA22\n",__FUNCTION__);
TRACE_MSG0(TCD, "1. mc13783 Connectivity");
mxc_mc13783_mod_init();
TRACE_MSG0(TCD, "2. Transceiver setup");
switch(hwmode) {
case XCVR_D_D:
case XCVR_SE0_D_NEW:
case XCVR_D_SE0_NEW:
break;
case XCVR_SE0_SE0:
// this works with XCVR_SE0_SE0 if AP_GPIO_AP_C16 not configured
//isp1301_configure(dat_se0_bidirectional, spd_susp_reg); // XCVR_SEO_SE0
// XXX configure mc13783 transceiver here
break;
}
//isp1301_configure(vp_vm_bidirectional, spd_susp_reg); // XCVR_D_D
TRACE_MSG0(TCD, "5. SET TCD OPS");
THROW_UNLESS(mxc91231_tcd_instance = otg_set_tcd_ops(&tcd_ops), error);
mxc_iomux_gpio_mc13783_set (hwmode);
#if 0
/*
*
* Default
* USB_TXEO_B OE (9 OE)
* USB_DAT_VP DAT_VP (14 DAT/VP)
* USB_SE0_VM SE0_VM (13 SE0/VM)
*
* USB_RXD RCV (12 RCV)
*
* USB_VP VP (11 VP)
* USB_VM VM (10 VM)
*
* AR_USB_VP GP_AP_C16 MUX3 - USB_VP1 AP_GPIO_AP_C16
* AR_USB_VM GP_AP_C17 MUX3 - USB_VM1 AP_GPIO_AP_C17
*/
TRACE_MSG0(OCD, "6. Setup USBOTG IOMUX");
#if defined(CONFIG_ARCH_MXC91231)
printk(KERN_INFO"IOMUX setting for MXC91231\n");
iomux_config_mux(SP_USB_TXOE_B, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_DAT_VP, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_SE0_VM, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_RXD, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
#endif
#if defined(CONFIG_MACH_ARGONLVPHONE)
printk(KERN_INFO"IOMUX setting for MXC91331 and MXC91321\n");
iomux_config_mux(PIN_USB_XRXD, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_TXENB, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
#endif /* CONFIG_MACH_ARGONLVPHONE */
#endif
switch(hwmode) {
case XCVR_D_SE0_NEW:
TRACE_MSG0(TCD, "D_D - vp_vm_bidirectional");
printk(KERN_INFO"%s: D_D - Differential Unidirectional\n", __FUNCTION__);
// #if defined(CONFIG_ARCH_MXC91231)
// iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// #endif
// mc13783_convity_set_single_ended_mode(FALSE);
// mc13783_convity_set_directional_mode(FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, FALSE);
break;
case XCVR_SE0_D_NEW:
TRACE_MSG0(TCD, "SE0_D");
printk(KERN_INFO"%s: SE0_D - Single Ended Unidirectional\n", __FUNCTION__);
// mc13783_convity_set_single_ended_mode(TRUE);
// mc13783_convity_set_directional_mode(FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, TRUE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, FALSE);
break;
case XCVR_D_D:
TRACE_MSG0(TCD, "D_SE0");
printk(KERN_INFO"%s: D_SE0 - Differential Bidirectional\n", __FUNCTION__);
// mc13783_convity_set_single_ended_mode(FALSE);
// mc13783_convity_set_directional_mode(TRUE);
// iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, TRUE);
break;
case XCVR_SE0_SE0:
TRACE_MSG0(TCD, "SE0_SE0 - SEO_bidirectional");
printk(KERN_INFO"%s: SE0_SE0 - Single Ended Bidirectional\n", __FUNCTION__);
printk("OTG_DEBUG: set GPIO 16 and 17 to defaults, config BIT_DATSE0 and BIT_BIDIR for 3 wire\n");
// mc13783_convity_set_single_ended_mode(TRUE);
//
#if defined(CONFIG_ARCH_MXC91231)
iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_DEFAULT);
iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_DEFAULT);
#endif
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, TRUE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, TRUE);
// debugging stuff
// unsigned int reg_value;
// power_ic_read_reg(POWER_IC_REG_ATLAS_USB_0, ®_value);
// printk("OTG_DEBUG: Atlas POWER_IC_REG_ATLAS_USB_0 register value is: %#8X\n", reg_value);
break;
}
TRACE_MSG0(TCD, "7. SET HWMODE");
mxc_set_transceiver_mode(newmode);
#if 0
// Need to test if the following lines are needed
mc13783_convity_set_var_disconnect (TRUE); // variable 1k5 and UDP/UDM pull-down are disconnected. (PULLOVER)
mc13783__convity_set_usb_transceiver (TRUE); //USB transceiver is disabled (USBXCVREN)
mc13783__convity_set_udp_auto_connect (FALSE); //variable UDP is not automatically connected (SE0CONN)
mc13783__convity_set_pull_down_switch (PD_UDP_150, FALSE); //150K UDP pull-up switch is out (DP150KPU)
mc13783__convity_set_udp_pull(FALSE); //1.5K UDP pull-up and USB xcver is controlled by SPI bits.(USBCNTRL)
mc13783__convity_set_output (TRUE, FALSE); //disable vbus
mc13783__convity_set_output (FALSE, FALSE); //disable vusb
mc13783__convity_set_output (FALSE, TRUE); //enable vusb
#endif
#if 0 // Need to turn this on just find power_ic call to replace mc13783 with
for (i=48; i<51; i++){
mc13783_read_reg (PRIO_CONN, i, ®_value);
printk (KERN_INFO"Register %d = %8X\n", i, reg_value);
}
#endif
/* Success! */
TRACE_MSG0(TCD, "8. Success!");
CATCH(error) {
printk(KERN_INFO"%s: failed\n", __FUNCTION__);
UNLESS (i2c) i2c_close();
//SHP
//UNLESS (gpio) gpio_free_irq (3, GPIO_PIN, GPIO_HIGH_PRIO);
return -EINVAL;
}
TRACE_MSG0(TCD, "MX2_MOD_TCD_INIT FINISHED");
return 0;
}
void tb(int pi)
{
int h, e, b, len;
char *exp;
char buf[128];
printf("SMBus / I2C tests.");
/* this test requires an ADXL345 on I2C bus 1 addr 0x53 */
h = i2c_open(pi, 1, 0x53, 0);
CHECK(11, 1, h, 0, 0, "i2c open");
e = i2c_write_device(pi, h, "\x00", 1); /* move to known register */
CHECK(11, 2, e, 0, 0, "i2c write device");
b = i2c_read_device(pi, h, buf, 1);
CHECK(11, 3, b, 1, 0, "i2c read device");
CHECK(11, 4, buf[0], 0xE5, 0, "i2c read device");
b = i2c_read_byte(pi, h);
CHECK(11, 5, b, 0xE5, 0, "i2c read byte");
b = i2c_read_byte_data(pi, h, 0);
CHECK(11, 6, b, 0xE5, 0, "i2c read byte data");
b = i2c_read_byte_data(pi, h, 48);
CHECK(11, 7, b, 2, 0, "i2c read byte data");
exp = "\x1D[aBcDeFgHjKM]";
len = strlen(exp);
e = i2c_write_device(pi, h, exp, len);
CHECK(11, 8, e, 0, 0, "i2c write device");
e = i2c_write_device(pi, h, "\x1D", 1);
b = i2c_read_device(pi, h, buf, len-1);
CHECK(11, 9, b, len-1, 0, "i2c read device");
CHECK(11, 10, strncmp(buf, exp+1, len-1), 0, 0, "i2c read device");
if (strncmp(buf, exp+1, len-1))
printf("got [%.*s] expected [%.*s]\n", len-1, buf, len-1, exp+1);
e = i2c_write_byte_data(pi, h, 0x1d, 0xAA);
CHECK(11, 11, e, 0, 0, "i2c write byte data");
b = i2c_read_byte_data(pi, h, 0x1d);
CHECK(11, 12, b, 0xAA, 0, "i2c read byte data");
e = i2c_write_byte_data(pi, h, 0x1d, 0x55);
CHECK(11, 13, e, 0, 0, "i2c write byte data");
b = i2c_read_byte_data(pi, h, 0x1d);
CHECK(11, 14, b, 0x55, 0, "i2c read byte data");
exp = "[1234567890#]";
len = strlen(exp);
e = i2c_write_block_data(pi, h, 0x1C, exp, len);
CHECK(11, 15, e, 0, 0, "i2c write block data");
e = i2c_write_device(pi, h, "\x1D", 1);
b = i2c_read_device(pi, h, buf, len);
CHECK(11, 16, b, len, 0, "i2c read device");
CHECK(11, 17, strncmp(buf, exp, len), 0, 0, "i2c read device");
if (strncmp(buf, exp, len))
printf("got [%.*s] expected [%.*s]\n", len, buf, len, exp);
b = i2c_read_i2c_block_data(pi, h, 0x1D, buf, len);
CHECK(11, 18, b, len, 0, "i2c read i2c block data");
CHECK(11, 19, strncmp(buf, exp, len), 0, 0, "i2c read i2c block data");
if (strncmp(buf, exp, len))
printf("got [%.*s] expected [%.*s]\n", len, buf, len, exp);
exp = "(-+=;:,<>!%)";
len = strlen(exp);
e = i2c_write_i2c_block_data(pi, h, 0x1D, exp, len);
CHECK(11, 20, e, 0, 0, "i2c write i2c block data");
b = i2c_read_i2c_block_data(pi, h, 0x1D, buf, len);
CHECK(11, 21, b, len, 0, "i2c read i2c block data");
CHECK(11, 22, strncmp(buf, exp, len), 0, 0, "i2c read i2c block data");
if (strncmp(buf, exp, len))
printf("got [%.*s] expected [%.*s]\n", len, buf, len, exp);
e = i2c_close(pi, h);
CHECK(11, 23, e, 0, 0, "i2c close");
}
