static int i2c_reset(struct saa7134_dev *dev)
{
enum i2c_status status;
int count;
d2printk(KERN_DEBUG "%s: i2c reset\n",dev->name);
status = i2c_get_status(dev);
if (!i2c_is_error(status))
return TRUE;
i2c_set_status(dev,status);
for (count = 0; count < I2C_WAIT_RETRY; count++) {
status = i2c_get_status(dev);
if (!i2c_is_error(status))
break;
udelay(I2C_WAIT_DELAY);
}
if (I2C_WAIT_RETRY == count)
return FALSE;
if (!i2c_is_idle(status))
return FALSE;
i2c_set_attr(dev,NOP);
return TRUE;
}
void HALT_Until_Event(HALT_EVENT halt_event)
{
BOOLEAN cont;
cont = true;
while(cont)
{
lp_setHaltMode();
// process during waiting
i2c_isr(0);
i2c_isr(1);
switch(halt_event)
{
case HALT_I2C1_END:
if(i2c_get_status(1) <= I2C_MODE_ERROR)
cont = false;
break;
case HALT_I2C0_END:
if(i2c_get_status(0) <= I2C_MODE_ERROR)
cont = false;
break;
default:
cont = false;
break;
}
wdt_clear();
}
return;
}
static int i2c_reset(struct saa7134_dev *dev)
{
enum i2c_status status;
int count;
i2c_dbg(2, "i2c reset\n");
status = i2c_get_status(dev);
if (!i2c_is_error(status))
return true;
i2c_set_status(dev,status);
for (count = 0; count < I2C_WAIT_RETRY; count++) {
status = i2c_get_status(dev);
if (!i2c_is_error(status))
break;
udelay(I2C_WAIT_DELAY);
}
if (I2C_WAIT_RETRY == count)
return false;
if (!i2c_is_idle(status))
return false;
i2c_set_attr(dev,NOP);
return true;
}
static inline int i2c_send_byte(struct saa7134_dev *dev,
enum i2c_attr attr,
unsigned char data)
{
enum i2c_status status;
__u32 dword;
/* have to write both attr + data in one 32bit word */
dword = saa_readl(SAA7134_I2C_ATTR_STATUS >> 2);
dword &= 0x0f;
dword |= (attr << 6);
dword |= ((__u32)data << 8);
dword |= 0x00 << 16; /* 100 kHz */
// dword |= 0x40 << 16; /* 400 kHz */
dword |= 0xf0 << 24;
saa_writel(SAA7134_I2C_ATTR_STATUS >> 2, dword);
d2printk(KERN_DEBUG "%s: i2c data => 0x%x\n",dev->name,data);
if (!i2c_is_busy_wait(dev))
return -EIO;
status = i2c_get_status(dev);
if (i2c_is_error(status))
return -EIO;
return 0;
}
static inline int i2c_recv_byte(struct saa7134_dev *dev)
{
enum i2c_status status;
unsigned char data;
i2c_set_attr(dev,CONTINUE);
if (!i2c_is_busy_wait(dev))
return -EIO;
status = i2c_get_status(dev);
if (i2c_is_error(status))
return -EIO;
data = saa_readb(SAA7134_I2C_DATA);
d2printk(KERN_DEBUG "%s: i2c data <= 0x%x\n",dev->name,data);
return data;
}
static int i2c_is_busy_wait(struct saa7134_dev *dev)
{
enum i2c_status status;
int count;
for (count = 0; count < I2C_WAIT_RETRY; count++) {
status = i2c_get_status(dev);
if (!i2c_is_busy(status))
break;
saa_wait(I2C_WAIT_DELAY);
}
if (I2C_WAIT_RETRY == count)
return FALSE;
return TRUE;
}
static int saa7134_i2c_xfer(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs, int num)
{
struct saa7134_dev *dev = i2c_adap->algo_data;
enum i2c_status status;
unsigned char data;
int addr,rc,i,byte;
status = i2c_get_status(dev);
if (!i2c_is_idle(status))
if (!i2c_reset(dev))
return -EIO;
d2printk("start xfer\n");
d1printk(KERN_DEBUG "%s: i2c xfer:",dev->name);
for (i = 0; i < num; i++) {
if (!(msgs[i].flags & I2C_M_NOSTART) || 0 == i) {
/* send address */
d2printk("send address\n");
addr = msgs[i].addr << 1;
if (msgs[i].flags & I2C_M_RD)
addr |= 1;
if (i > 0 && msgs[i].flags & I2C_M_RD) {
/* workaround for a saa7134 i2c bug
* needed to talk to the mt352 demux
* thanks to pinnacle for the hint */
int quirk = 0xfd;
d1printk(" [%02x quirk]",quirk);
i2c_send_byte(dev,START,quirk);
i2c_recv_byte(dev);
}
d1printk(" < %02x", addr);
rc = i2c_send_byte(dev,START,addr);
if (rc < 0)
goto err;
}
if (msgs[i].flags & I2C_M_RD) {
/* read bytes */
d2printk("read bytes\n");
for (byte = 0; byte < msgs[i].len; byte++) {
d1printk(" =");
rc = i2c_recv_byte(dev);
if (rc < 0)
goto err;
d1printk("%02x", rc);
msgs[i].buf[byte] = rc;
}
} else {
/* write bytes */
d2printk("write bytes\n");
for (byte = 0; byte < msgs[i].len; byte++) {
data = msgs[i].buf[byte];
d1printk(" %02x", data);
rc = i2c_send_byte(dev,CONTINUE,data);
if (rc < 0)
goto err;
}
}
}
d2printk("xfer done\n");
d1printk(" >");
i2c_set_attr(dev,STOP);
rc = -EIO;
if (!i2c_is_busy_wait(dev))
goto err;
status = i2c_get_status(dev);
if (i2c_is_error(status))
goto err;
/* ensure that the bus is idle for at least one bit slot */
msleep(1);
d1printk("\n");
return num;
err:
if (1 == i2c_debug) {
status = i2c_get_status(dev);
printk(" ERROR: %s\n",str_i2c_status[status]);
}
return rc;
}
static int saa7134_i2c_xfer(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs, int num)
{
struct saa7134_dev *dev = i2c_adap->algo_data;
enum i2c_status status;
unsigned char data;
int addr,rc,i,byte;
status = i2c_get_status(dev);
if (!i2c_is_idle(status))
if (!i2c_reset(dev))
return -EIO;
i2c_dbg(2, "start xfer\n");
i2c_dbg(1, "i2c xfer:");
for (i = 0; i < num; i++) {
if (!(msgs[i].flags & I2C_M_NOSTART) || 0 == i) {
/* send address */
i2c_dbg(2, "send address\n");
addr = msgs[i].addr << 1;
if (msgs[i].flags & I2C_M_RD)
addr |= 1;
if (i > 0 && msgs[i].flags &
I2C_M_RD && msgs[i].addr != 0x40 &&
msgs[i].addr != 0x41 &&
msgs[i].addr != 0x19) {
/* workaround for a saa7134 i2c bug
* needed to talk to the mt352 demux
* thanks to pinnacle for the hint */
int quirk = 0xfe;
i2c_cont(1, " [%02x quirk]", quirk);
i2c_send_byte(dev,START,quirk);
i2c_recv_byte(dev);
}
i2c_cont(1, " < %02x", addr);
rc = i2c_send_byte(dev,START,addr);
if (rc < 0)
goto err;
}
if (msgs[i].flags & I2C_M_RD) {
/* read bytes */
i2c_dbg(2, "read bytes\n");
for (byte = 0; byte < msgs[i].len; byte++) {
i2c_cont(1, " =");
rc = i2c_recv_byte(dev);
if (rc < 0)
goto err;
i2c_cont(1, "%02x", rc);
msgs[i].buf[byte] = rc;
}
/* discard mysterious extra byte when reading
from Samsung S5H1411. i2c bus gets error
if we do not. */
if (0x19 == msgs[i].addr) {
i2c_cont(1, " ?");
rc = i2c_recv_byte(dev);
if (rc < 0)
goto err;
i2c_cont(1, "%02x", rc);
}
} else {
/* write bytes */
i2c_dbg(2, "write bytes\n");
for (byte = 0; byte < msgs[i].len; byte++) {
data = msgs[i].buf[byte];
i2c_cont(1, " %02x", data);
rc = i2c_send_byte(dev,CONTINUE,data);
if (rc < 0)
goto err;
}
}
}
i2c_dbg(2, "xfer done\n");
i2c_cont(1, " >");
i2c_set_attr(dev,STOP);
rc = -EIO;
if (!i2c_is_busy_wait(dev))
goto err;
status = i2c_get_status(dev);
if (i2c_is_error(status))
goto err;
/* ensure that the bus is idle for at least one bit slot */
msleep(1);
i2c_cont(1, "\n");
return num;
err:
if (1 == i2c_debug) {
status = i2c_get_status(dev);
i2c_cont(1, " ERROR: %s\n", str_i2c_status[status]);
}
return rc;
}
static int saa7134_i2c_xfer(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs, int num)
{
struct saa7134_dev *dev = i2c_adap->algo_data;
enum i2c_status status;
unsigned char data;
int addr,rc,i,byte;
status = i2c_get_status(dev);
if (!i2c_is_idle(status))
if (!i2c_reset(dev))
return -EIO;
d2printk("start xfer\n");
d1printk(KERN_DEBUG "%s: i2c xfer:",dev->name);
for (i = 0; i < num; i++) {
if (!(msgs[i].flags & I2C_M_NOSTART) || 0 == i) {
d2printk("send address\n");
addr = msgs[i].addr << 1;
if (msgs[i].flags & I2C_M_RD)
addr |= 1;
if (i > 0 && msgs[i].flags &
I2C_M_RD && msgs[i].addr != 0x40 &&
msgs[i].addr != 0x19) {
int quirk = 0xfe;
d1printk(" [%02x quirk]",quirk);
i2c_send_byte(dev,START,quirk);
i2c_recv_byte(dev);
}
d1printk(" < %02x", addr);
rc = i2c_send_byte(dev,START,addr);
if (rc < 0)
goto err;
}
if (msgs[i].flags & I2C_M_RD) {
d2printk("read bytes\n");
for (byte = 0; byte < msgs[i].len; byte++) {
d1printk(" =");
rc = i2c_recv_byte(dev);
if (rc < 0)
goto err;
d1printk("%02x", rc);
msgs[i].buf[byte] = rc;
}
if (0x19 == msgs[i].addr) {
d1printk(" ?");
rc = i2c_recv_byte(dev);
if (rc < 0)
goto err;
d1printk("%02x", rc);
}
} else {
d2printk("write bytes\n");
for (byte = 0; byte < msgs[i].len; byte++) {
data = msgs[i].buf[byte];
d1printk(" %02x", data);
rc = i2c_send_byte(dev,CONTINUE,data);
if (rc < 0)
goto err;
}
}
}
d2printk("xfer done\n");
d1printk(" >");
i2c_set_attr(dev,STOP);
rc = -EIO;
if (!i2c_is_busy_wait(dev))
goto err;
status = i2c_get_status(dev);
if (i2c_is_error(status))
goto err;
msleep(1);
d1printk("\n");
return num;
err:
if (1 == i2c_debug) {
status = i2c_get_status(dev);
printk(" ERROR: %s\n",str_i2c_status[status]);
}
return rc;
}
