/*
* CF card detect check function
*/
static void emxx_cfi_detect_check(struct work_struct *work)
{
hw_regs_t *hws[] = { &emxx_cfi_hw, NULL, NULL, NULL };
int ret;
if (gpio_get_value(GPIO_P101) == 0) {
printk(KERN_INFO "emxx_ide: plag-IN CFCARD\n");
if (emxx_cfi_host) {
emxx_cfi_connect = 0;
mdelay(200);
ide_host_remove(emxx_cfi_host);
emxx_cfi_disable();
emxx_cfi_host = NULL;
} else {
emxx_cfi_disable();
mdelay(200);
}
emxx_cfi_host = ide_host_alloc(&emxx_ide_port_info, hws);
if (!emxx_cfi_host) {
perr("failed to allocate ide host\n");
return;
}
/* Set the irq handler */
emxx_cfi_host->irq_handler = emxx_cfi_irq_handler;
emxx_cfi_enable();
emxx_cfi_connect = 1;
emxx_cfi_push++;
/* Register the CF info into the ide host */
ret = ide_host_register(emxx_cfi_host,
&emxx_ide_port_info, hws);
emxx_cfi_push--;
if (ret) {
perr("failed to register ide host\n");
emxx_cfi_connect = 0;
ide_host_free(emxx_cfi_host);
emxx_cfi_disable();
emxx_cfi_host = NULL;
}
} else {
printk(KERN_INFO "emxx_ide: plag-OUT CFCARD\n");
if (emxx_cfi_host) {
emxx_cfi_connect = 0;
mdelay(200);
ide_host_remove(emxx_cfi_host);
emxx_cfi_disable();
emxx_cfi_host = NULL;
}
}
}
static int __init falconide_init(void)
{
struct ide_host *host;
hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
int rc;
if (!MACH_IS_ATARI || !ATARIHW_PRESENT(IDE))
return -ENODEV;
printk(KERN_INFO "ide: Falcon IDE controller\n");
if (!request_mem_region(ATA_HD_BASE, 0x40, DRV_NAME)) {
printk(KERN_ERR "%s: resources busy\n", DRV_NAME);
return -EBUSY;
}
falconide_setup_ports(&hw);
host = ide_host_alloc(&falconide_port_info, hws);
if (host == NULL) {
rc = -ENOMEM;
goto err;
}
ide_get_lock(NULL, NULL);
rc = ide_host_register(host, &falconide_port_info, hws);
ide_release_lock();
if (rc)
goto err_free;
return 0;
err_free:
ide_host_free(host);
err:
release_mem_region(ATA_HD_BASE, 0x40);
return rc;
}
static int __init falconide_init(void)
{
struct ide_host *host;
struct ide_hw hw, *hws[] = { &hw };
int rc;
if (!MACH_IS_ATARI || !ATARIHW_PRESENT(IDE))
return -ENODEV;
;
if (!request_mem_region(ATA_HD_BASE, 0x40, DRV_NAME)) {
;
return -EBUSY;
}
falconide_setup_ports(&hw);
host = ide_host_alloc(&falconide_port_info, hws, 1);
if (host == NULL) {
rc = -ENOMEM;
goto err;
}
falconide_get_lock(NULL, NULL);
rc = ide_host_register(host, &falconide_port_info, hws);
falconide_release_lock();
if (rc)
goto err_free;
return 0;
err_free:
ide_host_free(host);
err:
release_mem_region(ATA_HD_BASE, 0x40);
return rc;
}
/*
* Setup, register & probe an IDE channel driven by this driver, this is
* called by one of the 2 probe functions (macio or PCI).
*/
static int pmac_ide_setup_device(pmac_ide_hwif_t *pmif, struct ide_hw *hw)
{
struct device_node *np = pmif->node;
const int *bidp;
struct ide_host *host;
ide_hwif_t *hwif;
struct ide_hw *hws[] = { hw };
struct ide_port_info d = pmac_port_info;
int rc;
pmif->broken_dma = pmif->broken_dma_warn = 0;
if (of_device_is_compatible(np, "shasta-ata")) {
pmif->kind = controller_sh_ata6;
d.tp_ops = &pmac_ata6_tp_ops;
d.port_ops = &pmac_ide_ata4_port_ops;
d.udma_mask = ATA_UDMA6;
} else if (of_device_is_compatible(np, "kauai-ata")) {
pmif->kind = controller_un_ata6;
d.tp_ops = &pmac_ata6_tp_ops;
d.port_ops = &pmac_ide_ata4_port_ops;
d.udma_mask = ATA_UDMA5;
} else if (of_device_is_compatible(np, "K2-UATA")) {
pmif->kind = controller_k2_ata6;
d.tp_ops = &pmac_ata6_tp_ops;
d.port_ops = &pmac_ide_ata4_port_ops;
d.udma_mask = ATA_UDMA5;
} else if (of_device_is_compatible(np, "keylargo-ata")) {
if (strcmp(np->name, "ata-4") == 0) {
pmif->kind = controller_kl_ata4;
d.port_ops = &pmac_ide_ata4_port_ops;
d.udma_mask = ATA_UDMA4;
} else
pmif->kind = controller_kl_ata3;
} else if (of_device_is_compatible(np, "heathrow-ata")) {
pmif->kind = controller_heathrow;
} else {
pmif->kind = controller_ohare;
pmif->broken_dma = 1;
}
bidp = of_get_property(np, "AAPL,bus-id", NULL);
pmif->aapl_bus_id = bidp ? *bidp : 0;
/* On Kauai-type controllers, we make sure the FCR is correct */
if (pmif->kauai_fcr)
writel(KAUAI_FCR_UATA_MAGIC |
KAUAI_FCR_UATA_RESET_N |
KAUAI_FCR_UATA_ENABLE, pmif->kauai_fcr);
/* Make sure we have sane timings */
sanitize_timings(pmif);
/* If we are on a media bay, wait for it to settle and lock it */
if (pmif->mdev)
lock_media_bay(pmif->mdev->media_bay);
host = ide_host_alloc(&d, hws, 1);
if (host == NULL) {
rc = -ENOMEM;
goto bail;
}
hwif = pmif->hwif = host->ports[0];
if (on_media_bay(pmif)) {
/* Fixup bus ID for media bay */
if (!bidp)
pmif->aapl_bus_id = 1;
} else if (pmif->kind == controller_ohare) {
/* The code below is having trouble on some ohare machines
* (timing related ?). Until I can put my hand on one of these
* units, I keep the old way
*/
ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, 0, 1);
} else {
/* This is necessary to enable IDE when net-booting */
ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 1);
ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, pmif->aapl_bus_id, 1);
msleep(10);
ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 0);
msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY));
}
printk(KERN_INFO DRV_NAME ": Found Apple %s controller (%s), "
"bus ID %d%s, irq %d\n", model_name[pmif->kind],
pmif->mdev ? "macio" : "PCI", pmif->aapl_bus_id,
on_media_bay(pmif) ? " (mediabay)" : "", hw->irq);
rc = ide_host_register(host, &d, hws);
if (rc)
pmif->hwif = NULL;
if (pmif->mdev)
unlock_media_bay(pmif->mdev->media_bay);
bail:
if (rc && host)
ide_host_free(host);
return rc;
}
static int __init at91_ide_probe(struct platform_device *pdev)
{
int ret;
struct ide_hw hw, *hws[] = { &hw };
struct ide_host *host;
struct resource *res;
unsigned long tf_base = 0, ctl_base = 0;
struct at91_cf_data *board = pdev->dev.platform_data;
if (!board)
return -ENODEV;
if (board->det_pin && at91_get_gpio_value(board->det_pin) != 0) {
perr("no device detected\n");
return -ENODEV;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
perr("can't get memory resource\n");
return -ENODEV;
}
if (!devm_request_mem_region(&pdev->dev, res->start + TASK_FILE,
REGS_SIZE, "ide") ||
!devm_request_mem_region(&pdev->dev, res->start + ALT_MODE,
REGS_SIZE, "alt")) {
perr("memory resources in use\n");
return -EBUSY;
}
pdbg("chipselect %u irq %u res %08lx\n", board->chipselect,
board->irq_pin, (unsigned long) res->start);
tf_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + TASK_FILE,
REGS_SIZE);
ctl_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + ALT_MODE,
REGS_SIZE);
if (!tf_base || !ctl_base) {
perr("can't map memory regions\n");
return -EBUSY;
}
memset(&hw, 0, sizeof(hw));
if (board->flags & AT91_IDE_SWAP_A0_A2) {
hw.io_ports.data_addr = tf_base + 0;
hw.io_ports.error_addr = tf_base + 4;
hw.io_ports.nsect_addr = tf_base + 2;
hw.io_ports.lbal_addr = tf_base + 6;
hw.io_ports.lbam_addr = tf_base + 1;
hw.io_ports.lbah_addr = tf_base + 5;
hw.io_ports.device_addr = tf_base + 3;
hw.io_ports.command_addr = tf_base + 7;
hw.io_ports.ctl_addr = ctl_base + 3;
} else
ide_std_init_ports(&hw, tf_base, ctl_base + 6);
hw.irq = board->irq_pin;
hw.dev = &pdev->dev;
host = ide_host_alloc(&at91_ide_port_info, hws, 1);
if (!host) {
perr("failed to allocate ide host\n");
return -ENOMEM;
}
/* setup Static Memory Controller - PIO 0 as default */
apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0);
/* with GPIO interrupt we have to do quirks in handler */
if (board->irq_pin >= PIN_BASE)
host->irq_handler = at91_irq_handler;
host->ports[0]->select_data = board->chipselect;
ret = ide_host_register(host, &at91_ide_port_info, hws);
if (ret) {
perr("failed to register ide host\n");
goto err_free_host;
}
platform_set_drvdata(pdev, host);
return 0;
err_free_host:
ide_host_free(host);
return ret;
}
