static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
{
unsigned long bmide = pci_resource_start(dev, 2); /* Not the usual 4 */
if(hwif->mate && hwif->mate->dma_base) /* Second channel at primary + 8 */
bmide += 8;
ide_setup_dma(hwif, bmide, 8);
}
void __init ide_dmacapable_sl82c105(ide_hwif_t *hwif, unsigned long dmabase)
{
unsigned char rev;
pci_read_config_byte(hwif->pci_dev, PCI_REVISION_ID, &rev);
if (rev <= 5) {
hwif->autodma = 0;
hwif->drives[0].autotune = 1;
hwif->drives[1].autotune = 1;
printk(" %s: revision %d, Bus-Master DMA disabled\n",
hwif->name, rev);
}
ide_setup_dma(hwif, dmabase, 8);
}
static void __devinit init_dma_aec62xx(ide_hwif_t *hwif, unsigned long dmabase)
{
struct pci_dev *dev = hwif->pci_dev;
if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
u8 reg54h = 0;
unsigned long flags;
spin_lock_irqsave(&ide_lock, flags);
pci_read_config_byte(dev, 0x54, ®54h);
pci_write_config_byte(dev, 0x54, reg54h & ~(hwif->channel ? 0xF0 : 0x0F));
spin_unlock_irqrestore(&ide_lock, flags);
} else {
u8 ata66 = 0;
pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);
if (!(hwif->udma_four))
hwif->udma_four = (ata66&(hwif->channel?0x02:0x01))?0:1;
}
ide_setup_dma(hwif, dmabase, 8);
}
static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
const struct ide_port_info *d)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long base = ide_pci_dma_base(hwif, d);
if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
return -1;
if (!hwif->channel)
outb(inb(base + 2) & 0x60, base + 2);
printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
hwif->name, base, base + 7);
if (ide_allocate_dma_engine(hwif))
return -1;
ide_setup_dma(hwif, base);
return 0;
}
static void __init init_dma_cmd64x (ide_hwif_t *hwif, unsigned long dmabase)
{
ide_setup_dma(hwif, dmabase, 8);
}
static int __devinit palm_bk3710_probe(struct platform_device *pdev)
{
struct clk *clk;
struct resource *mem, *irq;
ide_hwif_t *hwif;
unsigned long base, rate;
int i;
hw_regs_t hw;
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
clk = clk_get(&pdev->dev, "IDECLK");
if (IS_ERR(clk))
return -ENODEV;
clk_enable(clk);
rate = clk_get_rate(clk);
ideclk_period = 1000000000UL / rate;
/* Register the IDE interface with Linux ATA Interface */
memset(&hw, 0, sizeof(hw));
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (mem == NULL) {
printk(KERN_ERR "failed to get memory region resource\n");
return -ENODEV;
}
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (irq == NULL) {
printk(KERN_ERR "failed to get IRQ resource\n");
return -ENODEV;
}
if (request_mem_region(mem->start, mem->end - mem->start + 1,
"palm_bk3710") == NULL) {
printk(KERN_ERR "failed to request memory region\n");
return -EBUSY;
}
base = IO_ADDRESS(mem->start);
/* Configure the Palm Chip controller */
palm_bk3710_chipinit((void __iomem *)base);
for (i = 0; i < IDE_NR_PORTS - 2; i++)
hw.io_ports[i] = base + IDE_PALM_ATA_PRI_REG_OFFSET + i;
hw.io_ports[IDE_CONTROL_OFFSET] = base + IDE_PALM_ATA_PRI_CTL_OFFSET;
hw.irq = irq->start;
hw.chipset = ide_palm3710;
hwif = ide_deprecated_find_port(hw.io_ports[IDE_DATA_OFFSET]);
if (hwif == NULL)
goto out;
i = hwif->index;
if (hwif->present)
ide_unregister(i, 0, 1);
else if (!hwif->hold)
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
hwif->fixup = NULL;
hwif->tuneproc = &palm_bk3710_tune_drive;
hwif->speedproc = &palm_bk3710_tune_chipset;
hwif->mmio = 2;
default_hwif_mmiops(hwif);
if (rate >= 100000000)
hwif->ultra_mask = 0x3f; /* UDMA Mode 5 */
else
hwif->ultra_mask = 0x1f; /* UDMA Mode 4 */
hwif->mwdma_mask = 0x7;
hwif->drives[0].autotune = 1;
hwif->drives[1].autotune = 1;
hwif->ide_dma_check = &palm_bk3710_config_drive_xfer_rate;
hwif->udma_four = 1;
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
ide_setup_dma(hwif, base, 8);
idx[0] = i;
ide_device_add(idx);
if (!hwif->present)
goto out;
return 0;
out:
printk(KERN_WARNING "Palm Chip BK3710 IDE Register Fail\n");
return -ENODEV;
}
