/*
* Activate a secondary processor.
*/
int __cpuinit start_secondary(void *cpuvoid)
{
/* Setup the cpu */
cpu_init();
preempt_disable();
/* Enable TOD clock interrupts on the secondary cpu. */
init_cpu_timer();
/* Enable cpu timer interrupts on the secondary cpu. */
init_cpu_vtimer();
/* Enable pfault pseudo page faults on this cpu. */
pfault_init();
/* call cpu notifiers */
notify_cpu_starting(smp_processor_id());
/* Mark this cpu as online */
ipi_call_lock();
set_cpu_online(smp_processor_id(), true);
ipi_call_unlock();
__ctl_clear_bit(0, 28); /* Disable lowcore protection */
S390_lowcore.restart_psw.mask =
PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_EA | PSW_MASK_BA;
S390_lowcore.restart_psw.addr =
PSW_ADDR_AMODE | (unsigned long) psw_restart_int_handler;
__ctl_set_bit(0, 28); /* Enable lowcore protection */
local_irq_enable();
/* cpu_idle will call schedule for us */
cpu_idle();
return 0;
}
/*
* Activate a secondary processor.
*/
int __cpuinit start_secondary(void *cpuvoid)
{
cpu_init();
preempt_disable();
init_cpu_timer();
init_cpu_vtimer();
pfault_init();
notify_cpu_starting(smp_processor_id());
ipi_call_lock();
set_cpu_online(smp_processor_id(), true);
ipi_call_unlock();
__ctl_clear_bit(0, 28); /* Disable lowcore protection */
S390_lowcore.restart_psw.mask =
PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_EA | PSW_MASK_BA;
S390_lowcore.restart_psw.addr =
PSW_ADDR_AMODE | (unsigned long) psw_restart_int_handler;
__ctl_set_bit(0, 28); /* Enable lowcore protection */
/*
* Wait until the cpu which brought this one up marked it
* active before enabling interrupts.
*/
while (!cpumask_test_cpu(smp_processor_id(), cpu_active_mask))
cpu_relax();
local_irq_enable();
/* cpu_idle will call schedule for us */
cpu_idle();
return 0;
}
