C++ (Cpp) internal_pwr_rail_ctl примеры использования

Пример #1

Файл: kgsl_pwrctrl.c Проект: shinru2004/android_kernel_lge_ms910

void kgsl_pwrctrl_pwrrail(struct kgsl_device *device, int state)
{
	struct kgsl_pwrctrl *pwr = &device->pwrctrl;

	if (state == KGSL_PWRFLAGS_OFF) {
		if (test_and_clear_bit(KGSL_PWRFLAGS_POWER_ON,
			&pwr->power_flags)) {
			KGSL_PWR_INFO(device,
				"power off, device %d\n", device->id);
			if (internal_pwr_rail_ctl(pwr->pwr_rail, false)) {
				KGSL_DRV_ERR(device,
					"call internal_pwr_rail_ctl failed\n");
				return;
			}
			if (pwr->gpu_reg)
				regulator_disable(pwr->gpu_reg);
		}
	} else if (state == KGSL_PWRFLAGS_ON) {
		if (!test_and_set_bit(KGSL_PWRFLAGS_POWER_ON,
			&pwr->power_flags)) {
			KGSL_PWR_INFO(device,
				"power on, device %d\n", device->id);
			if (internal_pwr_rail_ctl(pwr->pwr_rail, true)) {
				KGSL_PWR_ERR(device,
					"call internal_pwr_rail_ctl failed\n");
				return;
			}
			if (pwr->gpu_reg)
				regulator_enable(pwr->gpu_reg);
		}
	}
}

Пример #2

int kgsl_pwrctrl_pwrrail(struct kgsl_device *device, unsigned int pwrflag)
{
	struct kgsl_pwrctrl *pwr = &device->pwrctrl;
	switch (pwrflag) {
	case KGSL_PWRFLAGS_POWER_OFF:
		if (pwr->power_flags & KGSL_PWRFLAGS_POWER_ON) {
			internal_pwr_rail_ctl(pwr->pwr_rail, KGSL_FALSE);
			if (pwr->gpu_reg)
				regulator_disable(pwr->gpu_reg);
			pwr->power_flags &=
					~(KGSL_PWRFLAGS_POWER_ON);
			pwr->power_flags |=
					KGSL_PWRFLAGS_POWER_OFF;
		}
		return KGSL_SUCCESS;
	case KGSL_PWRFLAGS_POWER_ON:
		if (pwr->power_flags & KGSL_PWRFLAGS_POWER_OFF) {
			internal_pwr_rail_mode(pwr->pwr_rail,
					PWR_RAIL_CTL_MANUAL);
			internal_pwr_rail_ctl(pwr->pwr_rail, KGSL_TRUE);
			if (pwr->gpu_reg)
				regulator_enable(pwr->gpu_reg);
			pwr->power_flags &=
					~(KGSL_PWRFLAGS_POWER_OFF);
			pwr->power_flags |=
					KGSL_PWRFLAGS_POWER_ON;
		}
		return KGSL_SUCCESS;
	default:
		return KGSL_FAILURE;
	}
}

Пример #3

Файл: kgsl.c Проект: AKToronto/htc-kernel-msm7227

static void kgsl_power(bool on)
{
	if (on) {
		internal_pwr_rail_mode(PWR_RAIL_GRP_CLK,
				PWR_RAIL_CTL_MANUAL);
		internal_pwr_rail_ctl(PWR_RAIL_GRP_CLK, 1);
	} else {
		internal_pwr_rail_ctl(PWR_RAIL_GRP_CLK, 0);
		internal_pwr_rail_mode(PWR_RAIL_GRP_CLK,
					PWR_RAIL_CTL_AUTO);
	}
}

Пример #4

int kgsl_pwrctrl_pwrrail(struct kgsl_device *device, unsigned int pwrflag)
{
	struct kgsl_pwrctrl *pwr = &device->pwrctrl;

	switch (pwrflag) {
	case KGSL_PWRFLAGS_POWER_OFF:
		if (pwr->power_flags & KGSL_PWRFLAGS_POWER_ON) {
			KGSL_DRV_INFO("power off, device %d\n", device->id);
			if (internal_pwr_rail_ctl(pwr->pwr_rail, KGSL_FALSE)) {
				KGSL_DRV_ERR(
					"call internal_pwr_rail_ctl failed\n");
				return KGSL_FAILURE;
			}
			if (pwr->gpu_reg)
				regulator_disable(pwr->gpu_reg);
			pwr->power_flags &=
					~(KGSL_PWRFLAGS_POWER_ON);
			pwr->power_flags |=
					KGSL_PWRFLAGS_POWER_OFF;
		}
		return KGSL_SUCCESS;
	case KGSL_PWRFLAGS_POWER_ON:
		if (pwr->power_flags & KGSL_PWRFLAGS_POWER_OFF) {
			KGSL_DRV_INFO("power on, device %d\n", device->id);
			if (internal_pwr_rail_ctl(pwr->pwr_rail, KGSL_TRUE)) {
				KGSL_DRV_ERR(
					"call internal_pwr_rail_ctl failed\n");
				return KGSL_FAILURE;
			}

			if (pwr->gpu_reg)
				regulator_enable(pwr->gpu_reg);
			pwr->power_flags &=
					~(KGSL_PWRFLAGS_POWER_OFF);
			pwr->power_flags |=
					KGSL_PWRFLAGS_POWER_ON;
		}
		return KGSL_SUCCESS;
	default:
		return KGSL_FAILURE;
	}
}

Пример #5

Файл: kgsl_pwrctrl.c Проект: 12rafael/jellytimekernel

void kgsl_pwrctrl_pwrrail(struct kgsl_device *device, int state)
{
	struct kgsl_pwrctrl *pwr = &device->pwrctrl;

	if (state == KGSL_PWRFLAGS_OFF) {
		if (test_and_clear_bit(KGSL_PWRFLAGS_POWER_ON,
			&pwr->power_flags)) {
			internal_pwr_rail_ctl(pwr->pwr_rail, 0);
			trace_kgsl_rail(device, state);
			if (pwr->gpu_reg)
				regulator_disable(pwr->gpu_reg);
		}
	} else if (state == KGSL_PWRFLAGS_ON) {
		if (!test_and_set_bit(KGSL_PWRFLAGS_POWER_ON,
			&pwr->power_flags)) {
			internal_pwr_rail_ctl(pwr->pwr_rail, 1);
			trace_kgsl_rail(device, state);
			if (pwr->gpu_reg)
				regulator_enable(pwr->gpu_reg);
		}
	}
}

Пример #6

Файл: internal_power_rail.c Проект: 10x-Amin/nAa-kernel

/* Enable or disable a rail if the rail is in auto mode. */
int internal_pwr_rail_ctl_auto(unsigned rail_id, bool enable)
{
	int rc = 0;
	unsigned long flags;
	struct internal_rail *rail = find_rail(rail_id);

	BUG_ON(!rail);

	spin_lock_irqsave(&power_rail_lock, flags);
	if (rail->mode == PWR_RAIL_CTL_AUTO)
		rc = internal_pwr_rail_ctl(rail_id, enable);
	spin_unlock_irqrestore(&power_rail_lock, flags);

	return rc;
}

Пример #7

Файл: vcd_res_tracker.c Проект: Austrie/SpeedDemon-Kernel

static u32 res_trk_disable_pwr_rail(void)
{
	int rc = -1;
	mutex_lock(&resource_context.lock);

	if (resource_context.clock_enabled) {
		mutex_unlock(&resource_context.lock);
		VCDRES_MSG_LOW("\n Calling CLK disable in Power Down\n");
		res_trk_disable_clocks();
		mutex_lock(&resource_context.lock);
	}

	if (!resource_context.rail_enabled) {
		mutex_unlock(&resource_context.lock);
		return false;
	}

	resource_context.rail_enabled = 0;
	rc = clk_reset(resource_context.pclk, CLK_RESET_ASSERT);
	if (rc) {
		VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
		mutex_unlock(&resource_context.lock);
		return false;
	}
	msleep(20);

	rc = internal_pwr_rail_ctl(PWR_RAIL_MFC_CLK, 0);
	if (rc) {
		VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
		mutex_unlock(&resource_context.lock);
		return false;
	}

	clk_put(resource_context.hclk_div2);
	clk_put(resource_context.hclk);
	clk_put(resource_context.pclk);
	mutex_unlock(&resource_context.lock);

	return true;
}

Пример #8

Файл: vcd_res_tracker.c Проект: Austrie/SpeedDemon-Kernel

static u32 res_trk_enable_pwr_rail(void)
{
	mutex_lock(&resource_context.lock);
	if (!resource_context.rail_enabled) {
		int rc = -1;
		rc = internal_pwr_rail_mode(PWR_RAIL_MFC_CLK,
			PWR_RAIL_CTL_MANUAL);
		if (rc) {
			VCDRES_MSG_ERROR("%s(): internal_pwr_rail_mode \
					failed %d\n", __func__, rc);
			mutex_unlock(&resource_context.lock);
			return false;
		}
		VCDRES_MSG_LOW("%s(): internal_pwr_rail_mode Success %d\n",
			__func__, rc);

		resource_context.pclk = clk_get(resource_context.device,
			"mfc_pclk");

		if (IS_ERR(resource_context.pclk)) {
			VCDRES_MSG_ERROR("%s(): mfc_pclk get failed\n"
							 , __func__);

			mutex_unlock(&resource_context.lock);
			return false;
		}

		resource_context.hclk = clk_get(resource_context.device,
			"mfc_clk");

		if (IS_ERR(resource_context.hclk)) {
			VCDRES_MSG_ERROR("%s(): mfc_clk get failed\n"
							 , __func__);

			clk_put(resource_context.pclk);
			mutex_unlock(&resource_context.lock);
			return false;
		}

		resource_context.hclk_div2 =
			clk_get(resource_context.device, "mfc_div2_clk");

		if (IS_ERR(resource_context.pclk)) {
			VCDRES_MSG_ERROR("%s(): mfc_div2_clk get failed\n"
							 , __func__);

			clk_put(resource_context.pclk);
			clk_put(resource_context.hclk);
			mutex_unlock(&resource_context.lock);
			return false;
		}

		rc = internal_pwr_rail_ctl(PWR_RAIL_MFC_CLK, 1);
		if (rc) {
			VCDRES_MSG_ERROR("\n internal_pwr_rail_ctl failed %d\n"
							 , rc);
			mutex_unlock(&resource_context.lock);
			return false;
		}
		VCDRES_MSG_LOW("%s(): internal_pwr_rail_ctl Success %d\n"
					   , __func__, rc);
		msleep(20);

		rc = clk_reset(resource_context.pclk, CLK_RESET_DEASSERT);
		if (rc) {
			VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
			mutex_unlock(&resource_context.lock);
			return false;
		}
		msleep(20);
	}

Пример #9

//static u32 res_trk_disable_pwr_rail(void)
static u32 res_trk_disable_videocore(void)
/* 20110511 Y.Yagami -S vidc: vdec: Generate output done in reconfig. */
{
	int rc = -1;
	mutex_lock(&resource_context.lock);

#ifdef PATCH0330
#else
	if (resource_context.clock_enabled) {
		mutex_unlock(&resource_context.lock);
		VCDRES_MSG_LOW("\n Calling CLK disable in Power Down\n");
		res_trk_disable_clocks();
		mutex_lock(&resource_context.lock);
	}
#endif /* PATCH0330 */

	if (!resource_context.rail_enabled) {
		mutex_unlock(&resource_context.lock);
		return false;
	}

#ifdef PATCH0330
	if (!resource_context.clock_enabled &&
		resource_context.pclk &&
		resource_context.hclk &&
		resource_context.hclk_div2) {

		VCDRES_MSG_LOW("\nEnabling clk before disabling pwr rail\n");
/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//		clk_set_rate(resource_context.hclk,
//			mfc_clk_freq_table[0]);
		if (clk_set_rate(resource_context.hclk,
			mfc_clk_freq_table[0])) {
			VCDRES_MSG_ERROR("\n pwr_rail_disable:"
					" set clk rate failed\n");
			goto bail_out;
		}
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */

		if (clk_enable(resource_context.pclk)) {
			VCDRES_MSG_ERROR("vidc pclk Enable failed\n");
			goto bail_out;
		}

		if (clk_enable(resource_context.hclk)) {
			VCDRES_MSG_ERROR("vidc hclk Enable failed\n");
			goto disable_pclk;
		}

		if (clk_enable(resource_context.hclk_div2)) {
			VCDRES_MSG_ERROR("vidc hclk_div2 Enable failed\n");
			goto disable_hclk;
		}
	} else {
		VCDRES_MSG_ERROR("\ndisabling pwr rail: Enabling clk failed\n");
		goto bail_out;
	}
#endif /* PATCH0330 */

	resource_context.rail_enabled = 0;
	rc = clk_reset(resource_context.pclk, CLK_RESET_ASSERT);
	if (rc) {
		VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
		mutex_unlock(&resource_context.lock);
		return false;
	}
	msleep(20);

	rc = internal_pwr_rail_ctl(PWR_RAIL_MFC_CLK, 0);
	if (rc) {
		VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
		mutex_unlock(&resource_context.lock);
		return false;
	}

#ifdef PATCH0330
	clk_disable(resource_context.pclk);
	clk_disable(resource_context.hclk);
	clk_disable(resource_context.hclk_div2);
#endif /* PATCH0330 */

	clk_put(resource_context.hclk_div2);
	clk_put(resource_context.hclk);
	clk_put(resource_context.pclk);

#ifdef PATCH0330
	resource_context.hclk_div2 = NULL;
	resource_context.hclk = NULL;
	resource_context.pclk = NULL;
#endif /* PATCH0330 */

	mutex_unlock(&resource_context.lock);

	return true;


#ifdef PATCH0330
disable_hclk:
	clk_disable(resource_context.hclk);
disable_pclk:
	clk_disable(resource_context.pclk);
bail_out:
	if (resource_context.pclk) {
		clk_put(resource_context.pclk);
		resource_context.pclk = NULL;
	}
	if (resource_context.hclk) {
		clk_put(resource_context.hclk);
		resource_context.hclk = NULL;
	}
	if (resource_context.hclk_div2) {
		clk_put(resource_context.hclk_div2);
		resource_context.hclk_div2 = NULL;
	}
	mutex_unlock(&resource_context.lock);
	return false;
#endif /* PATCH0330 */
}

Пример #10

//static u32 res_trk_enable_pwr_rail(void)
static u32 res_trk_enable_videocore(void)
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
{
	mutex_lock(&resource_context.lock);
	if (!resource_context.rail_enabled) {
		int rc = -1;
		rc = internal_pwr_rail_mode(PWR_RAIL_MFC_CLK,
			PWR_RAIL_CTL_MANUAL);
		if (rc) {
			VCDRES_MSG_ERROR("%s(): internal_pwr_rail_mode \
					failed %d\n", __func__, rc);
			mutex_unlock(&resource_context.lock);
			return false;
		}
		VCDRES_MSG_LOW("%s(): internal_pwr_rail_mode Success %d\n",
			__func__, rc);

		resource_context.pclk = clk_get(resource_context.device,
			"mfc_pclk");

		if (IS_ERR(resource_context.pclk)) {
			VCDRES_MSG_ERROR("%s(): mfc_pclk get failed\n"
							 , __func__);

/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//			mutex_unlock(&resource_context.lock);
//			return false;
			goto bail_out;
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
		}

		resource_context.hclk = clk_get(resource_context.device,
			"mfc_clk");

		if (IS_ERR(resource_context.hclk)) {
			VCDRES_MSG_ERROR("%s(): mfc_clk get failed\n"
							 , __func__);

/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//			clk_put(resource_context.pclk);
//			mutex_unlock(&resource_context.lock);
//			return false;
			goto release_pclk;
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
		}

		resource_context.hclk_div2 =
			clk_get(resource_context.device, "mfc_div2_clk");

/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//		if (IS_ERR(resource_context.pclk)) {
		if (IS_ERR(resource_context.hclk_div2)) {
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
			VCDRES_MSG_ERROR("%s(): mfc_div2_clk get failed\n"
							 , __func__);

/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//			clk_put(resource_context.pclk);
//			clk_put(resource_context.hclk);
//			mutex_unlock(&resource_context.lock);
//			return false;
			goto release_hclk_pclk;
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
		}

#ifdef PATCH0330
/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//		clk_set_rate(resource_context.hclk,
//			mfc_clk_freq_table[0]);
//
//		clk_enable(resource_context.pclk);
//		clk_enable(resource_context.hclk);
//		clk_enable(resource_context.hclk_div2);
		if (clk_set_rate(resource_context.hclk,
			mfc_clk_freq_table[0])) {
			VCDRES_MSG_ERROR("\n pwr_rail_enable:"
				" set clk rate failed\n");
			goto release_all_clks;
		}
		
		if (clk_enable(resource_context.pclk)) {
			VCDRES_MSG_ERROR("vidc pclk Enable failed\n");
			goto release_all_clks;
		}
		
		if (clk_enable(resource_context.hclk)) {
			VCDRES_MSG_ERROR("vidc hclk Enable failed\n");
			goto disable_pclk;
		}
		
		if (clk_enable(resource_context.hclk_div2)) {
			VCDRES_MSG_ERROR("vidc hclk_div2 Enable failed\n");
			goto disable_hclk_pclk;
		}
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
#endif /* PATCH0330 */

		rc = internal_pwr_rail_ctl(PWR_RAIL_MFC_CLK, 1);
		if (rc) {
			VCDRES_MSG_ERROR("\n internal_pwr_rail_ctl failed %d\n"
							 , rc);
/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//			mutex_unlock(&resource_context.lock);
//			return false;
			goto disable_and_release_all_clks;
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
		}
		VCDRES_MSG_LOW("%s(): internal_pwr_rail_ctl Success %d\n"
					   , __func__, rc);
		msleep(20);

		rc = clk_reset(resource_context.pclk, CLK_RESET_DEASSERT);
		if (rc) {
			VCDRES_MSG_ERROR("\n clk_reset failed %d\n", rc);
/* 20110511 Y.Yagami CHG-S msm: vidc: Fix video core clock power up/down sequence */
//			mutex_unlock(&resource_context.lock);
//			return false;
			goto disable_and_release_all_clks;
/* 20110511 Y.Yagami CHG-E msm: vidc: Fix video core clock power up/down sequence */
		}
		msleep(20);

#ifdef PATCH0330
		clk_disable(resource_context.pclk);
		clk_disable(resource_context.hclk);
		clk_disable(resource_context.hclk_div2);
#endif /* PATCH0330 */

	}