/*---------------------------------------------------------------------------*/
int
main(void)
{
/* Hardware initialization */
bus_init();//ʱÖÓ³õʼ»¯
rtimer_init();//¼ÆʱÆ÷³õʼ»¯
/* model-specific h/w init. */
io_port_init();
/* Init LEDs here */
leds_init();//LED³õʼ»¯
/*LEDS_GREEN indicate LEDs Init finished*/
fade(LEDS_GREEN);
/* initialize process manager. */
process_init();//½ø³Ì¹ÜÀí³õʼ»¯
/* Init UART0
* Based on the EJOY MCU CC2430 Circuit Design
* */
uart0_init();//UART0´®¿Ú³õʼ»¯
#if DMA_ON
dma_init();//DMA³õʼ»¯
#endif
#if SLIP_ARCH_CONF_ENABLE
/* On cc2430, the argument is not used */
slip_arch_init(0);//SLIP³õʼ»¯
#else
uart1_set_input(serial_line_input_byte);
serial_line_init();
#endif
PUTSTRING("##########################################\n");
putstring(CONTIKI_VERSION_STRING "\n");
// putstring(SENSINODE_MODEL " (CC24");
puthex(((CHIPID >> 3) | 0x20));
putstring("-" FLASH_SIZE ")\n");
#if STARTUP_VERBOSE
#ifdef HAVE_SDCC_BANKING
PUTSTRING(" With Banking.\n");
#endif /* HAVE_SDCC_BANKING */
#ifdef SDCC_MODEL_LARGE
PUTSTRING(" --model-large\n");
#endif /* SDCC_MODEL_LARGE */
#ifdef SDCC_MODEL_HUGE
PUTSTRING(" --model-huge\n");
#endif /* SDCC_MODEL_HUGE */
#ifdef SDCC_STACK_AUTO
PUTSTRING(" --stack-auto\n");
#endif /* SDCC_STACK_AUTO */
PUTCHAR('\n');
PUTSTRING(" Net: ");
PUTSTRING(NETSTACK_NETWORK.name);
PUTCHAR('\n');
PUTSTRING(" MAC: ");
PUTSTRING(NETSTACK_MAC.name);
PUTCHAR('\n');
PUTSTRING(" RDC: ");
PUTSTRING(NETSTACK_RDC.name);
PUTCHAR('\n');
PUTSTRING("##########################################\n");
#endif
watchdog_init();//¿´ÃŹ·³õʼ»¯
/* Initialise the cc2430 RNG engine. */
random_init(0);//Ëæ»úÊýÉú³ÉÆ÷³õʼ»¯
/* start services */
process_start(&etimer_process, NULL);//
ctimer_init();//ctimer³õʼ»¯
/* initialize the netstack */
netstack_init();//ÍøÂçµ×²ãÕ»³õʼ»¯
set_rime_addr();//rimeµØÖ·ÉèÖÃ
//there is no sensor for us maintenance
#if BUTTON_SENSOR_ON || ADC_SENSOR_ON
process_start(&sensors_process, NULL);
sensinode_sensors_activate();
#endif
//IPV6,YES!
#if UIP_CONF_IPV6
memcpy(&uip_lladdr.addr, &rimeaddr_node_addr, sizeof(uip_lladdr.addr));
queuebuf_init();
process_start(&tcpip_process, NULL);
//DISCO
#if DISCO_ENABLED
process_start(&disco_process, NULL);
#endif /* DISCO_ENABLED */
//VIZTOOL
#if VIZTOOL_CONF_ON
process_start(&viztool_process, NULL);
#endif
#if (!UIP_CONF_IPV6_RPL)
{
uip_ipaddr_t ipaddr;
uip_ip6addr(&ipaddr, 0x2001, 0x630, 0x301, 0x6453, 0, 0, 0, 0);
uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr);
uip_ds6_addr_add(&ipaddr, 0, ADDR_TENTATIVE);
}
#endif /* UIP_CONF_IPV6_RPL */
#endif /* UIP_CONF_IPV6 */
/*
* Acknowledge the UART1 RX interrupt
* now that we're sure we are ready to process it
*
* We don't need it. by MW
*/
// model_uart_intr_en();
energest_init();
ENERGEST_ON(ENERGEST_TYPE_CPU);
fade(LEDS_RED);
#if BATMON_CONF_ON
process_start(&batmon_process, NULL);
#endif
autostart_start(autostart_processes);
watchdog_start();
while(1) {
do {
/* Reset watchdog and handle polls and events */
watchdog_periodic();
/**/
#if !CLOCK_CONF_ACCURATE
if(sleep_flag) {
if(etimer_pending() &&
(etimer_next_expiration_time() - count - 1) > MAX_TICKS) { /*core/sys/etimer.c*/
etimer_request_poll();
}
sleep_flag = 0;
}
#endif
r = process_run();
} while(r > 0);
#if SHORTCUTS_CONF_NETSTACK
len = NETSTACK_RADIO.pending_packet();
if(len) {
packetbuf_clear();
len = NETSTACK_RADIO.read(packetbuf_dataptr(), PACKETBUF_SIZE);
if(len > 0) {
packetbuf_set_datalen(len);
NETSTACK_RDC.input();
}
}
#endif
#if LPM_MODE
#if (LPM_MODE==LPM_MODE_PM2)
SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEP & HFRC_STB)); /* Wait for RCOSC to be stable */
CLKCON |= OSC; /* Switch to the RCOSC */
while(!(CLKCON & OSC)); /* Wait till it's happened */
SLEEP |= OSC_PD; /* Turn the other one off */
#endif /* LPM_MODE==LPM_MODE_PM2 */
/*
* Set MCU IDLE or Drop to PM1. Any interrupt will take us out of LPM
* Sleep Timer will wake us up in no more than 7.8ms (max idle interval)
*/
SLEEP = (SLEEP & 0xFC) | (LPM_MODE - 1);
#if (LPM_MODE==LPM_MODE_PM2)
/*
* Wait 3 NOPs. Either an interrupt occurred and SLEEP.MODE was cleared or
* no interrupt occurred and we can safely power down
*/
__asm
nop
nop
nop
__endasm;
if (SLEEP & SLEEP_MODE0) {
#endif /* LPM_MODE==LPM_MODE_PM2 */
ENERGEST_OFF(ENERGEST_TYPE_CPU);
ENERGEST_ON(ENERGEST_TYPE_LPM);
/* We are only interested in IRQ energest while idle or in LPM */
ENERGEST_IRQ_RESTORE(irq_energest);
/* Go IDLE or Enter PM1 */
PCON |= IDLE;
/* First instruction upon exiting PM1 must be a NOP */
__asm
nop
__endasm;
/* Remember energest IRQ for next pass */
ENERGEST_IRQ_SAVE(irq_energest);
ENERGEST_ON(ENERGEST_TYPE_CPU);
ENERGEST_OFF(ENERGEST_TYPE_LPM);
#if (LPM_MODE==LPM_MODE_PM2)
SLEEP &= ~OSC_PD; /* Make sure both HS OSCs are on */
while(!(SLEEP & XOSC_STB)); /* Wait for XOSC to be stable */
CLKCON &= ~OSC; /* Switch to the XOSC */
/*
* On occasion the XOSC is reported stable when in reality it's not.
* We need to wait for a safeguard of 64us or more before selecting it
*/
clock_delay(10);
while(CLKCON & OSC); /* Wait till it's happened */
}
#endif /* LPM_MODE==LPM_MODE_PM2 */
#endif /* LPM_MODE */
}
}
void __init
setup_arch (char **cmdline_p)
{
unw_init();
ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
*cmdline_p = __va(ia64_boot_param->command_line);
strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
efi_init();
io_port_init();
#ifdef CONFIG_IA64_GENERIC
machvec_init(acpi_get_sysname());
#endif
if (early_console_setup(*cmdline_p) == 0)
mark_bsp_online();
#ifdef CONFIG_ACPI_BOOT
/* Initialize the ACPI boot-time table parser */
acpi_table_init();
# ifdef CONFIG_ACPI_NUMA
acpi_numa_init();
# endif
#else
# ifdef CONFIG_SMP
smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
# endif
#endif /* CONFIG_APCI_BOOT */
find_memory();
/* process SAL system table: */
ia64_sal_init(efi.sal_systab);
#ifdef CONFIG_SMP
cpu_physical_id(0) = hard_smp_processor_id();
#endif
cpu_init(); /* initialize the bootstrap CPU */
#ifdef CONFIG_ACPI_BOOT
acpi_boot_init();
#endif
#ifdef CONFIG_VT
if (!conswitchp) {
# if defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
# endif
# if defined(CONFIG_VGA_CONSOLE)
/*
* Non-legacy systems may route legacy VGA MMIO range to system
* memory. vga_con probes the MMIO hole, so memory looks like
* a VGA device to it. The EFI memory map can tell us if it's
* memory so we can avoid this problem.
*/
if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
conswitchp = &vga_con;
# endif
}
#endif
/* enable IA-64 Machine Check Abort Handling unless disabled */
if (!strstr(saved_command_line, "nomca"))
ia64_mca_init();
platform_setup(cmdline_p);
paging_init();
}
void __init
setup_arch (char **cmdline_p)
{
unw_init();
ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
*cmdline_p = __va(ia64_boot_param->command_line);
strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
efi_init();
io_port_init();
parse_early_param();
#ifdef CONFIG_IA64_GENERIC
machvec_init(NULL);
#endif
if (early_console_setup(*cmdline_p) == 0)
mark_bsp_online();
#ifdef CONFIG_ACPI
/* Initialize the ACPI boot-time table parser */
acpi_table_init();
# ifdef CONFIG_ACPI_NUMA
acpi_numa_init();
# endif
#else
# ifdef CONFIG_SMP
smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
# endif
#endif /* CONFIG_APCI_BOOT */
find_memory();
/* process SAL system table: */
ia64_sal_init(__va(efi.sal_systab));
ia64_setup_printk_clock();
#ifdef CONFIG_SMP
cpu_physical_id(0) = hard_smp_processor_id();
cpu_set(0, cpu_sibling_map[0]);
cpu_set(0, cpu_core_map[0]);
check_for_logical_procs();
if (smp_num_cpucores > 1)
printk(KERN_INFO
"cpu package is Multi-Core capable: number of cores=%d\n",
smp_num_cpucores);
if (smp_num_siblings > 1)
printk(KERN_INFO
"cpu package is Multi-Threading capable: number of siblings=%d\n",
smp_num_siblings);
#endif
cpu_init(); /* initialize the bootstrap CPU */
mmu_context_init(); /* initialize context_id bitmap */
#ifdef CONFIG_ACPI
acpi_boot_init();
#endif
#ifdef CONFIG_VT
if (!conswitchp) {
# if defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
# endif
# if defined(CONFIG_VGA_CONSOLE)
/*
* Non-legacy systems may route legacy VGA MMIO range to system
* memory. vga_con probes the MMIO hole, so memory looks like
* a VGA device to it. The EFI memory map can tell us if it's
* memory so we can avoid this problem.
*/
if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
conswitchp = &vga_con;
# endif
}
#endif
/* enable IA-64 Machine Check Abort Handling unless disabled */
if (!nomca)
ia64_mca_init();
platform_setup(cmdline_p);
paging_init();
}
