static void do_egpio(int argc,char *argv[]) { struct option_info opts[2]; bool set_bits_set, clr_bits_set; int set_bits, clr_bits; init_opts(&opts[0], 's', true, OPTION_ARG_TYPE_NUM, (void **)&set_bits, (bool *)&set_bits_set, "bits to set"); init_opts(&opts[1], 'c', true, OPTION_ARG_TYPE_NUM, (void **)&clr_bits, (bool *)&clr_bits_set, "bits to clear"); if (!scan_opts(argc, argv, 1, opts, 2, NULL, 0, NULL)) return; if ( !set_bits_set && !clr_bits_set ) { // display only diag_printf(" egpio = 0x%04X\n", (int)(_ipaq_EGPIO & 0xffff)); return; } diag_printf( " egpio 0x%04X, ", (int)(_ipaq_EGPIO & 0xffff)); if ( set_bits_set ) { diag_printf("set(0x%08X) ",set_bits); ipaq_EGPIO( set_bits, set_bits ); } if ( clr_bits_set ) { diag_printf("clear(0x%08X) ",clr_bits); ipaq_EGPIO( clr_bits, 0x0000 ); } diag_printf( "gives 0x%04X\n", (int)(_ipaq_EGPIO & 0xffff)); }
// // Fill in the details of a PCMCIA slot and initialize the device // void cf_hwr_init(struct cf_slot *slot) { static int int_init = 0; unsigned long new_state = *SA11X0_GPIO_PIN_LEVEL; if (!int_init) { int_init = 1; #ifdef CYGPKG_KERNEL // Set up interrupts cyg_drv_interrupt_create(SA1110_CF_DETECT, 99, // Priority - what goes here? (cyg_addrword_t) slot, // Data item passed to interrupt handler (cyg_ISR_t *)cf_detect_isr, (cyg_DSR_t *)cf_detect_dsr, &cf_detect_interrupt_handle, &cf_detect_interrupt); cyg_drv_interrupt_attach(cf_detect_interrupt_handle); cyg_drv_interrupt_configure(SA1110_CF_DETECT, true, true); // Detect either edge cyg_drv_interrupt_acknowledge(SA1110_CF_DETECT); cyg_drv_interrupt_unmask(SA1110_CF_DETECT); cyg_drv_interrupt_create(SA1110_CF_IRQ, 99, // Priority - what goes here? (cyg_addrword_t) slot, // Data item passed to interrupt handler (cyg_ISR_t *)cf_irq_isr, (cyg_DSR_t *)cf_irq_dsr, &cf_irq_interrupt_handle, &cf_irq_interrupt); cyg_drv_interrupt_attach(cf_irq_interrupt_handle); cyg_drv_interrupt_unmask(SA1110_CF_IRQ); cyg_drv_interrupt_configure(SA1110_CF_IRQ, false, false); // Falling edge cyg_drv_interrupt_acknowledge(SA1110_CF_IRQ); #endif } slot->attr = (unsigned char *)0x28000000; slot->attr_length = 0x200; slot->io = (unsigned char *)0x20000000; slot->io_length = 0x04000000; slot->mem = (unsigned char *)0x2C000000; slot->mem_length = 0x04000000; slot->int_num = SA1110_CF_IRQ; #ifdef CYG_HAL_STARTUP_ROM // Disable CF bus & power (idle/off) ipaq_EGPIO( SA1110_EIO_OPT_PWR | SA1110_EIO_OPT | SA1110_EIO_CF_RESET, SA1110_EIO_OPT_PWR_ON | SA1110_EIO_OPT_ON | SA1110_EIO_CF_RESET_ENABLE ); #endif if ((new_state & SA1110_GPIO_CF_DETECT) == SA1110_GPIO_CF_PRESENT) { if ((_ipaq_EGPIO & SA1110_EIO_OPT_PWR) == SA1110_EIO_OPT_PWR_ON) { // Assume that the ROM environment has turned the bus on slot->state = CF_SLOT_STATE_Ready; } else { slot->state = CF_SLOT_STATE_Inserted; } } else { slot->state = CF_SLOT_STATE_Empty; } }
// // Transition the card/slot to a new state // note: currently only supports transitions to Ready, Empty // void cf_hwr_change_state(struct cf_slot *slot, int new_state) { int i, ptr, len; unsigned char buf[256]; if (new_state == CF_SLOT_STATE_Ready) { if (slot->state == CF_SLOT_STATE_Inserted) { ipaq_EGPIO( SA1110_EIO_OPT_PWR | SA1110_EIO_OPT | SA1110_EIO_CF_RESET, SA1110_EIO_OPT_PWR_ON | SA1110_EIO_OPT_ON | SA1110_EIO_CF_RESET_DISABLE); do_delay(30); // At least 300 ms slot->state = CF_SLOT_STATE_Powered; ipaq_EGPIO( SA1110_EIO_CF_RESET, SA1110_EIO_CF_RESET_ENABLE); *(volatile unsigned short *)IPAQ_CF_CTRL = IPAQ_CF_CTRL_V5_DISABLE | IPAQ_CF_CTRL_V3_ENABLE | IPAQ_CF_CTRL_RESET_ENABLE | IPAQ_CF_CTRL_APOE_ENABLE | IPAQ_CF_CTRL_SOE_ENABLE; do_delay(1); // At least 10 us slot->state = CF_SLOT_STATE_Reset; ipaq_EGPIO( SA1110_EIO_CF_RESET, SA1110_EIO_CF_RESET_DISABLE); do_delay(5); // At least 20 ms // This is necessary for the two slot sleeve and doesn't seem to // hurt on the single slot versions. Note: only 3.3V is ever used! *(volatile unsigned short *)IPAQ_CF_CTRL = IPAQ_CF_CTRL_V5_DISABLE | IPAQ_CF_CTRL_V3_ENABLE | IPAQ_CF_CTRL_RESET_DISABLE | IPAQ_CF_CTRL_APOE_ENABLE | IPAQ_CF_CTRL_SOE_ENABLE; do_delay(5); // At least 20 ms // Wait until the card is ready to talk for (i = 0; i < 10; i++) { ptr = 0; if (cf_get_CIS(slot, CF_CISTPL_VERS_1, buf, &len, &ptr)) { slot->state = CF_SLOT_STATE_Ready; break; } do_delay(10); } } } }
void ipaq_flash_disable(void *start, void *end) { ipaq_EGPIO(SA1110_EIO_VPP, SA1110_EIO_VPP_OFF); }
void ipaq_flash_enable(void *start, void *end) { ipaq_EGPIO(SA1110_EIO_VPP, SA1110_EIO_VPP_ON); }