// generate_solved_board - generates a completed board
void generate_solved_board() {
srand(time(NULL));
int i, x, y;
// Choose a random block
int x_block_offset = 3 * (rand() % 3);
int y_block_offset = 3 * (rand() % 3);
// choose a random row that intersects the block
int x_offset = rand() % 3;
// choose a random column that intersects the block
int y_offset = rand() % 3;
// Fill block randomly with digits 1-9
for (i = 0; i < BOARD_SIZE; i++) {
do { // Fill upper left block with random 1-9 digits
x = rand() % 3 + x_block_offset;
y = rand() % 3 + y_block_offset;
} while (board[y][x] != ' ');
board[y][x] = '0' + i + 1;
}
// Fill row with numbers not in first block
for (i = 0; i < BOARD_SIZE; i++) {
if (!is_in_row(y_block_offset + y_offset, i + 1 + '0')) {
do {
x = rand() % 9;
} while (board[y_block_offset + y_offset][x] != ' ');
board[y_block_offset + y_offset][x] = '0' + i + 1;
}
}
// Fill column with numbers not in first block
for (i = 0; i < BOARD_SIZE; i++) {
if (!is_in_col(x_block_offset + x_offset, i + 1 + '0')) {
do {
y = rand() % 9;
} while (board[y][x_block_offset + x_offset] != ' ');
board[y][x_block_offset + x_offset] = '0' + i + 1;
}
}
// Start backtracking to finish filling the board
backtrack(0, 0);
}
// is_legal - determines if move is legal (not in row, column or quadrant)
int is_legal(int row, int col, char num) {
return !(is_in_col(col, num) ||
is_in_row(row, num) ||
in_quadrant(row, col, num));
}
int init_ports(struct fpga_model* model, int dup_warn)
{
int x, y, i, j, k, row_num, row_pos, rc;
// inner and outer IO tiles (ILOGIC/ILOGIC/IODELAY)
for (x = LEFT_SIDE_WIDTH; x < model->x_width - RIGHT_SIDE_WIDTH; x++) {
if (has_device(model, TOP_OUTER_IO, x, DEV_ILOGIC)) {
rc = init_iologic_ports(model, TOP_OUTER_IO, x, TOP_S, dup_warn);
if (rc) goto xout;
}
if (has_device(model, TOP_INNER_IO, x, DEV_ILOGIC)) {
rc = init_iologic_ports(model, TOP_INNER_IO, x, TOP_S, dup_warn);
if (rc) goto xout;
}
if (has_device(model, model->y_height - BOT_INNER_IO, x, DEV_ILOGIC)) {
rc = init_iologic_ports(model, model->y_height - BOT_INNER_IO, x, BOTTOM_S, dup_warn);
if (rc) goto xout;
}
if (has_device(model, model->y_height - BOT_OUTER_IO, x, DEV_ILOGIC)) {
rc = init_iologic_ports(model, model->y_height - BOT_OUTER_IO, x, BOTTOM_S, dup_warn);
if (rc) goto xout;
}
}
for (y = TOP_IO_TILES; y < model->y_height - BOT_IO_TILES; y++) {
if (has_device(model, y, LEFT_IO_DEVS, DEV_ILOGIC)) {
rc = init_iologic_ports(model, y, LEFT_IO_DEVS, LEFT_S, dup_warn);
if (rc) goto xout;
}
if (has_device(model, y, model->x_width - RIGHT_IO_DEVS_O, DEV_ILOGIC)) {
rc = init_iologic_ports(model, y, model->x_width - RIGHT_IO_DEVS_O, RIGHT_S, dup_warn);
if (rc) goto xout;
}
}
for (x = 0; x < model->x_width; x++) {
// VCC, GND and fans
if (is_atx(X_ROUTING_COL, model, x)) {
for (y = TOP_IO_TILES; y < model->y_height - BOT_IO_TILES; y++) {
if (is_aty(Y_ROW_HORIZ_AXSYMM|Y_CHIP_HORIZ_REGS,
model, y))
continue;
rc = add_connpt_name(model, y, x, "VCC_WIRE",
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, "GND_WIRE",
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, "KEEP1_WIRE",
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, "FAN",
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, "FAN_B",
dup_warn, 0, 0);
if (rc) goto xout;
if (!is_atyx(YX_IO_ROUTING, model, y, x)) {
for (i = 0; i <= 1; i++) {
rc = add_connpt_name(model, y, x, pf("GFAN%i", i),
dup_warn, 0, 0);
if (rc) goto xout;
}
} else {
if (!is_atx(X_CENTER_ROUTING_COL, model, x)
|| is_aty(Y_TOPBOT_IO_RANGE, model, y)) {
// In the center those 2 wires are connected
// to the PLL, but elsewhere? Not clear what they
// connect to...
rc = add_connpt_name(model, y, x,
logicin_s(X_A5, 1 /* routing_io */),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x,
logicin_s(X_B4, 1 /* routing_io */),
dup_warn, 0, 0);
if (rc) goto xout;
}
}
}
}
// logicin
if (is_atx(X_FABRIC_LOGIC_XL_ROUTING_COL
|X_CENTER_ROUTING_COL, model, x)) {
for (y = TOP_IO_TILES; y < model->y_height - BOT_IO_TILES; y++) {
static const int n[] = { 36, 44, 53, 61, 62 };
if (is_aty(Y_TOPBOT_IO_RANGE, model, y)
&& !is_atx(X_ROUTING_NO_IO, model, x))
continue;
if (is_aty(Y_ROW_HORIZ_AXSYMM|Y_CHIP_HORIZ_REGS,
model, y))
continue;
if (is_atx(X_CENTER_ROUTING_COL, model, x)
&& (is_aty(Y_ROW_HORIZ_AXSYMM|Y_CHIP_HORIZ_REGS,
model, y+1)
|| is_aty(Y_ROW_HORIZ_AXSYMM, model, y-1)))
continue;
for (i = 0; i < sizeof(n)/sizeof(*n); i++) {
rc = add_connpt_name(model, y, x,
pf("LOGICIN_B%i", n[i]), dup_warn, 0, 0);
if (rc) goto xout;
}
}
}
// bram
if (is_atx(X_FABRIC_BRAM_COL, model, x)) {
for (y = TOP_IO_TILES; y < model->y_height - BOT_IO_TILES; y++) {
if (YX_TILE(model, y, x)->flags & TF_BRAM_DEV) {
static const char* pass_str[3] = {"RAMB16BWER", "RAMB8BWER_0", "RAMB8BWER_1"};
// pass 0 is ramb16, pass 1 and 2 are for ramb8
for (i = 0; i <= 2; i++) {
for (j = 'A'; j <= 'B'; j++) {
rc = add_connpt_name(model, y, x, pf("%s_CLK%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_EN%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_REGCE%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_RST%c", pass_str[i], j),
dup_warn, 0, 0);
if (rc) goto xout;
for (k = 0; k <= (!i ? 3 : 1); k++) {
rc = add_connpt_name(model, y, x, pf("%s_DIP%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_DOP%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_WE%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout;
}
for (k = 0; k <= (!i ? 13 : 12); k++) {
rc = add_connpt_name(model, y, x, pf("%s_ADDR%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout;
}
for (k = 0; k <= (!i ? 31 : 15); k++) {
rc = add_connpt_name(model, y, x, pf("%s_DI%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("%s_DO%c%i", pass_str[i], j, k),
dup_warn, 0, 0);
if (rc) goto xout;
}
}
}
}
}
}
// macc
if (is_atx(X_FABRIC_MACC_COL, model, x)) {
for (y = TOP_IO_TILES; y < model->y_height - BOT_IO_TILES; y++) {
if (YX_TILE(model, y, x)->flags & TF_MACC_DEV) {
static const char* pref[] = {"CE", "RST", ""};
static const char* seq[] = {"A", "B", "C", "D", "M", "P", "OPMODE", ""};
is_in_row(model, y, &row_num, &row_pos);
if (!row_num && row_pos == LAST_POS_IN_ROW) {
rc = add_connpt_name(model, y, x, "CARRYIN_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout;
for (i = 0; i <= 47; i++) {
rc = add_connpt_name(model, y, x, pf("PCIN%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
}
}
rc = add_connpt_name(model, y, x, "CLK_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, "CARRYOUT_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, "CARRYOUTF_DSP48A1_SITE",
dup_warn, 0, 0);
if (rc) goto xout;
for (i = 0; pref[i][0]; i++) {
rc = add_connpt_name(model, y, x, pf("%sCARRYIN_DSP48A1_SITE", pref[i]),
dup_warn, 0, 0);
if (rc) goto xout;
for (j = 0; seq[j][0]; j++) {
rc = add_connpt_name(model, y, x, pf("%s%s_DSP48A1_SITE", pref[i], seq[j]),
dup_warn, 0, 0);
if (rc) goto xout;
}
}
for (i = 0; i <= 17; i++) {
rc = add_connpt_name(model, y, x, pf("A%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("B%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("D%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("BCOUT%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
}
for (i = 0; i <= 47; i++) {
rc = add_connpt_name(model, y, x, pf("C%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("P%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
rc = add_connpt_name(model, y, x, pf("PCOUT%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
}
for (i = 0; i <= 35; i++) {
rc = add_connpt_name(model, y, x, pf("M%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
}
for (i = 0; i <= 7; i++) {
rc = add_connpt_name(model, y, x, pf("OPMODE%i_DSP48A1_SITE", i),
dup_warn, 0, 0);
if (rc) goto xout;
}
}
}
}
}
return 0;
xout:
return rc;
}
