static void draw_udp_in_scope(ivl_net_logic_t lptr)
{
unsigned pdx;
ivl_udp_t udp = ivl_logic_udp(lptr);
static ivl_udp_t *udps = 0x0;
static int nudps = 0;
int i;
for (i=0; i<nudps; i++)
if (udps[i] == udp)
break;
if (i >= nudps)
{
udps = realloc(udps, (nudps+1)*sizeof(ivl_udp_t));
assert(udps);
udps[nudps++] = udp;
draw_udp_def(udp);
}
fprintf(vvp_out, "L_%p .udp", lptr);
fprintf(vvp_out, " UDP_%s",
vvp_mangle_id(ivl_udp_name(udp)));
draw_delay(lptr);
for (pdx = 1 ; pdx < ivl_logic_pins(lptr) ; pdx += 1) {
ivl_nexus_t nex = ivl_logic_pin(lptr, pdx);
/* Unlike other logic gates, primitives may have unconnected
inputs. The proper behavior is to attach a HiZ to the
port. */
if (nex == 0) {
assert(ivl_logic_width(lptr) == 1);
fprintf(vvp_out, ", C4<z>");
} else {
fprintf(vvp_out, ", %s", draw_net_input(nex));
}
}
fprintf(vvp_out, ";\n");
}
/*
* All logic gates have inputs and outputs that match exactly in
* width. For example, and AND gate with 4 bit inputs generates a 4
* bit output, and all the inputs are 4 bits.
*/
static void show_logic(ivl_net_logic_t net)
{
unsigned npins, idx;
const char*name = ivl_logic_basename(net);
ivl_drive_t drive0 = ivl_logic_drive0(net);
ivl_drive_t drive1 = ivl_logic_drive1(net);
switch (ivl_logic_type(net)) {
case IVL_LO_AND:
fprintf(out, " and %s", name);
break;
case IVL_LO_BUF:
fprintf(out, " buf %s", name);
break;
case IVL_LO_BUFIF0:
fprintf(out, " bufif0 %s", name);
break;
case IVL_LO_BUFIF1:
fprintf(out, " bufif1 %s", name);
break;
case IVL_LO_BUFT:
fprintf(out, " buft %s", name);
break;
case IVL_LO_BUFZ:
fprintf(out, " bufz %s", name);
break;
case IVL_LO_CMOS:
fprintf(out, " cmos %s", name);
break;
case IVL_LO_NAND:
fprintf(out, " nand %s", name);
break;
case IVL_LO_NMOS:
fprintf(out, " nmos %s", name);
break;
case IVL_LO_NOR:
fprintf(out, " nor %s", name);
break;
case IVL_LO_NOT:
fprintf(out, " not %s", name);
break;
case IVL_LO_NOTIF0:
fprintf(out, " notif0 %s", name);
break;
case IVL_LO_NOTIF1:
fprintf(out, " notif1 %s", name);
break;
case IVL_LO_OR:
fprintf(out, " or %s", name);
break;
case IVL_LO_PMOS:
fprintf(out, " pmos %s", name);
break;
case IVL_LO_PULLDOWN:
fprintf(out, " pulldown %s", name);
break;
case IVL_LO_PULLUP:
fprintf(out, " pullup %s", name);
break;
case IVL_LO_RCMOS:
fprintf(out, " rcmos %s", name);
break;
case IVL_LO_RNMOS:
fprintf(out, " rnmos %s", name);
break;
case IVL_LO_RPMOS:
fprintf(out, " rpmos %s", name);
break;
case IVL_LO_XNOR:
fprintf(out, " xnor %s", name);
break;
case IVL_LO_XOR:
fprintf(out, " xor %s", name);
break;
case IVL_LO_UDP:
fprintf(out, " primitive<%s> %s",
ivl_udp_name(ivl_logic_udp(net)), name);
break;
default:
fprintf(out, " unsupported gate<type=%d> %s", ivl_logic_type(net), name);
break;
}
fprintf(out, " <width=%u>\n", ivl_logic_width(net));
fprintf(out, " <Delays...>\n");
if (ivl_logic_delay(net,0)) {
test_expr_is_delay(ivl_logic_delay(net,0));
show_expression(ivl_logic_delay(net,0), 6);
}
if (ivl_logic_delay(net,1)) {
test_expr_is_delay(ivl_logic_delay(net,1));
show_expression(ivl_logic_delay(net,1), 6);
}
if (ivl_logic_delay(net,2)) {
test_expr_is_delay(ivl_logic_delay(net,2));
show_expression(ivl_logic_delay(net,2), 6);
}
npins = ivl_logic_pins(net);
/* Show the pins of the gate. Pin-0 is always the output, and
the remaining pins are the inputs. Inputs may be
unconnected, but if connected the nexus width must exactly
match the gate width. */
for (idx = 0 ; idx < npins ; idx += 1) {
ivl_nexus_t nex = ivl_logic_pin(net, idx);
fprintf(out, " %d: %p", idx, nex);
if (idx == 0)
fprintf(out, " <drive0/1 = %u/%u>", drive0, drive1);
fprintf(out, "\n");
if (nex == 0) {
if (idx == 0) {
fprintf(out, " 0: ERROR: Pin 0 must not "
"be unconnected\n");
stub_errors += 1;
}
continue;
}
if (ivl_logic_width(net) != width_of_nexus(nex)) {
fprintf(out, " %d: ERROR: Nexus width is %u\n",
idx, width_of_nexus(nex));
stub_errors += 1;
}
}
/* If this is an instance of a UDP, then check that the
instantiation is consistent with the definition. */
if (ivl_logic_type(net) == IVL_LO_UDP) {
ivl_udp_t udp = ivl_logic_udp(net);
if (npins != 1+ivl_udp_nin(udp)) {
fprintf(out, " ERROR: UDP %s expects %u inputs\n",
ivl_udp_name(udp), ivl_udp_nin(udp));
stub_errors += 1;
}
/* Add a reference to this udp definition. */
reference_udp_definition(udp);
}
npins = ivl_logic_attr_cnt(net);
for (idx = 0 ; idx < npins ; idx += 1) {
ivl_attribute_t cur = ivl_logic_attr_val(net,idx);
switch (cur->type) {
case IVL_ATT_VOID:
fprintf(out, " %s\n", cur->key);
break;
case IVL_ATT_NUM:
fprintf(out, " %s = %ld\n", cur->key, cur->val.num);
break;
case IVL_ATT_STR:
fprintf(out, " %s = %s\n", cur->key, cur->val.str);
break;
}
}
}
