/**
* @fn ixEthAccQMgrQueueSetup(void)
*
* @brief Setup one queue and its event, and register the callback required
* by this component to the QMgr
*
* @internal
*/
IX_ETH_ACC_PRIVATE IxEthAccStatus
ixEthAccQMgrQueueSetup(IxEthAccQregInfo *qInfoDes)
{
/*
* Configure each Q.
*/
if ( ixQMgrQConfig( qInfoDes->qName,
qInfoDes->qId,
qInfoDes->qSize,
qInfoDes->qWords) != IX_SUCCESS)
{
return IX_ETH_ACC_FAIL;
}
if ( ixQMgrWatermarkSet( qInfoDes->qId,
qInfoDes->AlmostEmptyThreshold,
qInfoDes->AlmostFullThreshold
) != IX_SUCCESS)
{
return IX_ETH_ACC_FAIL;
}
/*
* Set dispatcher priority.
*/
if ( ixQMgrDispatcherPrioritySet( qInfoDes->qId,
IX_ETH_ACC_QM_QUEUE_DISPATCH_PRIORITY)
!= IX_SUCCESS)
{
return IX_ETH_ACC_FAIL;
}
/*
* Register callbacks for each Q.
*/
if ( ixQMgrNotificationCallbackSet(qInfoDes->qId,
qInfoDes->qCallback,
qInfoDes->callbackTag)
!= IX_SUCCESS )
{
return IX_ETH_ACC_FAIL;
}
/*
* Set notification condition for Q
*/
if ( qInfoDes->qNotificationEnableAtStartup == TRUE )
{
if ( ixQMgrNotificationEnable(qInfoDes->qId,
qInfoDes->qConditionSource)
!= IX_SUCCESS )
{
return IX_ETH_ACC_FAIL;
}
}
return(IX_ETH_ACC_SUCCESS);
}
/**
* @fn ixCryptoQAccessInit
* @brief Queue configuration and callback registration function
*
*/
IxCryptoAccStatus
ixCryptoQAccessInit (IxCryptoAccCfg compCfg)
{
UINT32 i;
if (initDone) /* If the module has been initialized */
{
return IX_CRYPTO_ACC_STATUS_FAIL;
} /* end of if (initDone) */
/* Initialize all the member in the ixCryptoStats struct */
ixCryptoStats.cryptoSuccessCounter = 0;
ixCryptoStats.cryptoFailCounter = 0;
ixCryptoStats.qOverflowCounter = 0;
ixCryptoStats.qUnderflowCounter = 0;
ixCryptoStats.qDescAddrInvalidCounter = 0;
ixCryptoStats.wepNpeSuccessCounter = 0;
ixCryptoStats.wepNpeFailCounter = 0;
ixCryptoStats.wepNpeQOverflowCounter = 0;
ixCryptoStats.wepNpeQUnderflowCounter = 0;
ixCryptoStats.wepNpeQDescAddrInvalidCounter = 0;
ixCryptoStats.wepXScaleSuccessCounter = 0;
ixCryptoStats.wepXScaleFailCounter = 0;
/* Check component configuration to determine which queues should be
* initialized
*/
switch (compCfg)
{
/* XScale WEP engine only, no hw queues need to be initialized,
* thus the function is forced return here
*/
case IX_CRYPTO_ACC_CFG_WEP_XSCALE_ACC_EN:
/* Set flag to indicate this module has been initializaed */
initDone = TRUE;
return IX_CRYPTO_ACC_STATUS_SUCCESS;
/* Crypto NPE engine only */
case IX_CRYPTO_ACC_CFG_CRYPTO_NPE_ACC_EN:
startQueueIndex = IX_CRYPTO_HW_ACCEL_QUEUE_START_INDEX;
endQueueIndex = IX_CRYPTO_HW_ACCEL_QUEUE_END_INDEX;
break;
/* WEP NPE engine only */
case IX_CRYPTO_ACC_CFG_WEP_NPE_ACC_EN:
startQueueIndex = IX_CRYPTO_WEP_QUEUE_START_INDEX;
endQueueIndex = IX_CRYPTO_WEP_QUEUE_END_INDEX;
break;
/* CRYPTO NPE and WEP NPE engine only */
case IX_CRYPTO_ACC_CFG_CRYPTO_WEP_NPE_ACC_EN:
startQueueIndex = IX_CRYPTO_HW_ACCEL_QUEUE_START_INDEX;
endQueueIndex = IX_CRYPTO_WEP_QUEUE_END_INDEX;
break;
/* Invalid configuration */
default:
return IX_CRYPTO_ACC_STATUS_FAIL;
}
for (i = startQueueIndex; i < endQueueIndex; i++)
{
/* Configure each Q */
if (IX_SUCCESS != (ixQMgrQConfig (
queueInfo[i].qName,
queueInfo[i].qId,
queueInfo[i].qSize,
queueInfo[i].qWords)))
{
/* configuration failed */
return IX_CRYPTO_ACC_STATUS_FAIL;
} /* end of if (ixQMgrQConfig) */
/* Set notification condition for Q */
if (queueInfo[i].qNotificationEnableAtStartup)
{
/* Set Q watermarks for each Q */
if (IX_SUCCESS != ixQMgrWatermarkSet (
queueInfo[i].qId,
queueInfo[i].AlmostEmptyThreshold,
queueInfo[i].AlmostFullThreshold))
{
/* configuration failed */
return IX_CRYPTO_ACC_STATUS_FAIL;
} /* end of if (ixQMgrWatermarkSet) */
/* Set dispatcher priority for the Q */
if (IX_SUCCESS != ixQMgrDispatcherPrioritySet (
queueInfo[i].qId,
IX_CRYPTO_ACC_QM_QUEUE_DISPATCH_PRIORITY))
{
/* configuration failed */
return IX_CRYPTO_ACC_STATUS_FAIL;
} /* end of if (ixQMgrDispatcherPrioritySet) */
/* Register callbacks for each Q */
if (IX_SUCCESS != ixQMgrNotificationCallbackSet (
queueInfo[i].qId,
queueInfo[i].qCallback,
queueInfo[i].callbackTag))
{
/* callback registration failed */
return IX_CRYPTO_ACC_STATUS_FAIL;
} /* end of if (ixQMgrNotificationCallbackSet) */
if (IX_SUCCESS != ixQMgrNotificationEnable (
queueInfo[i].qId,
queueInfo[i].qConditionSource))
{
/* configuration failed */
return IX_CRYPTO_ACC_STATUS_FAIL;
} /* end of if (ixQMgrNotificationEnable) */
} /* end of if (queueInfo[i].qNotificationEnableAtStartup) */
} /* end of for (i) */
/* Set flag to indicate this module has been initializaed */
initDone = TRUE;
return IX_CRYPTO_ACC_STATUS_SUCCESS;
} /* end of ixCryptoQAccessInit () function */
/* ---------------------------------------------------------
* Queues Initialisation
*/
IX_STATUS
ixAtmdAccUtilQueuesInit (void)
{
IX_STATUS returnStatus = IX_SUCCESS;
IxQMgrQId txQueueIdx;
IxQMgrQId rxFreeQueueIdx;
unsigned int rxFreeQueueCount;
unsigned int txQueueIdSize[IX_QMGR_MAX_NUM_QUEUES];
if (queueInitDone == TRUE)
{
return IX_FAIL;
}
/* initialise the array for the tx queue size */
txQueueIdx = IX_NPE_A_QMQ_ATM_TXID_MIN;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE0_SIZE;
#ifdef IX_NPE_MPHYMULTIPORT
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE1_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE2_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE3_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE4_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE5_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE6_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE7_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE8_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE9_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE10_SIZE;
txQueueIdSize[txQueueIdx++] = IX_ATMDACC_TXQUEUE11_SIZE;
#endif
/* initialise the RX queues */
returnStatus = ixQMgrQConfig ("RX high",
IX_NPE_A_QMQ_ATM_RX_HI,
IX_ATMDACC_RX_QUEUE_SIZE,
IX_QMGR_Q_ENTRY_SIZE1);
if (returnStatus == IX_SUCCESS)
{
returnStatus = ixQMgrQConfig ("RX low",
IX_NPE_A_QMQ_ATM_RX_LO,
IX_ATMDACC_RX_QUEUE_SIZE,
IX_QMGR_Q_ENTRY_SIZE1);
}
/* initialise the TX queues */
for (txQueueIdx = IX_NPE_A_QMQ_ATM_TXID_MIN;
(txQueueIdx <= IX_NPE_A_QMQ_ATM_TXID_MAX)
&& (returnStatus == IX_SUCCESS);
txQueueIdx++)
{
returnStatus = ixQMgrQConfig ("Tx Vc",
txQueueIdx,
txQueueIdSize[txQueueIdx],
IX_QMGR_Q_ENTRY_SIZE1);
}
if (returnStatus == IX_SUCCESS)
{
/* initialise the tx done queue */
returnStatus = ixQMgrQConfig ("TX Done",
IX_NPE_A_QMQ_ATM_TX_DONE,
IX_ATMDACC_TXDONE_QUEUE_SIZE,
IX_QMGR_Q_ENTRY_SIZE1);
}
/* initialise the first rx free queues with a big size 32 */
for (rxFreeQueueCount = 0,
rxFreeQueueIdx = IX_NPE_A_QMQ_ATM_RXFREE_MIN;
(rxFreeQueueCount < IX_ATMDACC_DOUBLE_SIZE_RXFREE_COUNT)
&& (rxFreeQueueIdx <= IX_NPE_A_QMQ_ATM_RXFREE_MAX)
&& (returnStatus == IX_SUCCESS);
rxFreeQueueIdx++,
rxFreeQueueCount++)
{
/* allocate RX free queues with a 32 entries */
returnStatus = ixQMgrQConfig ("Rx free",
rxFreeQueueIdx,
IX_QMGR_Q_SIZE32,
IX_QMGR_Q_ENTRY_SIZE1);
}
/* initialise the next rx free queues with smaller size 16 */
for (;
(rxFreeQueueIdx <= IX_NPE_A_QMQ_ATM_RXFREE_MAX)
&& (returnStatus == IX_SUCCESS);
rxFreeQueueIdx++)
{
/* allocate RX free queues with 16 entries */
returnStatus = ixQMgrQConfig ("Rx free",
rxFreeQueueIdx,
IX_ATMDACC_QMGR_OAM_FREE_QUEUE_SIZE,
IX_QMGR_Q_ENTRY_SIZE1);
}
/* initialise the OAM rx free queue */
if(returnStatus == IX_SUCCESS)
{
returnStatus = ixQMgrQConfig ("Rx OAM free",
IX_NPE_A_QMQ_OAM_FREE_VC,
IX_QMGR_Q_SIZE16,
IX_QMGR_Q_ENTRY_SIZE1);
}
if (returnStatus != IX_SUCCESS)
{
returnStatus = IX_FAIL;
}
else
{
queueInitDone = TRUE;
}
return returnStatus;
}
