static void
jazzioattach(device_t parent, device_t self, void *aux)
{
struct jazzio_softc *sc = device_private(self);
struct jazzio_attach_args ja;
int i;
sc->sc_dev = self;
if (jazzio_conf == NULL)
panic("jazzio_conf isn't initialized");
if (jazzio_devconfig == NULL)
panic("jazzio_devconfig isn't initialized");
jazzio_found = 1;
aprint_normal("\n");
/* keep our CPU device description handy */
sc->sc_devs = jazzio_devconfig;
/* initialize interrupt handler table */
for (i = 0; i < __arraycount(jazzio_intrtab); i++) {
jazzio_intrtab[i].ih_func = jazzio_no_handler;
jazzio_intrtab[i].ih_arg = NULL;
}
/* set up interrupt handlers */
(*platform->set_intr)(MIPS_INT_MASK_1, jazzio_intr, ARC_INTPRI_JAZZ);
/* Initialize jazzio DMA mapping register area and pool */
jazz_dmatlb_init(&jazzio_bus, jazzio_conf->jc_dmatlbreg);
/* Create bus_dma_tag */
jazz_bus_dma_tag_init(&sc->sc_dmat);
/* Try to configure each jazzio attached device */
for (i = 0; sc->sc_devs[i].ps_ca.ca_name != NULL; i++) {
ja.ja_name = sc->sc_devs[i].ps_ca.ca_name;
ja.ja_bust = &jazzio_bus;
ja.ja_dmat = &sc->sc_dmat;
ja.ja_addr = (bus_addr_t)sc->sc_devs[i].ps_base;
ja.ja_intr = sc->sc_devs[i].ps_ca.ca_slot;
ja.ja_dma = 0;
/* Tell the autoconfig machinery we've found the hardware. */
config_found(self, &ja, jazzioprint);
}
}
/*
* Set up the chipset's function pointers.
*/
void
necpb_init(struct necpb_context *ncp)
{
pci_chipset_tag_t pc;
#ifndef PCI_NETBSD_CONFIGURE
pcitag_t tag;
pcireg_t id, class, csr;
u_int dev;
#endif
if (ncp->nc_initialized)
return;
arc_large_bus_space_init(&ncp->nc_memt, "necpcimem",
RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM);
arc_bus_space_init_extent(&ncp->nc_memt, (void *)necpb_mem_ex_storage,
sizeof(necpb_mem_ex_storage));
arc_bus_space_init(&ncp->nc_iot, "necpciio",
RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO);
arc_bus_space_init_extent(&ncp->nc_iot, (void *)necpb_io_ex_storage,
sizeof(necpb_io_ex_storage));
jazz_bus_dma_tag_init(&ncp->nc_dmat);
pc = &ncp->nc_pc;
pc->pc_attach_hook = necpb_attach_hook;
pc->pc_bus_maxdevs = necpb_bus_maxdevs;
pc->pc_make_tag = necpb_make_tag;
pc->pc_decompose_tag = necpb_decompose_tag;
pc->pc_conf_read = necpb_conf_read;
pc->pc_conf_write = necpb_conf_write;
pc->pc_intr_map = necpb_intr_map;
pc->pc_intr_string = necpb_intr_string;
pc->pc_intr_establish = necpb_intr_establish;
pc->pc_intr_disestablish = necpb_intr_disestablish;
#ifdef PCI_NETBSD_CONFIGURE
pc->pc_conf_interrupt = necpb_conf_interrupt;
pc->pc_conf_hook = necpb_conf_hook;
#endif
#ifndef PCI_NETBSD_CONFIGURE
/*
* XXX:
* NEC's firmware does not configure PCI devices completely.
* We need to disable expansion ROM and enable mem/io/busmaster
* bits here.
*/
for (dev = 3; dev <= 5; dev++) {
tag = necpb_make_tag(pc, 0, dev, 0);
id = necpb_conf_read(pc, tag, PCI_ID_REG);
if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
continue;
class = necpb_conf_read(pc, tag, PCI_CLASS_REG);
csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
if (PCI_CLASS(class) != PCI_CLASS_BRIDGE ||
PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_PCI) {
csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
necpb_conf_write(pc, tag, PCI_MAPREG_ROM, 0);
}
csr |= PCI_COMMAND_MASTER_ENABLE;
necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
}
#endif
ncp->nc_initialized = 1;
}
