void up_enable_irq(int irq) { /* This will be called on each interrupt exit whether the interrupt can be * enambled or not. So this assertion is necessarily lame. */ DEBUGASSERT((unsigned)irq < NR_IRQS); /* Check for external interrupt */ if (irq >= KL_IRQ_EXTINT && irq < (KL_IRQ_EXTINT + 32)) { /* Set the appropriate bit in the ISER register to enable the * interrupt */ putreg32((1 << (irq - KL_IRQ_EXTINT)), ARMV6M_NVIC_ISER); } /* Handle processor exceptions. Only SysTick can be disabled */ else if (irq == KL_IRQ_SYSTICK) { modifyreg32(ARMV6M_SYSTICK_CSR, 0, SYSTICK_CSR_ENABLE); } kl_dumpnvic("enable", irq); }
void up_irqinitialize(void) { uint32_t regaddr; int i; /* Disable all interrupts */ putreg32(0xffffffff, ARMV6M_NVIC_ICER); /* Set all interrupts (and exceptions) to the default priority */ putreg32(DEFPRIORITY32, ARMV6M_SYSCON_SHPR2); putreg32(DEFPRIORITY32, ARMV6M_SYSCON_SHPR3); /* Now set all of the interrupt lines to the default priority */ for (i = 0; i < 8; i++) { regaddr = ARMV6M_NVIC_IPR(i); putreg32(DEFPRIORITY32, regaddr); } /* currents_regs is non-NULL only while processing an interrupt */ current_regs = NULL; /* Attach the SVCall and Hard Fault exception handlers. The SVCall * exception is used for performing context switches; The Hard Fault * must also be caught because a SVCall may show up as a Hard Fault * under certain conditions. */ irq_attach(KL_IRQ_SVCALL, up_svcall); irq_attach(KL_IRQ_HARDFAULT, up_hardfault); /* Attach all other processor exceptions (except reset and sys tick) */ #ifdef CONFIG_DEBUG irq_attach(KL_IRQ_NMI, kl_nmi); irq_attach(KL_IRQ_PENDSV, kl_pendsv); irq_attach(KL_IRQ_RESERVED, kl_reserved); #endif kl_dumpnvic("initial", NR_IRQS); /* Initialize logic to support a second level of interrupt decoding for * configured pin interrupts. */ #ifdef CONFIG_GPIO_IRQ kl_gpioirqinitialize(); #endif #ifndef CONFIG_SUPPRESS_INTERRUPTS /* And finally, enable interrupts */ irqenable(); #endif }
void up_disable_irq(int irq) { DEBUGASSERT((unsigned)irq < NR_IRQS); /* Check for an external interrupt */ if (irq >= KL_IRQ_EXTINT && irq < (KL_IRQ_EXTINT + 32)) { /* Set the appropriate bit in the ICER register to disable the * interrupt */ putreg32((1 << (irq - KL_IRQ_EXTINT)), ARMV6M_NVIC_ICER); } /* Handle processor exceptions. Only SysTick can be disabled */ else if (irq == KL_IRQ_SYSTICK) { modifyreg32(ARMV6M_SYSTICK_CSR, SYSTICK_CSR_ENABLE, 0); } kl_dumpnvic("disable", irq); }