int
acx100_init_wep(struct acx_softc *sc)
{
struct acx_conf_wepopt wep_opt;
struct acx_conf_mmap mem_map;
struct ifnet *ifp = &sc->sc_ic.ic_if;
/* Set WEP cache start/end address */
if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't get mmap\n", ifp->if_xname);
return (1);
}
mem_map.wep_cache_start = htole32(letoh32(mem_map.code_end) + 4);
mem_map.wep_cache_end = htole32(letoh32(mem_map.code_end) + 4);
if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't set mmap\n", ifp->if_xname);
return (1);
}
/* Set WEP options */
wep_opt.nkey = htole16(IEEE80211_WEP_NKID + 10);
wep_opt.opt = WEPOPT_HDWEP;
if (acx_set_conf(sc, ACX_CONF_WEPOPT, &wep_opt, sizeof(wep_opt)) != 0) {
printf("%s: can't set wep opt\n", ifp->if_xname);
return (1);
}
return (0);
}
u_int64_t
inosize(struct ext2fs_dinode *dp)
{
u_int64_t size = letoh32(dp->e2di_size);
if ((letoh16(dp->e2di_mode) & IFMT) == IFREG)
size |= (u_int64_t)letoh32(dp->e2di_size_hi) << 32;
if (size >= 0x80000000U)
(void)setlarge();
return size;
}
void
viomb_read_config(struct viomb_softc *sc)
{
struct virtio_softc *vsc = (struct virtio_softc *)sc->sc_virtio;
u_int32_t reg;
/* these values are explicitly specified as little-endian */
reg = virtio_read_device_config_4(vsc, VIRTIO_BALLOON_CONFIG_NUM_PAGES);
sc->sc_npages = letoh32(reg);
reg = virtio_read_device_config_4(vsc, VIRTIO_BALLOON_CONFIG_ACTUAL);
sc->sc_actual = letoh32(reg);
VIOMBDEBUG(sc, "sc->sc_npages %u, sc->sc_actual %u\n",
sc->sc_npages, sc->sc_actual);
}
int
rfx_initialize(struct rfx_softc *sc, struct sbus_attach_args *sa,
struct rfx_config *cf)
{
u_int32_t *data, offset, value;
size_t cnt;
bus_space_handle_t bh;
int error;
/*
* Map the initialization data
*/
if ((error = sbus_bus_map(sa->sa_bustag, sa->sa_slot, sa->sa_offset +
RFX_INIT_ADDR, RFX_INIT_SIZE, BUS_SPACE_MAP_LINEAR, 0, &bh)) != 0) {
printf("\n%s: couldn't map initialization data\n",
sc->sc_sunfb.sf_dev.dv_xname);
return error;
}
data = (u_int32_t *)bus_space_vaddr(sa->sa_bustag, bh);
/*
* Skip copyright notice
*/
data += RFX_INIT_OFFSET / sizeof(u_int32_t);
cnt = (RFX_INIT_SIZE - RFX_INIT_OFFSET) / sizeof(u_int32_t);
cnt >>= 1;
/*
* Parse and apply settings
*/
while (cnt != 0) {
offset = *data++;
value = *data++;
if (offset == (u_int32_t)-1 && value == (u_int32_t)-1)
break;
/* Old PROM are little-endian */
if (cf->version <= 1) {
offset = letoh32(offset);
value = letoh32(offset);
}
if (offset & (1 << 31)) {
offset = (offset & ~(1 << 31)) - RFX_RAMDAC_ADDR;
if (offset < RFX_RAMDAC_SIZE)
sc->sc_ramdac[offset] = value >> 24;
} else {
pcireg_t
ht_conf_read(void *cpv, pcitag_t tag, int offset)
{
struct ht_softc *sc = cpv;
int bus, dev, fcn;
pcireg_t reg;
#ifdef DEBUG
printf("ht_conf_read: tag=%x, offset=%x\n", tag, offset);
#endif
ht_decompose_tag(NULL, tag, &bus, &dev, &fcn);
if (bus == 0 && dev == 0) {
tag |= (offset << 2);
reg = bus_space_read_4(sc->sc_iot, sc->sc_config0_ioh, tag);
reg = letoh32(reg);
} else if (bus == 0) {
/* XXX Why can we only access function 0? */
if (fcn > 0)
return ~0;
tag |= offset;
reg = bus_space_read_4(sc->sc_memt, sc->sc_config0_memh, tag);
} else {
tag |= offset;
reg = bus_space_read_4(sc->sc_memt, sc->sc_config1_memh, tag);
}
#ifdef DEBUG
printf("ht_conf_read: reg=%x\n", reg);
#endif
return reg;
}
static bool loadResourceHighScores(file_t fp)
{
size_t i;
U16 u16Temp;
U32 u32Temp;
resource_hiscore_t dataTemp;
if (sysfile_read(fp, &u16Temp, sizeof(u16Temp), 1) != 1)
{
return false;
}
screen_nbr_hiscores = letoh16(u16Temp);
screen_highScores = sysmem_push(screen_nbr_hiscores * sizeof(*screen_highScores));
if (!screen_highScores)
{
return false;
}
for (i = 0; i < screen_nbr_hiscores; ++i)
{
if (sysfile_read(fp, &dataTemp, sizeof(dataTemp), 1) != 1)
{
return false;
}
memcpy(&u32Temp, dataTemp.score, sizeof(U32));
screen_highScores[i].score = letoh32(u32Temp);
memcpy(screen_highScores[i].name, dataTemp.name, HISCORE_NAME_SIZE);
}
return true;
}
void
mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
{
h += o;
while (c--)
*(a++) = letoh32(*(volatile u_int32_t *)h);
}
void
rtwn_rx_frame(struct rtwn_pci_softc *sc, struct r92c_rx_desc_pci *rx_desc,
struct rtwn_rx_data *rx_data, int desc_idx)
{
struct ieee80211com *ic = &sc->sc_sc.sc_ic;
struct ifnet *ifp = &ic->ic_if;
struct ieee80211_rxinfo rxi;
struct ieee80211_frame *wh;
struct ieee80211_node *ni;
struct r92c_rx_phystat *phy = NULL;
uint32_t rxdw0, rxdw3;
struct mbuf *m, *m1;
uint8_t rate;
int8_t rssi = 0;
int infosz, pktlen, shift, error;
rxdw0 = letoh32(rx_desc->rxdw0);
rxdw3 = letoh32(rx_desc->rxdw3);
if (__predict_false(rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR))) {
/*
* This should not happen since we setup our Rx filter
* to not receive these frames.
*/
ifp->if_ierrors++;
return;
}
pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN);
if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) {
ifp->if_ierrors++;
return;
}
rate = MS(rxdw3, R92C_RXDW3_RATE);
infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8;
if (infosz > sizeof(struct r92c_rx_phystat))
infosz = sizeof(struct r92c_rx_phystat);
shift = MS(rxdw0, R92C_RXDW0_SHIFT);
/* Get RSSI from PHY status descriptor if present. */
if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) {
phy = mtod(rx_data->m, struct r92c_rx_phystat *);
rssi = rtwn_get_rssi(&sc->sc_sc, rate, phy);
/* Update our average RSSI. */
rtwn_update_avgrssi(&sc->sc_sc, rate, rssi);
}
int read_uint32le(int fd, uint32_t* buf)
{
size_t n;
n = read(fd, (char*) buf, 4);
*buf = letoh32(*buf);
return n;
}
static int readInt() {
int ret = *(int*)(s_data + s_pos);
if(s_bigEndian)
ret = betoh32(ret);
else
ret = letoh32(ret);
s_pos += sizeof(int);
return ret;
}
struct urndis_comp_hdr *
urndis_ctrl_recv(struct NepClassEth *ncp)
{
struct urndis_comp_hdr *hdr;
char *buf;
LONG err;
LONG sc_ifaceno_ctl=0;
buf = psdAllocVec(RNDIS_RESPONSE_LEN);
if (buf == NULL) {
bug("%s: out of memory\n", DEVNAME);
return NULL;
}
err = urndis_ctrl_msg(ncp, UT_READ_CLASS_INTERFACE, UR_CLEAR_FEATURE,
sc_ifaceno_ctl, 0, buf, RNDIS_RESPONSE_LEN);
if (err != 0) {
bug("%s: urndis_comp_hdr error\n", DEVNAME);
psdFreeVec(buf);
return NULL;
}
hdr = (struct urndis_comp_hdr *)buf;
bug("%s: urndis_ctrl_recv: type 0x%x len %u\n",
DEVNAME,
hdr->rm_type,
letoh32(hdr->rm_len));
//dumpmem(buf,hdr->rm_len);
if (letoh32(hdr->rm_len) > RNDIS_RESPONSE_LEN) {
bug("%s: ctrl message error: wrong size %u > %u\n",
DEVNAME,
letoh32(hdr->rm_len),
RNDIS_RESPONSE_LEN);
psdFreeVec(buf);
return NULL;
}
return hdr;
}
static bool loadResourceSpritesData(file_t fp)
{
size_t i, j;
U16 u16Temp;
if (sysfile_read(fp, &u16Temp, sizeof(u16Temp), 1) != 1)
{
return false;
}
sprites_nbr_sprites = letoh16(u16Temp);
sprites_data = sysmem_push(sprites_nbr_sprites * sizeof(*sprites_data));
if (!sprites_data)
{
return false;
}
#ifdef GFXST
for (i = 0; i < sprites_nbr_sprites; ++i)
{
for (j = 0; j < SPRITES_NBR_DATA; ++j)
{
U32 u32Temp;
if (sysfile_read(fp, &u32Temp, sizeof(u32Temp), 1) != 1)
{
return false;
}
sprites_data[i][j] = letoh32(u32Temp);
}
}
#endif /* GFXST */
#ifdef GFXPC
for (i = 0; i < sprites_nbr_sprites; ++i)
{
for (j = 0; j < SPRITES_NBR_COLS; ++j)
{
size_t k;
for (k = 0; k < SPRITES_NBR_ROWS; ++k)
{
resource_spriteX_t dataTemp;
if (sysfile_read(fp, &dataTemp, sizeof(dataTemp), 1) != 1)
{
return false;
}
memcpy(&u16Temp, dataTemp.mask, sizeof(U16));
sprites_data[i][j][k].mask = letoh16(u16Temp);
memcpy(&u16Temp, dataTemp.pict, sizeof(U16));
sprites_data[i][j][k].pict = letoh16(u16Temp);
}
}
}
#endif /* GFXPC */
return true;
}
void
mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
{
register u_int32_t r;
h += o;
while (c--) {
r = *((volatile u_int32_t *)h)++;
*(a++) = letoh32(r);
}
}
static void *
extractBuf(const char * path, void *zip,
struct cdir_entry *cdir_start, uint16_t cdir_entries)
{
struct cdir_entry *entry = find_cdir_entry(cdir_start, cdir_entries, path);
struct local_file_header *file = (struct local_file_header *)((char *)zip + letoh32(entry->offset));
void * data = ((char *)&file->data) + letoh16(file->filename_size) + letoh16(file->extra_field_size);
void * buf = malloc(letoh32(entry->uncompressed_size));
if (buf == (void *)-1) {
__android_log_print(ANDROID_LOG_ERROR, "GeckoLibLoad", "Couldn't alloc decompression buffer for %s", path);
return NULL;
}
if (letoh16(file->compression) == DEFLATE)
extractLib(entry, data, buf);
else
memcpy(buf, data, letoh32(entry->uncompressed_size));
return buf;
}
/*
* PARAMETERS:
* addr - Emulator memory address to read
*
* RETURNS:
* Long value read from emulator memory.
* REMARKS:
* Reads a long value from the emulator memory.
*/
static uint32_t
rdl(struct x86emu *emu, uint32_t addr)
{
if (addr > emu->mem_size - 4)
x86emu_halt_sys(emu);
#ifdef __STRICT_ALIGNMENT
if (addr & 3) {
u_int8_t *a = emu->mem_base + addr;
u_int32_t r;
r = ((*(a + 0) << 0) & 0x000000ff) |
((*(a + 1) << 8) & 0x0000ff00) |
((*(a + 2) << 16) & 0x00ff0000) |
((*(a + 3) << 24) & 0xff000000);
return r;
} else
return letoh32(*(u_int32_t *)(emu->mem_base + addr));
#else
return letoh32(*(u_int32_t *)(emu->mem_base + addr));
#endif
}
/* Scan the partition maps */
int
udf_find_partmaps(struct umount *ump, struct logvol_desc *lvd)
{
struct regid *pmap_id;
unsigned char regid_id[UDF_REGID_ID_SIZE + 1];
int i, ptype, psize, error;
uint8_t *pmap = (uint8_t *) &lvd->maps[0];
for (i = 0; i < letoh32(lvd->n_pm); i++) {
ptype = pmap[0];
psize = pmap[1];
if (ptype != 1 && ptype != 2)
return (EINVAL); /* Invalid partition map type */
if (psize != sizeof(struct part_map_1) &&
psize != sizeof(struct part_map_2))
return (EINVAL); /* Invalid partition map size */
if (ptype == 1) {
pmap += sizeof(struct part_map_1);
continue;
}
/* Type 2 map. Find out the details */
pmap_id = (struct regid *) &pmap[4];
regid_id[UDF_REGID_ID_SIZE] = '\0';
bcopy(&pmap_id->id[0], ®id_id[0], UDF_REGID_ID_SIZE);
if (!bcmp(®id_id[0], "*UDF Virtual Partition",
UDF_REGID_ID_SIZE))
error = udf_get_vpartmap(ump,
(struct part_map_virt *) pmap);
else if (!bcmp(®id_id[0], "*UDF Sparable Partition",
UDF_REGID_ID_SIZE))
error = udf_get_spartmap(ump,
(struct part_map_spare *) pmap);
else if (!bcmp(®id_id[0], "*UDF Metadata Partition",
UDF_REGID_ID_SIZE))
error = udf_get_mpartmap(ump,
(struct part_map_meta *) pmap);
else
return (EINVAL); /* Unsupported partition map */
if (error)
return (error); /* Error getting partition */
pmap += sizeof(struct part_map_2);
}
return (0);
}
uint32_t
urndis_ctrl_query(struct NepClassEth *ncp, uint32_t oid,
void *qbuf, size_t qlen,
void **rbuf, size_t *rbufsz)
{
struct urndis_query_req *msg;
uint32_t rval;
struct urndis_comp_hdr *hdr;
msg = psdAllocVec(sizeof(*msg) + qlen);
if (msg == NULL) {
bug("%s: out of memory\n", DEVNAME);
return RNDIS_STATUS_FAILURE;
}
msg->rm_type = htole32(REMOTE_NDIS_QUERY_MSG);
msg->rm_len = htole32(sizeof(*msg) + qlen);
msg->rm_rid = 0; /* XXX */
msg->rm_oid = htole32(oid);
msg->rm_infobuflen = htole32(qlen);
if (qlen != 0) {
msg->rm_infobufoffset = htole32(20);
memcpy((char*)msg + 20, qbuf, qlen);
} else
msg->rm_infobufoffset = 0;
msg->rm_devicevchdl = 0;
bug("%s: urndis_ctrl_query send: type %u len %u rid %u oid 0x%x "
"infobuflen %u infobufoffset %u devicevchdl %u\n",
DEVNAME,
letoh32(msg->rm_type),
letoh32(msg->rm_len),
letoh32(msg->rm_rid),
letoh32(msg->rm_oid),
letoh32(msg->rm_infobuflen),
letoh32(msg->rm_infobufoffset),
letoh32(msg->rm_devicevchdl));
rval = urndis_ctrl_send(ncp, msg, sizeof(*msg));
psdFreeVec(msg);
if (rval != RNDIS_STATUS_SUCCESS) {
bug("%s: query failed\n", DEVNAME);
return rval;
}
if ((hdr = urndis_ctrl_recv(ncp)) == NULL) {
bug("%s: unable to get query response\n", DEVNAME);
return RNDIS_STATUS_FAILURE;
}
rval = urndis_ctrl_handle(ncp, hdr, rbuf, rbufsz);
return rval;
}
uint32_t urndis_ctrl_handle(struct NepClassEth *ncp, struct urndis_comp_hdr *hdr,void **buf, size_t *bufsz)
{
uint32_t rval;
bug("%s: urndis_ctrl_handle\n", DEVNAME);
if (buf && bufsz) {
*buf = NULL;
*bufsz = 0;
}
switch (letoh32(hdr->rm_type)) {
case REMOTE_NDIS_INITIALIZE_CMPLT:
rval = urndis_ctrl_handle_init(ncp, hdr);
break;
case REMOTE_NDIS_QUERY_CMPLT:
rval = urndis_ctrl_handle_query(ncp, hdr, buf, bufsz);
break;
case REMOTE_NDIS_RESET_CMPLT:
rval = urndis_ctrl_handle_reset(ncp, hdr);
break;
case REMOTE_NDIS_KEEPALIVE_CMPLT:
case REMOTE_NDIS_SET_CMPLT:
rval = letoh32(hdr->rm_status);
break;
default:
bug("%s: ctrl message error: unknown event 0x%x\n",
DEVNAME, letoh32(hdr->rm_type));
rval = RNDIS_STATUS_FAILURE;
}
psdFreeVec(hdr);
return rval;
}
uint32_t
urndis_ctrl_handle_reset(struct NepClassEth *ncp,
const struct urndis_comp_hdr *hdr)
{
const struct urndis_reset_comp *msg;
uint32_t rval;
msg = (struct urndis_reset_comp *) hdr;
rval = letoh32(msg->rm_status);
bug("%s: urndis_ctrl_handle_reset: len %u status 0x%x "
"adrreset %u\n",
DEVNAME,
letoh32(msg->rm_len),
rval,
letoh32(msg->rm_adrreset));
if (rval != RNDIS_STATUS_SUCCESS) {
bug("%s: reset failed 0x%x\n", DEVNAME, rval);
return rval;
}
if (letoh32(msg->rm_adrreset) != 0) {
uint32_t filter;
filter = htole32(ncp->sc_filter);
rval = urndis_ctrl_set(ncp, OID_GEN_CURRENT_PACKET_FILTER,
&filter, sizeof(filter));
if (rval != RNDIS_STATUS_SUCCESS) {
bug("%s: unable to reset data filters\n",
DEVNAME);
return rval;
}
}
return rval;
}
static __inline void
oosiop_relocate_io(struct oosiop_softc *sc, bus_addr_t addr)
{
u_int32_t dcmd;
int32_t dsps;
dcmd = letoh32(sc->sc_scr[addr / 4 + 0]);
dsps = letoh32(sc->sc_scr[addr / 4 + 1]);
/* convert relative to absolute */
if (dcmd & 0x04000000) {
dcmd &= ~0x04000000;
#if 0
/*
* sign extension isn't needed here because
* ncr53cxxx.c generates 32 bit dsps.
*/
dsps <<= 8;
dsps >>= 8;
#endif
sc->sc_scr[addr / 4 + 0] = htole32(dcmd);
dsps += addr + 8;
}
int
acx100_init_fw_ring(struct acx_softc *sc)
{
struct acx100_conf_fw_ring ring;
struct acx_conf_mmap mem_map;
struct ifnet *ifp = &sc->sc_ic.ic_if;
uint32_t txring_start, rxring_start, ring_end;
/* Set firmware descriptor ring start address */
if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't get mmap\n", ifp->if_xname);
return (1);
}
txring_start = letoh32(mem_map.pkt_tmplt_end) + 4;
rxring_start = txring_start + ACX100_FW_TXRING_SIZE;
ring_end = rxring_start + ACX100_FW_RXRING_SIZE;
mem_map.fw_desc_start = htole32(txring_start);
if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't set mmap\n", ifp->if_xname);
return (1);
}
/* Set firmware descriptor ring configure */
bzero(&ring, sizeof(ring));
ring.fw_ring_size = htole32(ACX100_FW_TXRING_SIZE +
ACX100_FW_RXRING_SIZE + 8);
ring.fw_txring_num = 1;
ring.fw_txring_addr = htole32(txring_start);
ring.fw_txring_prio = ACX100_TXRING_PRIO_DEFAULT;
ring.fw_txdesc_num = 0; /* XXX ignored?? */
ring.fw_rxring_addr = htole32(rxring_start);
ring.fw_rxdesc_num = 0; /* XXX ignored?? */
ring.opt = ACX100_RINGOPT_AUTO_RESET;
ACX100_SET_RING_END(&ring, ring_end);
if (acx_set_conf(sc, ACX100_CONF_FW_RING, &ring, sizeof(ring)) != 0) {
printf("%s: can't set fw ring configure\n", ifp->if_xname);
return (1);
}
/* Setup firmware TX/RX descriptor ring */
acx100_init_fw_txring(sc, txring_start);
acx100_init_fw_rxring(sc, rxring_start);
return (0);
}
u_int32_t
radeondrm_read_rptr(struct drm_radeon_private *dev_priv, u_int32_t off)
{
u_int32_t val;
if (dev_priv->flags & RADEON_IS_AGP) {
val = bus_space_read_4(dev_priv->ring_rptr->bst,
dev_priv->ring_rptr->bsh, off);
} else {
val = *(((volatile u_int32_t *)dev_priv->ring_rptr->handle) +
(off / sizeof(u_int32_t)));
val = letoh32(val);
}
return (val);
}
long urndis_encap(struct NepClassEth *ncp, BYTE *m,LONG len )
{
struct urndis_packet_msg *msg;
msg = (struct urndis_packet_msg *)m;
memset(msg, 0, sizeof(*msg));
msg->rm_type = htole32(REMOTE_NDIS_PACKET_MSG);
msg->rm_len = htole32(sizeof(*msg) + len);
msg->rm_dataoffset = htole32(RNDIS_DATA_OFFSET);
msg->rm_datalen = htole32(len);
//m_copydata(m, 0, len,((char*)msg + RNDIS_DATA_OFFSET + RNDIS_HEADER_OFFSET));
DB(bug("%s: urndis_encap type 0x%x len %u data(off %u len %u)\n",
DEVNAME,
letoh32(msg->rm_type),
letoh32(msg->rm_len),
letoh32(msg->rm_dataoffset),
letoh32(msg->rm_datalen)));
return(sizeof(*msg));
}
static int
obsd_read(struct pci_dev *d, int pos, byte *buf, int len)
{
struct pci_io pi;
union {
u_int32_t u32;
u_int16_t u16[2];
u_int8_t u8[4];
} u;
if (!(len == 1 || len == 2 || len == 4))
{
return pci_generic_block_read(d, pos, buf, len);
}
if (pos >= 256)
return 0;
pi.pi_sel.pc_bus = d->bus;
pi.pi_sel.pc_dev = d->dev;
pi.pi_sel.pc_func = d->func;
pi.pi_reg = pos - (pos % 4);
pi.pi_width = 4;
if (ioctl(d->access->fd, PCIOCREAD, &pi) < 0) {
if (errno == ENXIO) {
pi.pi_data = 0xffffffff;
} else {
d->access->error("obsd_read: ioctl(PCIOCREAD) failed");
}
}
u.u32 = pi.pi_data;
switch (len)
{
case 1:
buf[0] = (u8) u.u8[pos % 4];
break;
case 2:
((u16 *) buf)[0] = letoh16(u.u16[(pos % 4) / 2]);
break;
case 4:
((u32 *) buf)[0] = (u32) letoh32(pi.pi_data);
break;
}
return 1;
}
int
acx111_init_memory(struct acx_softc *sc)
{
struct acx111_conf_mem mem;
struct acx111_conf_meminfo mem_info;
struct ifnet *ifp = &sc->sc_ic.ic_if;
/* Set memory configuration */
bzero(&mem, sizeof(mem));
mem.sta_max = htole16(ACX111_STA_MAX);
mem.memblk_size = htole16(ACX_MEMBLOCK_SIZE);
mem.rx_memblk_perc = ACX111_RX_MEMBLK_PERCENT;
mem.opt = ACX111_MEMOPT_DEFAULT;
mem.xfer_perc = ACX111_XFER_PERCENT;
mem.fw_rxring_num = 1;
mem.fw_rxring_type = ACX111_RXRING_TYPE_DEFAULT;
mem.fw_rxring_prio = ACX111_RXRING_PRIO_DEFAULT;
mem.fw_rxdesc_num = ACX_RX_DESC_CNT;
mem.h_rxring_paddr = htole32(sc->sc_ring_data.rx_ring_paddr);
mem.fw_txring_num = 1;
mem.fw_txring_attr = ACX111_TXRING_ATTR_DEFAULT;
mem.fw_txdesc_num = ACX_TX_DESC_CNT;
if (acx_set_conf(sc, ACX111_CONF_MEM, &mem, sizeof(mem)) != 0) {
printf("%s: can't set mem\n", ifp->if_xname);
return (1);
}
/* Get memory configuration */
if (acx_get_conf(sc, ACX111_CONF_MEMINFO, &mem_info,
sizeof(mem_info)) != 0) {
printf("%s: can't get meminfo\n", ifp->if_xname);
return (1);
}
/* Setup firmware TX descriptor ring */
acx111_init_fw_txring(sc, letoh32(mem_info.fw_txring_start));
/*
* There is no need to setup firmware RX descriptor ring,
* it is automaticly setup by hardware.
*/
return (0);
}
/** Convert little endian */
static inline spx_int32_t le_int(spx_int32_t i)
{
#ifdef ROCKBOX
return letoh32(i);
#elif !defined(__LITTLE_ENDIAN__) && ( defined(WORDS_BIGENDIAN) || defined(__BIG_ENDIAN__) )
spx_uint32_t ui, ret;
ui = i;
ret = ui>>24;
ret |= (ui>>8)&0x0000ff00;
ret |= (ui<<8)&0x00ff0000;
ret |= (ui<<24);
return ret;
#else
return i;
#endif
}
static bool loadPicture(file_t fp, pic_t ** picture)
{
U16 u16Temp;
size_t i, pixelWords32b;
resource_pic_t dataTemp;
pic_t * picTemp;
picTemp = sysmem_push(sizeof(*picTemp));
*picture = picTemp;
if (!picTemp)
{
return false;
}
if (sysfile_read(fp, &dataTemp, sizeof(dataTemp), 1) != 1)
{
return false;
}
memcpy(&u16Temp, dataTemp.width, sizeof(U16));
picTemp->width = letoh16(u16Temp);
memcpy(&u16Temp, dataTemp.height, sizeof(U16));
picTemp->height = letoh16(u16Temp);
memcpy(&u16Temp, dataTemp.xPos, sizeof(U16));
picTemp->xPos = letoh16(u16Temp);
memcpy(&u16Temp, dataTemp.yPos, sizeof(U16));
picTemp->yPos = letoh16(u16Temp);
pixelWords32b = (picTemp->width * picTemp->height) / 8; /*we use 4b per pixel*/
picTemp->pixels = sysmem_push(pixelWords32b * sizeof(U32));
if (!picTemp->pixels)
{
return false;
}
for (i = 0; i < pixelWords32b; ++i)
{
U32 u32Temp;
if (sysfile_read(fp, &u32Temp, sizeof(u32Temp), 1) != 1)
{
return false;
}
picTemp->pixels[i] = letoh32(u32Temp);
}
return true;
}
bool generator_set_data(Generator* self, const uint8_t* data, size_t data_size)/*{{{*/
{
bool success = false;
if (!data)
{
synce_error("RRA Calendar data is NULL");
goto exit;
}
if (data_size < 8)
{
synce_error("Invalid data size for RRA calendar data");
goto exit;
}
self->propval_count = letoh32(*(uint32_t*)(data + 0));
synce_trace("RRA calendar data field count: %i", self->propval_count);
if (0 == self->propval_count)
{
synce_error("No fields in RRA calendar record!");
goto exit;
}
if (self->propval_count > MAX_PROPVAL_COUNT)
{
synce_error("Too many fields in RRA calendar record");
goto exit;
}
self->propvals = (CEPROPVAL*)malloc(sizeof(CEPROPVAL) * self->propval_count);
if (!dbstream_to_propvals(data + 8, self->propval_count, self->propvals))
{
synce_error("Failed to convert RRA calendar database stream");
goto exit;
}
success = true;
exit:
return success;
}/*}}}*/
/* Convert file entry permission (5 bits per owner/group/user) to a mode_t */
static mode_t
udf_permtomode(struct unode *up)
{
uint32_t perm;
uint16_t flags;
mode_t mode;
perm = letoh32(up->u_fentry->perm);
flags = letoh16(up->u_fentry->icbtag.flags);
mode = perm & UDF_FENTRY_PERM_USER_MASK;
mode |= ((perm & UDF_FENTRY_PERM_GRP_MASK) >> 2);
mode |= ((perm & UDF_FENTRY_PERM_OWNER_MASK) >> 4);
mode |= ((flags & UDF_ICB_TAG_FLAGS_STICKY) << 4);
mode |= ((flags & UDF_ICB_TAG_FLAGS_SETGID) << 6);
mode |= ((flags & UDF_ICB_TAG_FLAGS_SETUID) << 8);
return (mode);
}
static bool loadResourceTilesData(file_t fp)
{
size_t i, j, k;
U16 u16Temp;
if (sysfile_read(fp, &u16Temp, sizeof(u16Temp), 1) != 1)
{
return false;
}
tiles_nbr_banks = letoh16(u16Temp);
tiles_data = sysmem_push(tiles_nbr_banks * TILES_NBR_TILES * sizeof(*tiles_data));
if (!tiles_data)
{
return false;
}
for (i = 0; i < tiles_nbr_banks ; ++i)
{
for (j = 0; j < TILES_NBR_TILES; ++j)
{
for (k = 0; k < TILES_NBR_LINES ; ++k)
{
#ifdef GFXPC
if (sysfile_read(fp, &u16Temp, sizeof(u16Temp), 1) != 1)
{
return false;
}
tiles_data[i * TILES_NBR_TILES + j][k] = letoh16(u16Temp);
#endif /* GFXPC */
#ifdef GFXST
U32 u32Temp;
if (sysfile_read(fp, &u32Temp, sizeof(u32Temp), 1) != 1)
{
return false;
}
tiles_data[i * TILES_NBR_TILES + j][k] = letoh32(u32Temp);
#endif /* GFXST */
}
}
}
return true;
}