static int __init
mcpcia_probe_hose(int h)
{
int cpu = smp_processor_id();
int mid = MCPCIA_HOSE2MID(h);
unsigned int pci_rev;
/* Gotta be REAL careful. If hose is absent, we get an mcheck. */
mb();
mb();
draina();
wrmces(7);
mcheck_expected(cpu) = 2; /* indicates probing */
mcheck_taken(cpu) = 0;
mcheck_extra(cpu) = mid;
mb();
/* Access the bus revision word. */
pci_rev = *(vuip)MCPCIA_REV(mid);
mb();
mb(); /* magic */
if (mcheck_taken(cpu)) {
mcheck_taken(cpu) = 0;
pci_rev = 0xffffffff;
mb();
}
mcheck_expected(cpu) = 0;
mb();
return (pci_rev >> 16) == PCI_CLASS_BRIDGE_HOST;
}
static void
conf_write(unsigned long addr, unsigned int value, unsigned char type1,
struct pci_controller *hose)
{
unsigned long flags;
unsigned long mid = MCPCIA_HOSE2MID(hose->index);
unsigned int stat0, temp, cpu;
cpu = smp_processor_id();
local_irq_save(flags); /* avoid getting hit by machine check */
/* Reset status register to avoid losing errors. */
stat0 = *(vuip)MCPCIA_CAP_ERR(mid);
*(vuip)MCPCIA_CAP_ERR(mid) = stat0; mb();
temp = *(vuip)MCPCIA_CAP_ERR(mid);
DBG_CFG(("conf_write: MCPCIA CAP_ERR(%d) was 0x%x\n", mid, stat0));
draina();
mcheck_expected(cpu) = 1;
mcheck_extra(cpu) = mid;
mb();
/* Access configuration space. */
*((vuip)addr) = value;
mb();
mb(); /* magic */
temp = *(vuip)MCPCIA_CAP_ERR(mid); /* read to force the write */
mcheck_expected(cpu) = 0;
mb();
DBG_CFG(("conf_write(): finished\n"));
local_irq_restore(flags);
}
static void
mikasa_apecs_machine_check(unsigned long vector, unsigned long la_ptr)
{
#define MCHK_NO_DEVSEL 0x205U
#define MCHK_NO_TABT 0x204U
struct el_common *mchk_header;
unsigned int code;
mchk_header = (struct el_common *)la_ptr;
/* Clear the error before any reporting. */
mb();
mb(); /* magic */
draina();
apecs_pci_clr_err();
wrmces(0x7);
mb();
code = mchk_header->code;
process_mcheck_info(vector, la_ptr, "MIKASA APECS",
(mcheck_expected(0)
&& (code == MCHK_NO_DEVSEL
|| code == MCHK_NO_TABT)));
}
static unsigned int
conf_read(unsigned long addr, unsigned char type1,
struct pci_controller *hose)
{
unsigned long flags;
unsigned long mid = MCPCIA_HOSE2MID(hose->index);
unsigned int stat0, value, temp, cpu;
cpu = smp_processor_id();
local_irq_save(flags);
DBG_CFG(("conf_read(addr=0x%lx, type1=%d, hose=%d)\n",
addr, type1, mid));
/* Reset status register to avoid losing errors. */
stat0 = *(vuip)MCPCIA_CAP_ERR(mid);
*(vuip)MCPCIA_CAP_ERR(mid) = stat0;
mb();
temp = *(vuip)MCPCIA_CAP_ERR(mid);
DBG_CFG(("conf_read: MCPCIA_CAP_ERR(%d) was 0x%x\n", mid, stat0));
mb();
draina();
mcheck_expected(cpu) = 1;
mcheck_taken(cpu) = 0;
mcheck_extra(cpu) = mid;
mb();
/* Access configuration space. */
value = *((vuip)addr);
mb();
mb(); /* magic */
if (mcheck_taken(cpu)) {
mcheck_taken(cpu) = 0;
value = 0xffffffffU;
mb();
}
mcheck_expected(cpu) = 0;
mb();
DBG_CFG(("conf_read(): finished\n"));
local_irq_restore(flags);
return value;
}
void
polaris_machine_check(unsigned long vector, unsigned long la_ptr,
struct pt_regs * regs)
{
/* Clear the error before any reporting. */
mb();
mb();
draina();
polaris_pci_clr_err();
wrmces(0x7);
mb();
process_mcheck_info(vector, la_ptr, regs, "POLARIS",
mcheck_expected(0));
}
void
mcpcia_machine_check(unsigned long vector, unsigned long la_ptr,
struct pt_regs * regs)
{
struct el_common *mchk_header;
struct el_MCPCIA_uncorrected_frame_mcheck *mchk_logout;
unsigned int cpu = smp_processor_id();
int expected;
mchk_header = (struct el_common *)la_ptr;
mchk_logout = (struct el_MCPCIA_uncorrected_frame_mcheck *)la_ptr;
expected = mcheck_expected(cpu);
mb();
mb(); /* magic */
draina();
switch (expected) {
case 0:
{
/* FIXME: how do we figure out which hose the
error was on? */
struct pci_controler *hose;
for (hose = hose_head; hose; hose = hose->next)
mcpcia_pci_clr_err(MCPCIA_HOSE2MID(hose->index));
break;
}
case 1:
mcpcia_pci_clr_err(mcheck_extra(cpu));
break;
default:
/* Otherwise, we're being called from mcpcia_probe_hose
and there's no hose clear an error from. */
break;
}
wrmces(0x7);
mb();
process_mcheck_info(vector, la_ptr, regs, "MCPCIA", expected != 0);
if (!expected && vector != 0x620 && vector != 0x630) {
mcpcia_print_uncorrectable(mchk_logout);
mcpcia_print_system_area(la_ptr);
}
}
void
process_mcheck_info(unsigned long vector, unsigned long la_ptr,
const char *machine, int expected)
{
struct el_common *mchk_header;
const char *reason;
/*
* See if the machine check is due to a badaddr() and if so,
* ignore it.
*/
#ifdef CONFIG_VERBOSE_MCHECK
if (alpha_verbose_mcheck > 1) {
printk(KERN_CRIT "%s machine check %s\n", machine,
expected ? "expected." : "NOT expected!!!");
}
#endif
if (expected) {
int cpu = smp_processor_id();
mcheck_expected(cpu) = 0;
mcheck_taken(cpu) = 1;
return;
}
mchk_header = (struct el_common *)la_ptr;
printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
machine, vector, get_irq_regs()->pc, mchk_header->code);
switch (mchk_header->code) {
/* Machine check reasons. Defined according to PALcode sources. */
case 0x80: reason = "tag parity error"; break;
case 0x82: reason = "tag control parity error"; break;
case 0x84: reason = "generic hard error"; break;
case 0x86: reason = "correctable ECC error"; break;
case 0x88: reason = "uncorrectable ECC error"; break;
case 0x8A: reason = "OS-specific PAL bugcheck"; break;
case 0x90: reason = "callsys in kernel mode"; break;
case 0x96: reason = "i-cache read retryable error"; break;
case 0x98: reason = "processor detected hard error"; break;
/* System specific (these are for Alcor, at least): */
case 0x202: reason = "system detected hard error"; break;
case 0x203: reason = "system detected uncorrectable ECC error"; break;
case 0x204: reason = "SIO SERR occurred on PCI bus"; break;
case 0x205: reason = "parity error detected by core logic"; break;
case 0x206: reason = "SIO IOCHK occurred on ISA bus"; break;
case 0x207: reason = "non-existent memory error"; break;
case 0x208: reason = "MCHK_K_DCSR"; break;
case 0x209: reason = "PCI SERR detected"; break;
case 0x20b: reason = "PCI data parity error detected"; break;
case 0x20d: reason = "PCI address parity error detected"; break;
case 0x20f: reason = "PCI master abort error"; break;
case 0x211: reason = "PCI target abort error"; break;
case 0x213: reason = "scatter/gather PTE invalid error"; break;
case 0x215: reason = "flash ROM write error"; break;
case 0x217: reason = "IOA timeout detected"; break;
case 0x219: reason = "IOCHK#, EISA add-in board parity or other catastrophic error"; break;
case 0x21b: reason = "EISA fail-safe timer timeout"; break;
case 0x21d: reason = "EISA bus time-out"; break;
case 0x21f: reason = "EISA software generated NMI"; break;
case 0x221: reason = "unexpected ev5 IRQ[3] interrupt"; break;
default: reason = "unknown"; break;
}
printk(KERN_CRIT "machine check type: %s%s\n",
reason, mchk_header->retry ? " (retryable)" : "");
dik_show_regs(get_irq_regs(), NULL);
#ifdef CONFIG_VERBOSE_MCHECK
if (alpha_verbose_mcheck > 1) {
/* Dump the logout area to give all info. */
unsigned long *ptr = (unsigned long *)la_ptr;
long i;
for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
printk(KERN_CRIT " +%8lx %016lx %016lx\n",
i*sizeof(long), ptr[i], ptr[i+1]);
}
}
#endif /* CONFIG_VERBOSE_MCHECK */
}
