int mdss_edp_on(struct mdss_panel_data *pdata)
{
struct mdss_edp_drv_pdata *edp_drv = NULL;
int ret = 0;
if (!pdata) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
edp_drv = container_of(pdata, struct mdss_edp_drv_pdata,
panel_data);
pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);
if (!edp_drv->cont_splash) { /* vote for clocks */
mdss_edp_phy_pll_reset(edp_drv);
mdss_edp_aux_reset(edp_drv);
mdss_edp_mainlink_reset(edp_drv);
mdss_edp_aux_ctrl(edp_drv, 1);
ret = mdss_edp_prepare_clocks(edp_drv);
if (ret)
return ret;
mdss_edp_phy_power_ctrl(edp_drv, 1);
ret = mdss_edp_clk_enable(edp_drv);
if (ret) {
mdss_edp_unprepare_clocks(edp_drv);
return ret;
}
mdss_edp_phy_pll_ready(edp_drv);
mdss_edp_lane_power_ctrl(edp_drv, 1);
mdss_edp_clock_synchrous(edp_drv, 1);
mdss_edp_phy_vm_pe_init(edp_drv);
mdss_edp_config_ctrl(edp_drv);
mdss_edp_sw_mvid_nvid(edp_drv);
mdss_edp_timing_cfg(edp_drv);
gpio_set_value(edp_drv->gpio_panel_en, 1);
INIT_COMPLETION(edp_drv->idle_comp);
mdss_edp_mainlink_ctrl(edp_drv, 1);
} else {
mdss_edp_aux_ctrl(edp_drv, 1);
}
mdss_edp_irq_enable(edp_drv);
mdss_edp_wait4train(edp_drv);
edp_drv->cont_splash = 0;
pr_debug("%s:-\n", __func__);
return ret;
}
int mdss_edp_off(struct mdss_panel_data *pdata)
{
struct mdss_edp_drv_pdata *edp_drv = NULL;
int ret = 0;
edp_drv = container_of(pdata, struct mdss_edp_drv_pdata,
panel_data);
if (!edp_drv) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);
/* wait until link training is completed */
mutex_lock(&edp_drv->train_mutex);
INIT_COMPLETION(edp_drv->idle_comp);
mdss_edp_state_ctrl(edp_drv, ST_PUSH_IDLE);
ret = wait_for_completion_timeout(&edp_drv->idle_comp,
msecs_to_jiffies(100));
if (ret == 0)
pr_err("%s: idle pattern timedout\n", __func__);
mdss_edp_state_ctrl(edp_drv, 0);
mdss_edp_sink_power_state(edp_drv, SINK_POWER_OFF);
mdss_edp_irq_disable(edp_drv);
gpio_set_value(edp_drv->gpio_panel_en, 0);
if (gpio_is_valid(edp_drv->gpio_lvl_en))
gpio_set_value(edp_drv->gpio_lvl_en, 0);
if (edp_drv->bl_pwm != NULL)
pwm_disable(edp_drv->bl_pwm);
edp_drv->is_pwm_enabled = 0;
mdss_edp_mainlink_reset(edp_drv);
mdss_edp_mainlink_ctrl(edp_drv, 0);
mdss_edp_lane_power_ctrl(edp_drv, 0);
mdss_edp_phy_power_ctrl(edp_drv, 0);
mdss_edp_clk_disable(edp_drv);
mdss_edp_unprepare_clocks(edp_drv);
mdss_edp_aux_ctrl(edp_drv, 0);
pr_debug("%s-: state_ctrl=%x\n", __func__,
edp_read(edp_drv->base + 0x8));
mutex_unlock(&edp_drv->train_mutex);
return 0;
}