int lowlevel_init_subsystems(void)
{
// uint32_t reset_status;
int actions = 0;
// do_barriers();
/* Setup cpu info which is needed to select correct register offsets */
cpu_info_init();
#if 0
reset_status = power_read_reset_status();
switch (reset_status) {
case S5P_CHECK_SLEEP:
actions = DO_CLOCKS | DO_WAKEUP;
break;
case S5P_CHECK_DIDLE:
case S5P_CHECK_LPA:
actions = DO_WAKEUP;
default:
/* This is a normal boot (not a wake from sleep) */
actions = DO_UART | DO_CLOCKS | DO_POWER;
}
#endif
actions = DO_UART | DO_CLOCKS | DO_POWER;
if (actions & DO_POWER)
power_init();
if (actions & DO_CLOCKS)
system_clock_init();
if (actions & DO_UART) {
/* Set up serial UART so we can printf() */
/* FIXME(dhendrix): add a function for mapping
CONFIG_CONSOLE_SERIAL_UART_ADDRESS to PERIPH_ID_UARTn */
// exynos_pinmux_config(EXYNOS_UART, PINMUX_FLAG_NONE);
exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
console_init();
while (1) {
console_tx_byte('C');
}
}
init_timer(); /* FIXME(dhendrix): was timer_init() */
#if 0
if (actions & DO_CLOCKS) {
mem_ctrl_init();
tzpc_init();
}
#endif
// return actions & DO_WAKEUP;
return 0;
}
int lowlevel_init_subsystems(void)
{
uint32_t reset_status;
int actions = 0;
do_barriers();
/* Setup cpu info which is needed to select correct register offsets */
cpu_info_init();
reset_status = power_read_reset_status();
switch (reset_status) {
case S5P_CHECK_SLEEP:
actions = DO_CLOCKS | DO_WAKEUP;
break;
case S5P_CHECK_DIDLE:
case S5P_CHECK_LPA:
actions = DO_WAKEUP;
break;
default:
/* This is a normal boot (not a wake from sleep) */
actions = DO_UART | DO_CLOCKS | DO_POWER | DO_MEM_RESET;
}
if (actions & DO_POWER)
power_init();
if (actions & DO_CLOCKS)
system_clock_init();
if (actions & DO_UART) {
/* Set up serial UART so we can printf() */
exynos_pinmux_config(EXYNOS_UART, PINMUX_FLAG_NONE);
serial_init();
timer_init();
}
if (actions & DO_CLOCKS) {
mem_ctrl_init(actions & DO_MEM_RESET);
tzpc_init();
}
return actions & DO_WAKEUP;
}
