static void
truephy_reset(struct mii_softc *sc)
{
int i;
if (sc->mii_mpd_model == MII_MODEL_AGERE_ET1011) {
mii_phy_reset(sc);
return;
}
for (i = 0; i < 2; ++i) {
PHY_READ(sc, MII_PHYIDR1);
PHY_READ(sc, MII_PHYIDR2);
PHY_READ(sc, TRUEPHY_CTRL);
PHY_WRITE(sc, TRUEPHY_CTRL,
TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1);
PHY_WRITE(sc, TRUEPHY_INDEX, TRUEPHY_INDEX_MAGIC);
PHY_READ(sc, TRUEPHY_DATA);
PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
}
PHY_READ(sc, MII_BMCR);
PHY_READ(sc, TRUEPHY_CTRL);
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
PHY_WRITE(sc, TRUEPHY_CTRL,
TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1 | TRUEPHY_CTRL_RSV0);
#define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
for (i = 0; i < N(truephy_dspcode); ++i) {
const struct truephy_dsp *dsp = &truephy_dspcode[i];
PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
PHY_WRITE(sc, TRUEPHY_DATA, dsp->data);
PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
PHY_READ(sc, TRUEPHY_DATA);
}
#undef N
PHY_READ(sc, MII_BMCR);
PHY_READ(sc, TRUEPHY_CTRL);
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
mii_phy_reset(sc);
if (TRUEPHY_FRAMELEN(sc->mii_pdata->mii_ifp->if_mtu) > 2048) {
int conf;
conf = PHY_READ(sc, TRUEPHY_CONF);
conf &= ~TRUEPHY_CONF_TXFIFO_MASK;
conf |= TRUEPHY_CONF_TXFIFO_24;
PHY_WRITE(sc, TRUEPHY_CONF, conf);
}
}
/*
* If we negotiate a 10Mbps mode, we need to check for an alternate
* PHY and make sure it's enabled and set correctly.
*/
void
mlphy_status(struct mii_softc *sc)
{
struct mlphy_softc *msc = (struct mlphy_softc *)sc;
struct mii_data *mii = sc->mii_pdata;
struct mii_softc *other = NULL;
/* See if there's another PHY on the bus with us. */
LIST_FOREACH(other, &mii->mii_phys, mii_list)
if (other != sc)
break;
ukphy_status(sc);
if (IFM_SUBTYPE(mii->mii_media_active) != IFM_10_T) {
msc->ml_state = ML_STATE_AUTO_SELF;
if (other != NULL) {
mii_phy_reset(other);
PHY_WRITE(other, MII_BMCR, BMCR_ISO);
}
}
if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T) {
msc->ml_state = ML_STATE_AUTO_OTHER;
mlphy_reset(&msc->ml_mii);
PHY_WRITE(&msc->ml_mii, MII_BMCR, BMCR_ISO);
if (other != NULL) {
mii_phy_reset(other);
mii_phy_auto(other, 1);
}
}
}
static void
ip1000phy_reset(struct mii_softc *sc)
{
struct stge_softc *stge_sc;
device_t parent;
uint32_t reg;
mii_phy_reset(sc);
/* clear autoneg/full-duplex as we don't want it after reset */
reg = PHY_READ(sc, IP1000PHY_MII_BMCR);
reg &= ~(IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_FDX);
PHY_WRITE(sc, MII_BMCR, reg);
/*
* XXX There should be more general way to pass PHY specific
* data via mii interface.
*/
parent = device_get_parent(sc->mii_dev);
if (strncmp(device_get_name(parent), "stge", 4) == 0) {
stge_sc = device_get_softc(parent);
if (stge_sc->sc_rev >= 0x40 && stge_sc->sc_rev <= 0x4e)
ip1000phy_load_dspcode(sc);
}
}
void
urlphy_attach(struct device *parent, struct device *self, void *aux)
{
struct mii_softc *sc = (struct mii_softc *)self;
struct mii_attach_args *ma = aux;
struct mii_data *mii = ma->mii_data;
DPRINTF(("%s: %s: enter\n", sc->mii_dev.dv_xname, __func__));
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = urlphy_service;
sc->mii_status = urlphy_status;
sc->mii_pdata = mii;
sc->mii_flags = mii->mii_flags;
sc->mii_anegticks = 10;
/* Don't do loopback on this PHY. */
sc->mii_flags |= MIIF_NOLOOP;
/* Don't do isolate on this PHY. */
sc->mii_flags |= MIIF_NOISOLATE;
if (mii->mii_instance != 0) {
printf("%s: ignoring this PHY, non-zero instance\n",
sc->mii_dev.dv_xname);
return;
}
mii_phy_reset(sc);
sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
if (sc->mii_capabilities & BMSR_MEDIAMASK)
mii_phy_add_media(sc);
}
void
bmtphy_reset(struct mii_softc *sc)
{
u_int16_t data;
mii_phy_reset(sc);
if (sc->mii_model == MII_MODEL_BROADCOM_BCM5221) {
/* Enable shadow register mode */
data = PHY_READ(sc, 0x1f);
PHY_WRITE(sc, 0x1f, data | 0x0080);
/* Enable APD (Auto PowerDetect) */
data = PHY_READ(sc, MII_BMTPHY_AUX2);
PHY_WRITE(sc, MII_BMTPHY_AUX2, data | 0x0020);
/* Enable clocks across APD for
* Auto-MDIX functionality */
data = PHY_READ(sc, MII_BMTPHY_INTR);
PHY_WRITE(sc, MII_BMTPHY_INTR, data | 0x0004);
/* Disable shadow register mode */
data = PHY_READ(sc, 0x1f);
PHY_WRITE(sc, 0x1f, data & ~0x0080);
}
}
static void
icsphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
/* set powerdown feature */
switch (sc->mii_mpd_model) {
case MII_MODEL_ICS_1890:
case MII_MODEL_ICS_1893:
PHY_WRITE(sc, MII_ICSPHY_ECR2, ECR2_100AUTOPWRDN);
break;
case MII_MODEL_ICS_1892:
PHY_WRITE(sc, MII_ICSPHY_ECR2,
ECR2_10AUTOPWRDN|ECR2_100AUTOPWRDN);
break;
default:
/* 1889 have no ECR2 */
break;
}
/*
* There is no description that the reset do auto-negotiation in the
* data sheet.
*/
PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_STARTNEG|BMCR_FDX);
}
static void
qsphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
PHY_WRITE(sc, MII_QSPHY_IMASK, 0);
}
static void
ciphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
DELAY(1000);
}
static void
acphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
PHY_WRITE(sc, MII_ACPHY_INT, 0);
}
static int
bmtphy_attach(device_t dev)
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = bmtphy_service;
sc->mii_pdata = mii;
mii_phy_reset(sc);
mii->mii_instance++;
sc->mii_capabilities =
PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
device_printf(dev, " ");
mii_phy_add_media(sc);
printf("\n");
MIIBUS_MEDIAINIT(sc->mii_dev);
return (0);
}
static void
sqphy_84220_reset(struct mii_softc *sc)
{
int reg;
mii_phy_reset(sc);
/*
* This PHY sometimes insists on coming out of reset isolated,
* even when the MDA[0-3] pins are pulled high (to indicate
* PHY address 0), contrary to the device's datasheet.
*
* Morever, simply clearing BMCR_ISO here isn't enough; the
* change won't stick until about 30mS *after* the PHY has
* been reset.
*
* This sucks.
*/
while ((sc->mii_inst == 0 || (sc->mii_flags & MIIF_NOISOLATE)) &&
((reg = PHY_READ(sc, MII_BMCR)) & BMCR_ISO) != 0) {
delay(35000);
PHY_WRITE(sc, MII_BMCR, reg & ~BMCR_ISO);
delay(35000);
}
}
static void
rgephy_reset(struct mii_softc *sc)
{
uint16_t pcr, ssr;
if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && sc->mii_mpd_rev == 3) {
/* RTL8211C(L) */
ssr = PHY_READ(sc, RGEPHY_MII_SSR);
if ((ssr & RGEPHY_SSR_ALDPS) != 0) {
ssr &= ~RGEPHY_SSR_ALDPS;
PHY_WRITE(sc, RGEPHY_MII_SSR, ssr);
}
}
if (sc->mii_mpd_rev >= 2) {
pcr = PHY_READ(sc, RGEPHY_MII_PCR);
if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) {
pcr &= ~RGEPHY_PCR_MDI_MASK;
pcr |= RGEPHY_PCR_MDIX_AUTO;
PHY_WRITE(sc, RGEPHY_MII_PCR, pcr);
}
}
mii_phy_reset(sc);
DELAY(1000);
rgephy_load_dspcode(sc);
}
static void
lxtphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
PHY_WRITE(sc, MII_LXTPHY_IER,
PHY_READ(sc, MII_LXTPHY_IER) & ~IER_INTEN);
}
static int
rlphy_attach(device_t dev)
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
struct rlphy_softc *rsc;
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
/*
* Check whether we're the RTL8201L PHY and remember so the status
* routine can query the proper register for speed detection.
*/
rsc = (struct rlphy_softc *)sc;
if (mii_phy_dev_probe(dev, rlphys, 0) == 0)
rsc->sc_is_RTL8201L++;
/*
* The RealTek PHY can never be isolated, so never allow non-zero
* instances!
*/
if (mii->mii_instance != 0) {
device_printf(dev, "ignoring this PHY, non-zero instance\n");
return (ENXIO);
}
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = rlphy_service;
sc->mii_pdata = mii;
mii->mii_instance++;
sc->mii_flags |= MIIF_NOISOLATE;
#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
MII_MEDIA_100_TX);
mii_phy_reset(sc);
sc->mii_capabilities =
PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
device_printf(dev, " ");
mii_phy_add_media(sc);
printf("\n");
#undef ADD
MIIBUS_MEDIAINIT(sc->mii_dev);
return (0);
}
static int
nsgphy_attach(device_t dev)
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
mii_softc_init(sc, ma);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_service = nsgphy_service;
/*
* Only retry autonegotiation every 17 seconds.
* Actually, for gigE PHYs, we should wait longer, since
* 5 seconds is the mimimum time the documentation
* says to wait for a 1000mbps link to be established.
*/
sc->mii_anegticks = 17;
sc->mii_pdata = mii;
sc->mii_flags |= MIIF_NOISOLATE;
mii->mii_instance++;
#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
MII_MEDIA_NONE);
#if 0
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
MII_MEDIA_100_TX);
#endif
mii_phy_reset(sc);
sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
if (sc->mii_capabilities & BMSR_EXTSTAT)
sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
device_printf(dev, " ");
if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
(sc->mii_extcapabilities & EXTSR_MEDIAMASK))
mii_phy_add_media(sc);
else
kprintf("no media present");
kprintf("\n");
#undef ADD
MIIBUS_MEDIAINIT(sc->mii_dev);
return(0);
}
static void
inphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
/* Ensure Bay flow control is disabled. */
PHY_WRITE(sc, MII_INPHY_SCR,
PHY_READ(sc, MII_INPHY_SCR) & ~SCR_FLOWCTL);
}
/*
* The Micro Linear PHY comes out of reset with the 'autoneg
* enable' bit set, which we don't want.
*/
static void
mlphy_reset(struct mii_softc *sc)
{
int reg;
mii_phy_reset(sc);
reg = PHY_READ(sc, MII_BMCR);
reg &= ~BMCR_AUTOEN;
PHY_WRITE(sc, MII_BMCR, reg);
}
static void
nsphy_reset(struct mii_softc *sc)
{
int anar;
mii_phy_reset(sc);
anar = PHY_READ(sc, MII_ANAR);
anar |= BMSR_MEDIA_TO_ANAR(PHY_READ(sc, MII_BMSR));
PHY_WRITE(sc, MII_ANAR, anar);
}
static void
makphy_reset(struct mii_softc *sc)
{
uint16_t pscr;
/* Assert CRS on transmit */
pscr = PHY_READ(sc, MII_MAKPHY_PSCR);
PHY_WRITE(sc, MII_MAKPHY_PSCR, pscr | PSCR_CRS_ON_TX);
mii_phy_reset(sc);
}
static void
rlphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
/*
* XXX RealTek PHY doesn't set the BMCR properly after
* XXX reset, which breaks autonegotiation.
*/
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN);
}
void
exphy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
/*
* XXX 3Com PHY doesn't set the BMCR properly after
* XXX reset, which breaks autonegotiation.
*/
PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
}
static void
ruephy_reset(struct mii_softc *sc)
{
mii_phy_reset(sc);
/*
* XXX RealTek RTL8150 PHY doesn't set the BMCR properly after
* XXX reset, which breaks autonegotiation.
*/
PHY_WRITE(sc, MII_BMCR, (BMCR_S100 | BMCR_AUTOEN | BMCR_FDX));
}
static int
lxtphy_attach(device_t dev)
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
const char *nic;
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = lxtphy_service;
sc->mii_pdata = mii;
mii->mii_instance++;
mii_phy_reset(sc);
sc->mii_capabilities =
PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
device_printf(dev, " ");
/*
* On Apple BMAC controllers, we end up in a weird state
* of partially-completed autonegotiation on boot. So
* force autonegotation to try again.
*/
nic = device_get_name(device_get_parent(sc->mii_dev));
if (strcmp(nic, "bm") == 0)
sc->mii_flags |= MIIF_FORCEANEG | MIIF_NOISOLATE;
#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, sc->mii_inst),
MII_MEDIA_100_TX);
printf("100baseFX, ");
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, sc->mii_inst),
MII_MEDIA_100_TX_FDX);
printf("100baseFX-FDX, ");
#undef ADD
mii_phy_add_media(sc);
printf("\n");
MIIBUS_MEDIAINIT(sc->mii_dev);
return (0);
}
static void
truephy_reset(struct mii_softc *sc)
{
int i;
for (i = 0; i < 2; ++i) {
PHY_READ(sc, MII_PHYIDR1);
PHY_READ(sc, MII_PHYIDR2);
PHY_READ(sc, TRUEPHY_CTRL);
PHY_WRITE(sc, TRUEPHY_CTRL,
TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1);
PHY_WRITE(sc, TRUEPHY_INDEX, TRUEPHY_INDEX_MAGIC);
PHY_READ(sc, TRUEPHY_DATA);
PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
}
PHY_READ(sc, MII_BMCR);
PHY_READ(sc, TRUEPHY_CTRL);
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
PHY_WRITE(sc, TRUEPHY_CTRL,
TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1 | TRUEPHY_CTRL_RSV0);
for (i = 0; i < NELEM(truephy_dspcode); ++i) {
const struct truephy_dsp *dsp = &truephy_dspcode[i];
PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
PHY_WRITE(sc, TRUEPHY_DATA, dsp->data);
PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
PHY_READ(sc, TRUEPHY_DATA);
}
PHY_READ(sc, MII_BMCR);
PHY_READ(sc, TRUEPHY_CTRL);
PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
mii_phy_reset(sc);
if (FRAMELEN(sc->mii_pdata->mii_ifp->if_mtu) > 2048) {
int conf;
conf = PHY_READ(sc, TRUEPHY_CONF);
conf &= ~TRUEPHY_CONF_TXFIFO_MASK;
conf |= TRUEPHY_CONF_TXFIFO_24;
PHY_WRITE(sc, TRUEPHY_CONF, conf);
}
}
/*
* If we negotiate a 10Mbps mode, we need to check for an alternate
* PHY and make sure it's enabled and set correctly.
*/
static void
mlphy_status(struct mii_softc *sc)
{
struct mlphy_softc *msc = (struct mlphy_softc *)sc;
struct mii_data *mii = msc->ml_mii.mii_pdata;
struct mii_softc *other = NULL;
device_t *devlist;
int devs, i;
/* See if there's another PHY on the bus with us. */
device_get_children(msc->ml_mii.mii_dev, &devlist, &devs);
for (i = 0; i < devs; i++) {
if (strcmp(device_get_name(devlist[i]), "mlphy")) {
other = device_get_softc(devlist[i]);
break;
}
}
kfree(devlist, M_TEMP);
if (other == NULL)
return;
ukphy_status(sc);
if (IFM_SUBTYPE(mii->mii_media_active) != IFM_10_T) {
msc->ml_state = ML_STATE_AUTO_SELF;
mii_phy_reset(other);
PHY_WRITE(other, MII_BMCR, BMCR_ISO);
}
if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T) {
msc->ml_state = ML_STATE_AUTO_OTHER;
mlphy_reset(&msc->ml_mii);
PHY_WRITE(&msc->ml_mii, MII_BMCR, BMCR_ISO);
mii_phy_reset(other);
mii_phy_auto(other, 1);
}
}
static void
igphy_reset(struct mii_softc *sc)
{
struct igphy_softc *igsc = (struct igphy_softc *) sc;
uint16_t fused, fine, coarse;
mii_phy_reset(sc);
delay(150);
switch (igsc->sc_mactype) {
case WM_T_82541:
case WM_T_82547:
case WM_T_82541_2:
case WM_T_82547_2:
igphy_load_dspcode(sc);
break;
case WM_T_ICH8:
case WM_T_ICH9:
if ((igsc->sc_macflags & WM_F_EEPROM_INVALID) != 0)
igphy_load_dspcode_igp3(sc);
break;
default: /* Not for ICH10, PCH and 8257[12] */
break;
}
if (igsc->sc_mactype == WM_T_82547) {
fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_SPARE_FUSE_STATUS);
if ((fused & ANALOG_SPARE_FUSE_ENABLED) == 0) {
fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_FUSE_STATUS);
fine = fused & ANALOG_FUSE_FINE_MASK;
coarse = fused & ANALOG_FUSE_COARSE_MASK;
if (coarse > ANALOG_FUSE_COARSE_THRESH) {
coarse -= ANALOG_FUSE_COARSE_10;
fine -= ANALOG_FUSE_FINE_1;
} else if (coarse == ANALOG_FUSE_COARSE_THRESH)
fine -= ANALOG_FUSE_FINE_10;
fused = (fused & ANALOG_FUSE_POLY_MASK) |
(fine & ANALOG_FUSE_FINE_MASK) |
(coarse & ANALOG_FUSE_COARSE_MASK);
IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_CONTROL, fused);
IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_BYPASS,
ANALOG_FUSE_ENABLE_SW_CONTROL);
}
}
PHY_WRITE(sc, MII_IGPHY_PAGE_SELECT, 0x0000);
}
static int
xmphy_attach(device_t dev)
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
const char *sep = "";
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = xmphy_service;
sc->mii_pdata = mii;
sc->mii_flags |= MIIF_NOISOLATE;
mii->mii_instance++;
#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
#define PRINT(s) printf("%s%s", sep, s); sep = ", "
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
BMCR_ISO);
#if 0
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
BMCR_LOOP|BMCR_S100);
#endif
mii_phy_reset(sc);
device_printf(dev, " ");
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, sc->mii_inst),
XMPHY_BMCR_FDX);
PRINT("1000baseSX");
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), 0);
PRINT("1000baseSX-FDX");
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
PRINT("auto");
printf("\n");
#undef ADD
#undef PRINT
MIIBUS_MEDIAINIT(sc->mii_dev);
return (0);
}
int
cas_mediachange(struct ifnet *ifp)
{
struct cas_softc *sc = ifp->if_softc;
struct mii_data *mii = &sc->sc_mii;
if (mii->mii_instance) {
struct mii_softc *miisc;
LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
mii_phy_reset(miisc);
}
return (mii_mediachg(&sc->sc_mii));
}
static int
pnaphy_attach(device_t dev)
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
const char *sep = "";
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = pnaphy_service;
sc->mii_pdata = mii;
mii->mii_instance++;
sc->mii_flags |= MIIF_NOISOLATE;
#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
#define PRINT(s) printf("%s%s", sep, s); sep = ", "
mii_phy_reset(sc);
sc->mii_capabilities =
PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
device_printf(dev, " ");
if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
printf("no media present");
else {
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0, sc->mii_inst), 0);
PRINT("HomePNA");
}
ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
BMCR_ISO);
printf("\n");
#undef ADD
#undef PRINT
MIIBUS_MEDIAINIT(sc->mii_dev);
return (0);
}
int
ukphy_attach(device_t dev)
{
struct mii_softc *sc;
struct mii_attach_args *ma;
struct mii_data *mii;
sc = device_get_softc(dev);
ma = device_get_ivars(dev);
mii_softc_init(sc, ma);
sc->mii_dev = device_get_parent(dev);
mii = device_get_softc(sc->mii_dev);
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
if (bootverbose) {
device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
MII_OUI(ma->mii_id1, ma->mii_id2),
MII_MODEL(ma->mii_id2), MII_REV(ma->mii_id2));
}
sc->mii_inst = mii->mii_instance;
sc->mii_service = ukphy_service;
sc->mii_pdata = mii;
mii->mii_instance++;
/*
* Don't do loopback on unknown PHYs. It might confuse some of them.
*/
sc->mii_flags |= MIIF_NOLOOP;
mii_phy_reset(sc);
sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
if (sc->mii_capabilities & BMSR_EXTSTAT)
sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
device_printf(dev, " ");
if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
(sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
kprintf("no media present");
else
mii_phy_add_media(sc);
kprintf("\n");
MIIBUS_MEDIAINIT(sc->mii_dev);
return(0);
}