Пример #1
0
uint8_t rf_dngl_recv(__xdata void* buff, uint8_t buff_size)
{
	uint8_t ret_val = 0;
	
	// check if there's data in the RX FIFO
	nRF_ReadReg(FIFO_STATUS);
	if ((nRF_data[1] & vRX_EMPTY) == 0)
	{
		LED_on();
		
		// read the payload
		nRF_ReadRxPayloadWidth();
		ret_val = nRF_data[1];

		// the nRF specs state I have to drop the packet if the length is > 32
		if (ret_val > 32)
		{
			nRF_FlushRX();
			ret_val = 0;
		} else {
			nRF_ReadRxPayload(ret_val);
			memcpy_X(buff, nRF_data + 1, ret_val > buff_size ? buff_size : ret_val);
		}

		// reset the TX_DS
		if (nRF_data[0] & vTX_DS)
			nRF_WriteReg(STATUS, vTX_DS);

		LED_off();
	}
	
	return ret_val;
}
Пример #2
0
uint8_t rf_ctrl_read_ack_payload(void* buff, const uint8_t buff_size)
{
	uint8_t ret_val = 0;

	nRF_ReadReg(FIFO_STATUS);
	uint8_t fifo_status = nRF_data[1];

	if ((fifo_status & vRX_EMPTY) == 0)
	{
		nRF_ReadRxPayloadWidth();
		uint8_t ack_bytes = nRF_data[1];

		// the max ACK payload size has to be 2
		if (ack_bytes <= 32)
		{
			// read the entire payload
			nRF_ReadRxPayload(ack_bytes);

			// copy up to buff_size bytes
			ret_val = ack_bytes < buff_size ? ack_bytes : buff_size;
			memcpy(buff, nRF_data + 1, ret_val);
		} else {
			nRF_FlushRX();
		}
	}

	return ret_val;
}
Пример #3
0
void rf_ctrl_init(void)
{
	nRF_Init();

	// write the addresses
	nRF_WriteAddrReg(TX_ADDR, DongleAddr, 5);

	// we need to set the RX address to the same as TX to be
	// able to receive ACK
	nRF_WriteAddrReg(RX_ADDR_P0, DongleAddr, 5);

#ifdef NRF_CHECK_MODULE

	nRF_data[1] = 0;
	nRF_data[2] = 0;
	nRF_data[3] = 0;
	nRF_data[4] = 0;
	nRF_data[5] = 0;

	nRF_ReadAddrReg(TX_ADDR, 5);	// read the address back

	// compare
	if (memcmp_P(nRF_data + 1, &DongleAddr, 5) != 0)
	{
		//printf("buff=%02x %02x %02x %02x %02x\n", buff[0], buff[1], buff[2], buff[3], buff[4]);
		//printf("nRF_=%02x %02x %02x %02x %02x\n", nRF_data[1], nRF_data[2], nRF_data[3], nRF_data[4], nRF_data[5]);
		
		// toggle the CAPS LED forever
		//uint8_t c;
		//for (c = 0; c < 10; ++c)
		for (;;)
		{
			TogBit(PORT(LED_CAPS_PORT), LED_CAPS_BIT);

			_delay_ms(300);
		}
	}

#endif	// NRF_CHECK_MODULE

	nRF_WriteReg(EN_AA, vENAA_P0);			// enable auto acknowledge
	nRF_WriteReg(EN_RXADDR, vERX_P0);		// enable RX address (for ACK)
	
	nRF_WriteReg(SETUP_RETR, vARD_250us 	// auto retransmit delay - ARD
							| 0x0f);		// auto retransmit count - ARC
	nRF_WriteReg(FEATURE, vEN_DPL | vEN_ACK_PAY);	// enable dynamic payload length and ACK payload
	nRF_WriteReg(DYNPD, vDPL_P0);					// enable dynamic payload length for pipe 0

	nRF_FlushRX();
	nRF_FlushTX();
	
	nRF_WriteReg(STATUS, vRX_DR | vTX_DS | vMAX_RT);	// reset the IRQ flags
	nRF_WriteReg(RF_CH, CHANNEL_NUM);					// set the channel
	
	// reset the the lost packet counters
	plos_total = arc_total = rf_packets_total = 0;
}
Пример #4
0
void rf_dngl_init(void)
{
	nRF_Init();

	// set the addresses
	nRF_WriteAddrReg(RX_ADDR_P0, DongleAddr, NRF_ADDR_SIZE);

#if defined(NRF_CHECK_MODULE) && defined(AVR)

	nRF_data[1] = 0;
	nRF_data[2] = 0;
	nRF_data[3] = 0;
	nRF_data[4] = 0;
	nRF_data[5] = 0;

	nRF_ReadAddrReg(RX_ADDR_P0, 5);	// read the address back
	
	// compare
	if (memcmp(nRF_data + 1, &DongleAddr, NRF_ADDR_SIZE) != 0)
	{
		//printf("buff=%02x %02x %02x %02x %02x\n", buff[0], buff[1], buff[2], buff[3], buff[4]);
		//printf("nRF_=%02x %02x %02x %02x %02x\n", nRF_data[1], nRF_data[2], nRF_data[3], nRF_data[4], nRF_data[5]);

		// toggle the LED forever
		for (;;)
		{
			TogBit(PORT(LED1_PORT), LED1_BIT);

			_delay_ms(300);
		}
	}

#endif	// NRF_CHECK_MODULE

	nRF_WriteReg(EN_AA, vENAA_P0);			// enable auto acknowledge
	nRF_WriteReg(SETUP_RETR, vARD_250us);	// ARD=250us, ARC=disabled
	nRF_WriteReg(RF_SETUP, vRF_DR_2MBPS		// data rate
						| vRF_PWR_0DBM);	// output power

	nRF_WriteReg(FEATURE, vEN_DPL | vEN_ACK_PAY);	// enable dynamic payload length and ACK payload
	nRF_WriteReg(DYNPD, vDPL_P0);					// enable dynamic payload length for pipe 0

	nRF_FlushRX();
	nRF_FlushTX();
	
	nRF_WriteReg(EN_RXADDR, vERX_P0);					// enable RX address
	nRF_WriteReg(STATUS, vRX_DR | vTX_DS | vMAX_RT);	// reset the IRQ flags

	nRF_WriteReg(RF_CH, CHANNEL_NUM);			// set the channel
	nRF_WriteReg(CONFIG, vEN_CRC | vCRCO 		// enable a 2 byte CRC
								| vMASK_TX_DS	// we don't care about the TX_DS status flag
								| vPRIM_RX		// RX mode
								| vPWR_UP);		// power up the transceiver

	nRF_CE_hi();		// start receiving
}