/*==================================================================== FUNCTION sharp_bb_init DESCRIPTION DEPENDENCIES RETURN VALUE SIDE EFFECTS ======================================================================*/ int sharp_bb_init(void) { tNmDrvInit nmiDrvInit; int ret = 0; //ISDBT_MSG_SHARP_BB("[%s] \n", __func__); sharp_bb_pre_init(); memset(&nmiDrvInit, 0, sizeof(tNmDrvInit)); nmiDrvInit.isdbt.bustype = nI2C; nmiDrvInit.isdbt.transporttype = nTS; nmiDrvInit.isdbt.blocksize = 1; nmiDrvInit.isdbt.ai2c.adrM = 0x61; nmiDrvInit.isdbt.core.bustype = nmiDrvInit.isdbt.bustype; nmiDrvInit.isdbt.core.transporttype = nmiDrvInit.isdbt.transporttype; nmiDrvInit.isdbt.core.dco = 1; nmiDrvInit.isdbt.core.ldoby = 1; /* Set to 1 if the IO voltage is less than 2.2v */ nmiDrvInit.isdbt.core.op = nSingle; //nmiDrvInit.isdbt.core.xo = 32.; nmi_drv_init(&nmiDrvInit); ret = nmi_drv_init_core(nISDBTMode, nMaster); ISDBT_MSG_SHARP_BB("[%s] result [%d]\n", __func__, ret); return ret; }
int nmi_drv_ctl(uint32_t code, tNmDrvMode mode, tNmiIsdbtChip cix, void *inp) { tNmiDrv *pd = &drv; int result = 1; switch (code) { case NMI_DRV_ISR_PROCESS: nmi_drv_dtv_excute_isr((tNmDrvIsdbtIrq*)inp); break; case NMI_DRV_DTV_TS_TEST_PATTERN: { int pattern = *((int *)inp); nmi_drv_dtv_ts_test_pattern(pattern); } break; case NMI_DRV_SWITCH_COMBINER: nmi_isdbt_switch_cmb(cix,*((int *)inp)); break; case NMI_DRV_DEEP_SLEEP: nmi_drv_sleep(mode); break; case NMI_DRV_WAKEUP: nmi_drv_wakeup(mode); break; case NMI_DRV_INIT: result = nmi_drv_init(inp); break; case NMI_DRV_DEINIT: nmi_drv_deinit(); break; case NMI_DRV_INIT_CORE: result = nmi_drv_init_core(mode, cix); break; case NMI_DRV_GET_CHIPID: *((uint32_t *)inp) = nmi_drv_get_chipid(mode, cix); break; case NMI_DRV_RUN: result = nmi_drv_run(mode, cix, inp); /* result means lock or not */ break; case NMI_DRV_RW_DIR: { tNmDrvRWReg *p = (tNmDrvRWReg *)inp; if (p->dir) { /* Read */ nmi_drv_read_register(mode, cix, (uint8_t *)&p->dat, p->sz, p->adr); } else { /* Write */ nmi_drv_write_register(mode, cix, (uint8_t *)&p->dat, p->sz, p->adr); } } break; case NMI_DRV_RF_RW_DIR: { tNmDrvRWReg *p = (tNmDrvRWReg *)inp; if (p->dir) { /* Read */ nmi_drv_read_rf_register(mode, cix, (uint8_t *)&p->dat, p->sz, p->adr); } else { /* Write */ nmi_drv_write_rf_register(mode, cix, (uint8_t *)&p->dat, p->sz, p->adr); } } break; case NMI_DRV_SOFT_RESET: nmi_drv_soft_reset(mode, cix); break; case NMI_DRV_GET_ISDBT_STATUS: nmi_isdbt_get_status(cix, (tIsdbtSignalStatus *)inp); break; case NMI_DRV_SCAN: nmi_drv_scan(mode, cix, inp); break; case NMI_DRV_START_STREAM: nmi_drv_video(mode, (tNmDtvStream*)inp, 1); break; case NMI_DRV_STOP_STREAM: nmi_drv_video(mode, (tNmDtvStream*)inp, 0); break; case NMI_DRV_ISDBT_RST_COUNT: nmi_drv_isdbt_rst_cnt(cix); break; case NMI_DRV_ISDBT_SET_GAIN: { tNmiIsdbtLnaGain *p = (tNmiIsdbtLnaGain*)inp; pd->dtv.vf.setgain(cix, *p); }break; case NMI_DRV_ISDBT_UPDATE_PLL: pd->dtv.vf.updatepll(cix); break; case NMI_DRV_VERSION: { tNmiDriverVer *vp = (tNmiDriverVer *)inp; vp->dVer.major = ASIC_DTV_MAJOR_VER; vp->dVer.minor = ASIC_DTV_MINOR_VER; vp->dVer.rev1 = ASIC_DTV_REV1; vp->dVer.rev2 = ASIC_DTV_REV2; } break; case NMI_DRV_GAIN_THOLD: #ifndef FIX_POINT nmi_isdbt_set_gain_thold(cix, (tIsdbtGainThold *)inp); #endif break; case NMI_DRV_SET_GAIN: pd->dtv.vf.setgain(cix, (tNmiIsdbtLnaGain)inp); break; case NMI_DRV_UPDATE_PLL: pd->dtv.vf.updatepll(cix); break; case NMI_DRV_SWITCH_DSM: { int enable = *(int*)inp; nmi_isdbt_dsm_on(enable); } break; case NMI_DRV_ENABLE_PID_FILTER: { tIsdbtPidFilterCtl *ppid = (tIsdbtPidFilterCtl*)inp; pd->dtv.vf.pidfilter(cix, ppid); } break; case NMI_DRV_DISABLE_PID_FILTER: { tIsdbtPidFilterCtl ppid; ppid.enfilt = 0; pd->dtv.vf.pidfilter(cix, &ppid); }break; case NMI_DRV_ADD_PID: pd->dtv.vf.addpid(cix, (tIsdbtPid*)inp); break; case NMI_DRV_REMOVE_PID: { unsigned int pid = *(unsigned int*)inp; pd->dtv.vf.removepid(cix, pid); }break; default: break; } return result; }