int main(void) {
#ifdef DEBUGPRINT
uart_init(UART_BAUD_SELECT_DOUBLE_SPEED(57600, F_CPU));
#endif
char* node_address = "OWRF1";
node_address[4] += NODENUM;
OWInit(5);
nrf24l01_init();
nrf24l01_settxaddr((uint8_t*) node_address);
nrf24l01_setrxaddr(0, (uint8_t*) node_address);
nrf24l01_setrxaddr(1, (uint8_t*) "OWRF0");
sei();
for (;;) {
uint8_t pipe;
if (nrf24l01_readready(&pipe)) {
int len = owrf_read(transfer_buf);
if (len != -1) {
#ifdef DEBUGPRINT
debugPrint("channel=%d command=%X datalen=%d\r\n", transfer_buf[0], transfer_buf[1], transfer_buf[2]);
for (int i = 0; i < transfer_buf[2]; i++) {
debugPrint(">%02X", transfer_buf[i+3]);
}
debugPrint("\r\n");
#endif
if (transfer_buf[0] == NODENUM) {
len = doSlave(transfer_buf + 1) + 3;
#ifdef DEBUGPRINT
debugPrint("retval=%X datalen=%d\r\n", transfer_buf[1], transfer_buf[2]);
for (int i = 0; i < transfer_buf[2]; i++) {
debugPrint("<%02X", transfer_buf[i+3]);
}
debugPrint("\r\n");
#endif
_delay_ms(5);
owrf_write(transfer_buf, len);
}
}
}
}
}
/*
* init nrf24l01
*/
void nrf24l01_init() {
uint8_t activate[] = {ACTIVATE, ACTIVATE_ARG};
uint8_t dynPd[] = {DYNPD, 0x01};
uint8_t feature = 0;
//setup port
NRF24L01_CSN_DDR |= (1<<NRF24L01_CSN); //output
NRF24L01_CE_DDR |= (1<<NRF24L01_CE); //output
spi_init(); //init spi
nrf24l01_CElo; //low CE
nrf24l01_CSNhi; //high CSN
_delay_ms(5); //wait for the radio to init
nrf24l01_writeregister(FEATURE, NRF24L01_FEATURE_EN_DPL | NRF24L01_FEATURE_PAYLOAD_WITH_ACK);
feature = nrf24l01_readregister(FEATURE);
if (((feature & NRF24L01_FEATURE_EN_DPL) == 0) || ((feature & NRF24L01_FEATURE_PAYLOAD_WITH_ACK) == 0))
{
nrf24l01_command(activate, 2);
nrf24l01_writeregister(FEATURE, NRF24L01_FEATURE_EN_DPL | NRF24L01_FEATURE_PAYLOAD_WITH_ACK);
}
//tx address
nrf24l01_settxaddr(nrf24l01_addrtx);
//rx address
nrf24l01_setrxaddr(0, nrf24l01_addr0);
//nrf24l01_setrxaddr(1, nrf24l01_addr1);
//nrf24l01_setrxaddr(2, nrf24l01_addr2);
//nrf24l01_setrxaddr(3, nrf24l01_addr3);
//nrf24l01_setrxaddr(4, nrf24l01_addr4);
//nrf24l01_setrxaddr(5, nrf24l01_addr5);
//auto ack
#if NRF24L01_ACK == 1
//nrf24l01_readregister(NRF24L01_REG_EN_AA) |
nrf24l01_writeregister(NRF24L01_REG_EN_AA, (1<<NRF24L01_REG_ENAA_P0));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P1));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P2));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P3));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P4));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P5));
#else
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P0));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P1));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P2));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P3));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P4));
//nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P5));
#endif
//enable pipe
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, 0);
#if NRF24L01_ENABLEDP0 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P0));
#endif
#if NRF24L01_ENABLEDP1 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P1));
#endif
#if NRF24L01_ENABLEDP2 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P2));
#endif
#if NRF24L01_ENABLEDP3 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P3));
#endif
#if NRF24L01_ENABLEDP4 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P4));
#endif
#if NRF24L01_ENABLEDP5 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P5));
#endif
nrf24l01_writeregister(NRF24L01_REG_SETUP_RETR, NRF24L01_RETR); // set retries
nrf24l01_writeregister(NRF24L01_REG_RF_CH, NRF24L01_CH); //set RF channel
//payload size
#if NRF24L01_ENABLEDP0 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P0, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP1 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P1, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP2 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P2, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP3 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P3, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP4 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P4, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP5 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P5, NRF24L01_PAYLOAD);
#endif
nrf24l01_setpalevel(); //set power level
nrf24l01_setdatarate(); //set data rate
nrf24l01_setcrclength(); //set crc length
//nrf24l01_writeregister(NRF24L01_REG_DYNPD, 1); //enable dynamic payloads
nrf24l01_command(dynPd, 2);
//set rx mode
nrf24l01_setRX();
}